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公开(公告)号：US20110198589A1
公开(公告)日：2011-08-18
申请号：US13094780
申请日：2011-04-26
申请人： Mou-Shiung Lin , Huei-Mei Yen , Chiu-Ming Chou , Hsin-Jung Lo , Ke-Hung Chen
发明人： Mou-Shiung Lin , Huei-Mei Yen , Chiu-Ming Chou , Hsin-Jung Lo , Ke-Hung Chen
IPC分类号： H01L23/58 , H01L23/532
CPC分类号： H01L24/11 , H01L22/32 , H01L24/03 , H01L24/05 , H01L24/12 , H01L24/94 , H01L2224/02166 , H01L2224/0231 , H01L2224/03912 , H01L2224/0392 , H01L2224/0401 , H01L2224/05018 , H01L2224/05027 , H01L2224/05553 , H01L2224/05557 , H01L2224/05558 , H01L2224/05572 , H01L2224/0558 , H01L2224/05599 , H01L2224/05624 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/1147 , H01L2224/1191 , H01L2224/11912 , H01L2224/13021 , H01L2224/13022 , H01L2224/13024 , H01L2224/13099 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/16 , H01L2224/274 , H01L2924/00014 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/1305 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00
摘要： A semiconductor chip comprises a metal pad exposed by an opening in a passivation layer, wherein the metal pad has a testing area and a bond area. During a step of testing, a testing probe contacts with the testing area for electrical testing. After the step of testing, a polymer layer is formed on the testing area with a probe mark created by the testing probe. Alternatively, a semiconductor chip comprises a testing pad and a bond pad respectively exposed by two openings in a passivation layer, wherein the testing pad is connected to the bond pad. During a step of testing, a testing probe contacts with the testing pad for electrical testing. After the step of testing, a polymer layer is formed on the testing pad with a probe mark created by the testing probe.
摘要翻译： 半导体芯片包括由钝化层中的开口暴露的金属焊盘，其中金属焊盘具有测试区域和接合区域。 在测试步骤中，测试探头与测试区域接触进行电气测试。 在测试步骤之后，在测试区域上形成由测试探针产生的探针标记的聚合物层。 或者，半导体芯片包括分别由钝化层中的两个开口露出的测试焊盘和接合焊盘，其中测试焊盘连接到焊盘。 在测试步骤中，测试探针与测试垫接触进行电气测试。 在测试步骤之后，在测试垫上形成由测试探针产生的探针标记的聚合物层。
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公开(公告)号：US08304766B2
公开(公告)日：2012-11-06
申请号：US13094780
申请日：2011-04-26
申请人： Mou-Shiung Lin , Huei-Mei Yen , Hsin-Jung Lo , Chiu-Ming Chou , Ke-Hung Chen
发明人： Mou-Shiung Lin , Huei-Mei Yen , Hsin-Jung Lo , Chiu-Ming Chou , Ke-Hung Chen
CPC分类号： H01L24/11 , H01L22/32 , H01L24/03 , H01L24/05 , H01L24/12 , H01L24/94 , H01L2224/02166 , H01L2224/0231 , H01L2224/03912 , H01L2224/0392 , H01L2224/0401 , H01L2224/05018 , H01L2224/05027 , H01L2224/05553 , H01L2224/05557 , H01L2224/05558 , H01L2224/05572 , H01L2224/0558 , H01L2224/05599 , H01L2224/05624 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/1147 , H01L2224/1191 , H01L2224/11912 , H01L2224/13021 , H01L2224/13022 , H01L2224/13024 , H01L2224/13099 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/16 , H01L2224/274 , H01L2924/00014 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/1305 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00
摘要： A semiconductor chip comprises a metal pad exposed by an opening in a passivation layer, wherein the metal pad has a testing area and a bond area. During a step of testing, a testing probe contacts with the testing area for electrical testing. After the step of testing, a polymer layer is formed on the testing area with a probe mark created by the testing probe. Alternatively, a semiconductor chip comprises a testing pad and a bond pad respectively exposed by two openings in a passivation layer, wherein the testing pad is connected to the bond pad. During a step of testing, a testing probe contacts with the testing pad for electrical testing. After the step of testing, a polymer layer is formed on the testing pad with a probe mark created by the testing probe.
摘要翻译： 半导体芯片包括由钝化层中的开口暴露的金属焊盘，其中金属焊盘具有测试区域和接合区域。 在测试步骤中，测试探头与测试区域接触进行电气测试。 在测试步骤之后，在测试区域上形成由测试探针产生的探针标记的聚合物层。 或者，半导体芯片包括分别由钝化层中的两个开口露出的测试焊盘和接合焊盘，其中测试焊盘连接到焊盘。 在测试步骤中，测试探针与测试垫接触进行电气测试。 在测试步骤之后，在测试垫上形成由测试探针产生的探针标记的聚合物层。
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公开(公告)号：US07947978B2
公开(公告)日：2011-05-24
申请号：US11567182
申请日：2006-12-05
申请人： Mou-Shiung Lin , Huei-Mei Yen , Chiu-Ming Chou , Hsin-Jung Lo , Ke-Hung Chen
发明人： Mou-Shiung Lin , Huei-Mei Yen , Chiu-Ming Chou , Hsin-Jung Lo , Ke-Hung Chen
CPC分类号： H01L24/11 , H01L22/32 , H01L24/03 , H01L24/05 , H01L24/12 , H01L24/94 , H01L2224/02166 , H01L2224/0231 , H01L2224/03912 , H01L2224/0392 , H01L2224/0401 , H01L2224/05018 , H01L2224/05027 , H01L2224/05553 , H01L2224/05557 , H01L2224/05558 , H01L2224/05572 , H01L2224/0558 , H01L2224/05599 , H01L2224/05624 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/1147 , H01L2224/1191 , H01L2224/11912 , H01L2224/13021 , H01L2224/13022 , H01L2224/13024 , H01L2224/13099 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/16 , H01L2224/274 , H01L2924/00014 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/1305 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00
摘要： A semiconductor chip comprises a metal pad exposed by an opening in a passivation layer, wherein the metal pad has a testing area and a bond area. During a step of testing, a testing probe contacts with the testing area for electrical testing. After the step of testing, a polymer layer is formed on the testing area with a probe mark created by the testing probe. Alternatively, a semiconductor chip comprises a testing pad and a bond pad respectively exposed by two openings in a passivation layer, wherein the testing pad is connected to the bond pad. During a step of testing, a testing probe contacts with the testing pad for electrical testing. After the step of testing, a polymer layer is formed on the testing pad with a probe mark created by the testing probe.
摘要翻译： 半导体芯片包括由钝化层中的开口暴露的金属焊盘，其中金属焊盘具有测试区域和接合区域。 在测试步骤中，测试探头与测试区域接触进行电气测试。 在测试步骤之后，在测试区域上形成由测试探针产生的探针标记的聚合物层。 或者，半导体芯片包括分别由钝化层中的两个开口露出的测试焊盘和接合焊盘，其中测试焊盘连接到焊盘。 在测试步骤中，测试探针与测试垫接触进行电气测试。 在测试步骤之后，在测试垫上形成由测试探针产生的探针标记的聚合物层。
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公开(公告)号：US20070164279A1
公开(公告)日：2007-07-19
申请号：US11567182
申请日：2006-12-05
申请人： Mou-Shiung Lin , Huei-Mei Yen , Chiu-Ming Chou , Hsin-Jung Lo , Ke-Hung Chen
发明人： Mou-Shiung Lin , Huei-Mei Yen , Chiu-Ming Chou , Hsin-Jung Lo , Ke-Hung Chen
IPC分类号： H01L23/58
CPC分类号： H01L24/11 , H01L22/32 , H01L24/03 , H01L24/05 , H01L24/12 , H01L24/94 , H01L2224/02166 , H01L2224/0231 , H01L2224/03912 , H01L2224/0392 , H01L2224/0401 , H01L2224/05018 , H01L2224/05027 , H01L2224/05553 , H01L2224/05557 , H01L2224/05558 , H01L2224/05572 , H01L2224/0558 , H01L2224/05599 , H01L2224/05624 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/1147 , H01L2224/1191 , H01L2224/11912 , H01L2224/13021 , H01L2224/13022 , H01L2224/13024 , H01L2224/13099 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/16 , H01L2224/274 , H01L2924/00014 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/1305 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00
摘要： A semiconductor chip comprises a metal pad exposed by an opening in a passivation layer, wherein the metal pad has a testing area and a bond area. During a step of testing, a testing probe contacts with the testing area for electrical testing. After the step of testing, a polymer layer is formed on the testing area with a probe mark created by the testing probe. Alternatively, a semiconductor chip comprises a testing pad and a bond pad respectively exposed by two openings in a passivation layer, wherein the testing pad is connected to the bond pad. During a step of testing, a testing probe contacts with the testing pad for electrical testing. After the step of testing, a polymer layer is formed on the testing pad with a probe mark created by the testing probe.
摘要翻译： 半导体芯片包括由钝化层中的开口暴露的金属焊盘，其中金属焊盘具有测试区域和接合区域。 在测试步骤中，测试探头与测试区域接触进行电气测试。 在测试步骤之后，在测试区域上形成由测试探针产生的探针标记的聚合物层。 或者，半导体芯片包括分别由钝化层中的两个开口露出的测试焊盘和接合焊盘，其中测试焊盘连接到焊盘。 在测试步骤中，测试探针与测试垫接触进行电气测试。 在测试步骤之后，在测试垫上形成由测试探针产生的探针标记的聚合物层。
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公开(公告)号：US08399989B2
公开(公告)日：2013-03-19
申请号：US11461416
申请日：2006-07-31
申请人： Mou-Shiung Lin , Hsin-Jung Lo , Chiu-Ming Chou , Chien-Kang Chou , Ke-Hung Chen
发明人： Mou-Shiung Lin , Hsin-Jung Lo , Chiu-Ming Chou , Chien-Kang Chou , Ke-Hung Chen
CPC分类号： H01L24/12 , H01L23/3157 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/02166 , H01L2224/0231 , H01L2224/0345 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05006 , H01L2224/05022 , H01L2224/05139 , H01L2224/05147 , H01L2224/05155 , H01L2224/05567 , H01L2224/05568 , H01L2224/05572 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/05683 , H01L2224/1147 , H01L2224/11902 , H01L2224/11912 , H01L2224/13099 , H01L2224/45144 , H01L2224/48463 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/48664 , H01L2224/48669 , H01L2224/48673 , H01L2224/48683 , H01L2224/73204 , H01L2924/0002 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10329 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2224/05552
摘要： A circuitry component comprising a semiconductor substrate, a pad over said semiconductor substrate, a tantalum-containing layer on a side wall and a bottom surface of said pad, a passivation layer over said semiconductor substrate, an opening in said passivation layer exposing said pad, a titanium-containing layer over said pad exposed by said opening, and a gold layer over said titanium-containing layer.
摘要翻译： 一种电路部件，包括半导体衬底，所述半导体衬底上的衬垫，在侧壁上的含钽层和所述焊盘的底表面，所述半导体衬底上的钝化层，所述钝化层中的露出所述衬垫的开口， 由所述开口暴露在所述垫上的含钛层，以及在所述含钛层上方的金层。
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公开(公告)号：US08148822B2
公开(公告)日：2012-04-03
申请号：US11383762
申请日：2006-05-17
申请人： Mou-Shiung Lin , Hsin-Jung Lo , Chiu-Ming Chou , Chien-Kang Chou , Ke-Hung Chen
发明人： Mou-Shiung Lin , Hsin-Jung Lo , Chiu-Ming Chou , Chien-Kang Chou , Ke-Hung Chen
CPC分类号： H01L24/11 , H01L23/525 , H01L24/12 , H01L2224/0231 , H01L2224/0401 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05181 , H01L2224/05184 , H01L2224/05548 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/05666 , H01L2224/05671 , H01L2224/05672 , H01L2224/05681 , H01L2224/05684 , H01L2224/0603 , H01L2224/06102 , H01L2224/1147 , H01L2224/11902 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13164 , H01L2224/13169 , H01L2224/13173 , H01L2224/13176 , H01L2224/13183 , H01L2224/1403 , H01L2224/141 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01041 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/10329 , H01L2924/12043 , H01L2924/1305 , H01L2924/14 , H01L2924/15788 , H01L2924/19041 , H01L2924/30107 , H01L2924/00 , H01L2224/05552 , H01L2924/00014 , H01L2924/013
摘要： A bonding pad structure is fabricated on an integrated circuit (IC) substrate having at least a contact layer on its top surface. A passivation layer covers the top surface of the IC substrate and the contact layer. The passivation layer has an opening exposing a portion of the contact layer. An electrically conductive adhesion/barrier layer directly is bonded to the contact layer. The electrically conductive adhesion/barrier layer extends to a top surface of the passivation layer. A bonding metal layer is stacked on the electrically conductive adhesion/barrier layer.
摘要翻译： 在具有至少在其顶表面上的接触层的集成电路（IC）衬底上制造焊盘结构。 钝化层覆盖IC基板的顶表面和接触层。 钝化层具有露出接触层的一部分的开口。 导电性粘合/阻挡层直接接合到接触层。 导电粘合/阻挡层延伸到钝化层的顶表面。 接合金属层层叠在导电性粘接/阻挡层上。
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公开(公告)号：US20070026631A1
公开(公告)日：2007-02-01
申请号：US11461416
申请日：2006-07-31
申请人： Mou-Shiung Lin , Hsin-Jung Lo , Chiu-Ming Chou , Chien-Kang Chou , Ke-Hung Chen
发明人： Mou-Shiung Lin , Hsin-Jung Lo , Chiu-Ming Chou , Chien-Kang Chou , Ke-Hung Chen
IPC分类号： H01L21/76
CPC分类号： H01L24/12 , H01L23/3157 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/02166 , H01L2224/0231 , H01L2224/0345 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05006 , H01L2224/05022 , H01L2224/05139 , H01L2224/05147 , H01L2224/05155 , H01L2224/05567 , H01L2224/05568 , H01L2224/05572 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/05683 , H01L2224/1147 , H01L2224/11902 , H01L2224/11912 , H01L2224/13099 , H01L2224/45144 , H01L2224/48463 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/48664 , H01L2224/48669 , H01L2224/48673 , H01L2224/48683 , H01L2224/73204 , H01L2924/0002 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/10329 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2224/05552
摘要： A circuitry component comprising a semiconductor substrate, a pad over said semiconductor substrate, a tantalum-containing layer on a side wall and a bottom surface of said pad, a passivation layer over said semiconductor substrate, an opening in said passivation layer exposing said pad, a titanium-containing layer over said pad exposed by said opening, and a gold layer over said titanium-containing layer.
摘要翻译： 一种电路部件，包括半导体衬底，所述半导体衬底上的衬垫，在侧壁上的含钽层和所述焊盘的底表面，所述半导体衬底上的钝化层，所述钝化层中的露出所述衬垫的开口， 由所述开口暴露在所述垫上的含钛层，以及在所述含钛层上方的金层。
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公开(公告)号：US20070023919A1
公开(公告)日：2007-02-01
申请号：US11383762
申请日：2006-05-17
申请人： Mou-Shiung Lin , Hsin-Jung Lo , Chiu-Ming Chou , Chien-Kang Chou , Ke-Hung Chen
发明人： Mou-Shiung Lin , Hsin-Jung Lo , Chiu-Ming Chou , Chien-Kang Chou , Ke-Hung Chen
IPC分类号： H01L23/48
CPC分类号： H01L24/11 , H01L23/525 , H01L24/12 , H01L2224/0231 , H01L2224/0401 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05181 , H01L2224/05184 , H01L2224/05548 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/05666 , H01L2224/05671 , H01L2224/05672 , H01L2224/05681 , H01L2224/05684 , H01L2224/0603 , H01L2224/06102 , H01L2224/1147 , H01L2224/11902 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13164 , H01L2224/13169 , H01L2224/13173 , H01L2224/13176 , H01L2224/13183 , H01L2224/1403 , H01L2224/141 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01041 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/10329 , H01L2924/12043 , H01L2924/1305 , H01L2924/14 , H01L2924/15788 , H01L2924/19041 , H01L2924/30107 , H01L2924/00 , H01L2224/05552 , H01L2924/00014 , H01L2924/013
摘要： A bonding pad structure is fabricated on an integrated circuit (IC) substrate having at least a contact layer on its top surface. A passivation layer covers the top surface of the IC substrate and the contact layer. The passivation layer has an opening exposing a portion of the contact layer. An electrically conductive adhesion/barrier layer directly is bonded to the contact layer. The electrically conductive adhesion/barrier layer extends to a top surface of the passivation layer. A bonding metal layer is stacked on the electrically conductive adhesion/barrier layer.
摘要翻译： 在具有至少在其顶表面上的接触层的集成电路（IC）衬底上制造焊盘结构。 钝化层覆盖IC基板的顶表面和接触层。 钝化层具有露出接触层的一部分的开口。 导电性粘合/阻挡层直接接合到接触层。 导电粘合/阻挡层延伸到钝化层的顶表面。 接合金属层层叠在导电性粘接/阻挡层上。
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公开(公告)号：US20060291029A1
公开(公告)日：2006-12-28
申请号：US11430513
申请日：2006-05-08
申请人： Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
发明人： Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
IPC分类号： G02B26/08
CPC分类号： H01L23/5227 , H01L21/2885 , H01L21/563 , H01L21/76801 , H01L21/76885 , H01L23/3114 , H01L23/5223 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/83 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05173 , H01L2224/05176 , H01L2224/05183 , H01L2224/05548 , H01L2224/05571 , H01L2224/05572 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/05669 , H01L2224/1147 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2224/16 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/45164 , H01L2224/45169 , H01L2224/45173 , H01L2224/45176 , H01L2224/45183 , H01L2224/48091 , H01L2224/48463 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48664 , H01L2224/48669 , H01L2224/48839 , H01L2224/48844 , H01L2224/48847 , H01L2224/48864 , H01L2224/83101 , H01L2224/83192 , H01L2924/00011 , H01L2924/00014 , H01L2924/0002 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/351 , H01L2924/00 , H01L2224/48869 , H01L2224/83851 , H01L2224/05552 , H01L2224/05599
摘要： A post passivation rerouting support structure comprises a relatively thin support layer above the passivation layer to support the RDL, and a relatively thick support layer for fine pitch interconnects extending from the RDL and terminating as contact structures at the surface of the thick support layer, for a next level packaging structure. The thick support layer is planarized before defining the contact structures. The thick support layer may be formed after the conducting posts have been formed, or the thick support layer is formed before forming the conducting posts in vias formed in the thick support layer. An encapsulating layer may be provided above the thick support layer, which top surface is planarized before defining the contact structures. The encapsulating layer and the further support layer may be the same layer.
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10.发明授权Post passivation structure for a semiconductor device and packaging process for same 有权用于半导体器件的钝化结构及其封装工艺公开(公告)号：US08558383B2
公开(公告)日：2013-10-15
申请号：US12264271
申请日：2008-11-04
申请人： Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
发明人： Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
CPC分类号： H01L23/5227 , H01L21/2885 , H01L21/563 , H01L21/76801 , H01L21/76885 , H01L23/3114 , H01L23/5223 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/83 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05173 , H01L2224/05176 , H01L2224/05183 , H01L2224/05548 , H01L2224/05571 , H01L2224/05572 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/05669 , H01L2224/1147 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2224/16 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/45164 , H01L2224/45169 , H01L2224/45173 , H01L2224/45176 , H01L2224/45183 , H01L2224/48091 , H01L2224/48463 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48664 , H01L2224/48669 , H01L2224/48839 , H01L2224/48844 , H01L2224/48847 , H01L2224/48864 , H01L2224/83101 , H01L2224/83192 , H01L2924/00011 , H01L2924/00014 , H01L2924/0002 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/351 , H01L2924/00 , H01L2224/48869 , H01L2224/83851 , H01L2224/05552 , H01L2224/05599
摘要： A post passivation rerouting support structure comprises a relatively thin support layer above the passivation layer to support the RDL, and a relatively thick support layer for fine pitch interconnects extending from the RDL and terminating as contact structures at the surface of the thick support layer, for a next level packaging structure. The thick support layer is planarized before defining the contact structures. The thick support layer may be formed after the conducting posts have been formed, or the thick support layer is formed before forming the conducting posts in vias formed in the thick support layer. An encapsulating layer may be provided above the thick support layer, which top surface is planarized before defining the contact structures. The encapsulating layer and the further support layer may be the same layer.
摘要翻译： 后钝化重路由支持结构包括钝化层上方相对薄的支撑层以支撑RDL，以及用于从RDL延伸并作为接触结构终止于厚支撑层表面的细间距互连的相对较厚的支撑层，用于 下一级包装结构。 在限定接触结构之前，将厚支撑层平坦化。 可以在形成导电柱之后形成厚的支撑层，或者在形成在厚支撑层中的通孔中形成导电柱之前形成厚的支撑层。 可以在厚支撑层之上设置封装层，在限定接触结构之前该顶表面被平坦化。 封装层和另外的支撑层可以是相同的层。
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