摘要:
A probe card includes probes, a build-up interconnection layer having a multilayer interconnection structure therein and carrying the probes on a top surface in electrical connection with the multilayer interconnection structure, and a capacitor provided on the build-up interconnection layer in electrical connection with one of the probes via the multilayer interconnection structure, wherein the multilayer interconnection structure includes an inner via-contact in the vicinity of the probe and the capacitor is embedded in a resin insulation layer constituting the build-up layer.
摘要:
A semiconductor device comprises a carrier substrate, an integrated circuit chip mounted on the carrier substrate via bumps, and a capacitor provided to stabilize operation of the integrated circuit chip at high frequencies. In the semiconductor device, the capacitor is electrically connected to pads on bottom of the integrated circuit chip, and the capacitor is provided to have a height on the carrier substrate that is smaller than or equal to a height of the bumps on the carrier substrate.
摘要:
The plating method comprises the step of forming a resin layer 10 over a substrate 16; the step of cutting the surface part of the resin layer 10 with a cutting tool 12; the step of forming a seed layer 36 on the resin layer 10 by electroless plating; and the step of forming a plating film 44 on the seed layer 36 by electroplating. Suitable roughness can be give to the surface of the resin layer 10, whereby the adhesion between the seed layer 36 and the resin layer 10 can be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer 10 as are by desmearing treatment, whereby a micronized pattern of a photoresist film 40 can be formed on the resin layer 10. Thus, interconnections 44, etc. can be formed over the resin layer 10 at a narrow pitch with high reliability ensured.
摘要:
A capacitor device includes a capacitor Q constituted by a lower electrode (12) formed on a substrate (10), a dielectric film (14), and an upper electrode (16); an insulating film (18) covering the capacitor Q; a first contact hole (18a) formed in the insulating film (18) on a connection portion (16a) of the upper electrode (16); an electrode pad (20) for preventing a diffusion of solder, formed in the first contact hole (18a); and a solder bump (22) electrically connected to the electrode pad (20), and the upper electrode (16) has a protrusion portion (16a) protruding from the dielectric film (14), and is connected to the first contact hole (18a) on the protrusion portion (16a).
摘要:
The plating method comprises the step of forming a resin layer 10 over a substrate 16; the step of cutting the surface part of the resin layer 10 with a cutting tool 12; the step of forming a seed layer 36 on the resin layer 10 by electroless plating; and the step of forming a plating film 44 on the seed layer 36 by electroplating. Suitable roughness can be give to the surface of the resin layer 10, whereby the adhesion between the seed layer 36 and the resin layer 10 can be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer 10, as are by desmearing treatment, whereby a micronized pattern of a photoresist film 40 can be formed on the resin layer 10. Thus, interconnections 44, etc. can be formed over the resin layer 10 at a narrow pitch with high reliability ensured.
摘要:
The plating method comprises the step of forming a resin layer 10 over a substrate 16; the step of cutting the surface part of the resin layer 10 with a cutting tool 12; the step of forming a seed layer 36 on the resin layer 10 by electroless plating; and the step of forming a plating film 44 on the seed layer 36 by electroplating. Suitable roughness can be give to the surface of the resin layer 10, whereby the adhesion between the seed layer 36 and the resin layer 10 can be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer 10, as are by desmearing treatment, whereby a micronized pattern of a photoresist film 40 can be formed on the resin layer 10. Thus, interconnections 44, etc. can be formed over the resin layer 10 at a narrow pitch with high reliability ensured.
摘要:
A capacitive element is characterized by including: a base (12); a lower barrier layer (13) formed on the base (12); capacitors (Q1 and Q2) made by forming a lower electrode (14a), capacitor dielectric layers (15a), and upper electrodes (16a) in this order on the lower barrier layer (13); and an upper barrier layer (20) covering at least the capacitor dielectric layers (15a) and the lower barrier layer (13).
摘要:
A thin film capacitor comprising a top electrode, a bottom electrode, and a dielectric film held between the top and bottom electrodes. The dielectric film is composed of at least cations Ba, Sr, and Ti and anion O. The concentration of Sr, Ti, and O ions are uniform along the growth direction of the dielectric film while the concentration of the Ba cation is non-uniform along the growth direction such that a reduced Ba-I region in which the average concentration of perovskite type Ba cations (Ba-I) is less than the average concentration of non-perovskite type Ba cations (Ba-II) exists at or near the boundary between at least one of the top and bottom electrodes, with ratio R=(atm % Ba-I)/[(atm % Ba-I)+(atm % Ba-II)] within a range of 0.1
摘要:
A thin film capacitor comprising a top electrode, a bottom electrode, and a dielectric film held between the top and bottom electrodes. The dielectric film is composed of at least cations Ba, Sr, and Ti and anion O. The concentration of Sr, Ti, and O ions are uniform along the growth direction of the dielectric film while the concentration of the Ba cation is non-uniform along the growth direction such that a reduced Ba-I region in which the average concentration of perovskite type Ba cations (Ba-I) is less than the average concentration of non-perovskite type Ba cations (Ba-II) exists at or near the boundary between at least one of the top and bottom electrodes, with ratio R=(atm % Ba-I)/[(atm % Ba-I)+(atm % Ba-II)] within a range of 0.1
摘要:
A capacitive element which includes: a silicon substrate (base material) 1; a base insulating film 2 formed on the silicon substrate 1; and a capacitor Q constituted by forming a bottom electrode 4a, a capacitor dielectric film 5a and a top electrode 6a on the base insulating film 2. The capacitive element is characterized in that the capacitor dielectric film 5a is composed of a material with the formula (Ba1−y,Sry)mYpTiQO3+δ, where 0