公开(公告)号：US06645606B2

公开(公告)日：2003-11-11

申请号：US10120527

申请日：2002-04-12

申请人： Tetsuo Nakano ,  Yukihiro Maeda ,  Yasutomi Asai ,  Takashi Nagasaka

发明人： Tetsuo Nakano ,  Yukihiro Maeda ,  Yasutomi Asai ,  Takashi Nagasaka

IPC分类号： B32B1500

CPC分类号： H05K3/244 ,  H01L23/49811 ,  H01L23/538 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05147 ,  H01L2224/05599 ,  H01L2224/05644 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48699 ,  H01L2224/48747 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K3/245 ,  H05K3/328 ,  Y10T428/12493 ,  Y10T428/12514 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48744

摘要： A substrate has a first surface and a second surface. A plurality of pads is formed on the first surfaces. Each pads has a Cu plating layer and an Au plating layer that is directly formed on the Cu plating layer. Al wiring or Au wiring is bonded with the pads. The thickness of the Au plating layer that is bonded with the Al wiring is less than 0.5 &mgr;m. Thickness of the Au plating layer that is bonded with the Au wiring is 0.05 &mgr;m or more.

公开(公告)号：US06376906B1

公开(公告)日：2002-04-23

申请号：US09021989

申请日：1998-02-11

申请人： Yasutomi Asai ,  Shinji Ota ,  Takashi Nagasaka

发明人： Yasutomi Asai ,  Shinji Ota ,  Takashi Nagasaka

IPC分类号： H01L2304

CPC分类号： H01L23/49838 ,  H01L23/49822 ,  H01L24/28 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48699 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85385 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15192 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

摘要： In a mounting structure of a flip chip IC, the flip chip IC is mounted on an alumina laminated substrate through conductive lands of the substrate and bumps of the flip chip IC. A space between the flip chip IC and the substrate is filled with resin. Further, inspection lands are provided on the substrate for inspecting the flip chip IC, and are electrically connected to the conductive lands through vias and inside wires provided in the substrate. That is, the inspection lands are connected to the conductive lands to bypath an edge portion of the resin. As a result, separation of the resin from the substrate can be prevented.

摘要翻译： 在倒装芯片IC的安装结构中，倒装芯片IC通过衬底的导电焊盘和倒装芯片IC的凸块安装在氧化铝层压衬底上。 倒装芯片IC和基板之间的空间填充有树脂。 此外，在基板上设置检查台以检查倒装芯片IC，并且通过设置在基板中的通孔和内部电线电连接到导电焊盘。 也就是说，检查台面与树脂的边缘部分连接到导电焊盘。 结果，可以防止树脂与基板分离。

公开(公告)号：US06217990B1

公开(公告)日：2001-04-17

申请号：US09073139

申请日：1998-05-06

申请人： Yasutomi Asai ,  Takashi Nagasaka ,  Shinji Ota ,  Takashi Yamazaki ,  Shinya Terao ,  Syoichi Nakagawa

发明人： Yasutomi Asai ,  Takashi Nagasaka ,  Shinji Ota ,  Takashi Yamazaki ,  Shinya Terao ,  Syoichi Nakagawa

IPC分类号： B32B300

CPC分类号： H05K1/0271 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/09701 ,  H01L2924/15192 ,  H05K1/0306 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09781 ,  H05K2201/10674 ,  Y10T428/24926

摘要： A multilayer circuit board for holding a flip chip thereon includes laminated first to fourth substrates. A first pattern integrated portion having a locally high pattern density is provided on the second substrate. Further, on the fourth substrate which is disposed on an opposite side of the second substrate with respect to a center in a laminated direction of the circuit board, a second pattern integrated portion having a locally high pattern density is disposed to correspond to the first pattern integrated portion. Accordingly, a local warp can be prevented from being produced on the mounting surface of the multilayer circuit board when the circuit board is manufactured by baking.

摘要翻译： 用于保持倒装芯片的多层电路板包括层叠的第一至第四基板。 具有局部高图案密度的第一图案集成部分设置在第二基板上。 此外，在相对于电路板的层叠方向的中心设置在第二基板的相对侧的第四基板上，具有局部高图案密度的第二图案一体化部分设置成对应于第一图案 集成部分。 因此，当通过烘烤制造电路板时，可以防止在多层电路板的安装表面上产生局部翘曲。

公开(公告)号：US6048424A

公开(公告)日：2000-04-11

申请号：US4924

申请日：1998-01-09

申请人： Yasutomi Asai ,  Takashi Nagasaka ,  Kenichi Gohara ,  Takashi Yamasaki ,  Yoshiaki Shimojo

发明人： Yasutomi Asai ,  Takashi Nagasaka ,  Kenichi Gohara ,  Takashi Yamasaki ,  Yoshiaki Shimojo

IPC分类号： H05K1/03 ,  H01L21/48 ,  H01L23/12 ,  H05K3/46 ,  B32B31/26

CPC分类号： H05K3/4629 ,  H01L21/4857 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K2201/10378 ,  H05K3/462 ,  Y10T156/1056 ,  Y10T29/49163

摘要： Via portions are formed in a first green sheet for a first layer of a laminated substrate. Then, conductive lands are formed on a surface of the first green sheet and a wiring pattern is formed on a back face of the first green sheet to be connected to the conductive lands through the via portions. The thus formed first green sheet is joined to a second green sheet having via portions therein so that the wiring pattern of the first green sheet contacts the via portions of the second green sheet. In this case, by forming the wiring pattern on the back face of the first green sheet, lamination slippage of the wiring pattern caused by lamination of the first and second green sheets can be prevented.

摘要翻译： 通过部分形成在层压基板的第一层的第一生片中。 然后，在第一生片的表面上形成导电焊盘，并且在第一生片的背面上形成布线图案，以通过通孔部分连接到导电焊盘。 如此形成的第一生片与其中具有通孔部分的第二生片接合，使得第一生片的布线图案接触第二生片的通孔部分。 在这种情况下，通过在第一生片的背面上形成布线图案，可以防止由第一和第二生片的叠层引起的布线图案的层叠滑动。

公开(公告)号：US5731067A

公开(公告)日：1998-03-24

申请号：US663029

申请日：1996-06-07

申请人： Yasutomi Asai ,  Takashi Nagasaka

发明人： Yasutomi Asai ,  Takashi Nagasaka

IPC分类号： H01L23/367 ,  H01L23/373 ,  H05K1/00 ,  H05K1/02 ,  H05K1/03 ,  H05K3/40 ,  H05K3/46 ,  H05K7/20 ,  B32B3/00

CPC分类号： H05K1/0207 ,  H01L23/3677 ,  H01L23/3736 ,  H01L2224/32188 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/15192 ,  H01L2924/15312 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/0201 ,  H05K1/0206 ,  H05K1/0298 ,  H05K1/0306 ,  H05K2201/0209 ,  H05K2203/049 ,  H05K3/4053 ,  H05K3/4629 ,  H05K3/4641 ,  Y10S428/901 ,  Y10T428/24926

摘要： A multi-layered substrate capable of lowering transient and steady heat resistances. A metal serving as a heat conductor having good heat conducting property is fitted in the uppermost insulating layer, and a power element is disposed on the fitted metal. The heat generated by the power element is conducted to the metal in the uppermost insulating layer and is radiated. The metal can be composed of a mixture of molybdenum particles or tungsten particle having a high melting point and aluminum particles.

摘要翻译： 能够降低瞬态和稳定耐热性的多层基板。 作为具有良好导热性的导热体的金属装配在最上层的绝缘层中，并且功能元件设置在配合的金属上。 由功率元件产生的热量被传导到最上层绝缘层中的金属并被辐射。 金属可以由具有高熔点的钼颗粒或钨颗粒和铝颗粒的混合物组成。

公开(公告)号：US06326239B1

公开(公告)日：2001-12-04

申请号：US09287016

申请日：1999-04-06

申请人： Yasutomi Asai ,  Hirokazu Imai ,  Yuji Ootani ,  Takashi Nagasaka

发明人： Yasutomi Asai ,  Hirokazu Imai ,  Yuji Ootani ,  Takashi Nagasaka

IPC分类号： H01L2328

CPC分类号： H01L23/544 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/16225 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/81801 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K1/0306 ,  H05K1/111 ,  H05K3/245 ,  H05K3/305 ,  H05K3/321 ,  H05K3/3436 ,  H05K2201/09427 ,  H05K2201/09663 ,  H05K2201/099 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2201/10992 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929

摘要： A mounting structure includes a laminated ceramic capacitor mounted on a mounting substrate. The laminated ceramic capacitor includes a main body chip made by a ceramic dielectric, internal layer electrodes, and pair of terminal electrodes. The mounting substrate is made by alumina substrate, and has a pair of substrate electrodes made by copper plating. The laminated ceramic capacitor is mounted on the mounting substrate by using an Ag paste. Here, the substrate electrode is set to be smaller than the Ag paste. That is, the Ag paste is extruded from the terminal electrodes and the substrate electrode so as to contact to both of the main body chip and the mounting substrate. Because the Ag paste has a high adhesive strength compared to that when it is bonded with a metal, total adhesive strength can be improved. Consequently, the reliability of mounting can be improved.

摘要翻译： 安装结构包括安装在安装基板上的层叠陶瓷电容器。 层叠陶瓷电容器包括由陶瓷电介质制成的主体芯片，内层电极和一对端子电极。 安装基板由氧化铝基板制成，并具有通过镀铜制成的一对基板电极。 层叠陶瓷电容器通过使用Ag浆料安装在安装基板上。 这里，将基板电极设定为小于Ag糊料。 也就是说，Ag膏从端子电极和基板电极挤出，以便与主体芯片和安装基板接触。 由于Ag糊料与金属粘合时的粘合强度高，所以可以提高总的粘合强度。 因此，可以提高安装的可靠性。

公开(公告)号：USD605662S1

公开(公告)日：2009-12-08

申请号：US29300312

申请日：2008-03-11

申请人： Hideki Miura ,  Takashi Nagasaka

设计人： Hideki Miura ,  Takashi Nagasaka

公开(公告)号：US06731001B2

公开(公告)日：2004-05-04

申请号：US09918803

申请日：2001-08-01

申请人： Kan Kinouchi ,  Mitsuhiro Saitou ,  Takashi Nagasaka ,  Yuji Ootani ,  Hiroyuki Yamakawa ,  Koji Takeuchi ,  Hirokazu Imai ,  Yukihiro Maeda ,  Atsushi Kanamori

发明人： Kan Kinouchi ,  Mitsuhiro Saitou ,  Takashi Nagasaka ,  Yuji Ootani ,  Hiroyuki Yamakawa ,  Koji Takeuchi ,  Hirokazu Imai ,  Yukihiro Maeda ,  Atsushi Kanamori

IPC分类号： H01L2352

CPC分类号： H01L23/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19105 ,  H01L2924/20753 ,  H01L2924/2076 ,  H05K1/0306 ,  H05K1/141 ,  H05K3/284 ,  H05K3/366 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/92247 ,  H01L2924/00

摘要： Several electronic parts are mounted on several ceramic substrates in a semiconductor device, and are wire bonded to the respective ceramic substrates through bonding wires. The electronic parts and the bonding wires are covered with an enclosing member on every ceramic substrate, and an inside of the enclosing member is filled with silicone gel for sealing. The ceramic substrates are bonded to a radiation fin together, and are mounted on a motherboard perpendicularly to the motherboard.

摘要翻译： 几个电子部件安装在半导体器件中的多个陶瓷基板上，并且通过接合线引线接合到相应的陶瓷基板。 电子部件和接合线在每个陶瓷基板上被封闭构件覆盖，并且封装构件的内部填充有用于密封的硅凝胶。 陶瓷基板一起结合到散热片上，并垂直于母板安装在母板上。

公开(公告)号：US6142363A

公开(公告)日：2000-11-07

申请号：US290580

申请日：1999-04-13

申请人： Akira Tanahashi ,  Norihisa Imaizumi ,  Yuzi Otani ,  Takashi Nagasaka

发明人： Akira Tanahashi ,  Norihisa Imaizumi ,  Yuzi Otani ,  Takashi Nagasaka

IPC分类号： B23K35/02 ,  B23K35/36 ,  B23K31/02

CPC分类号： B23K35/3612 ,  B23K35/025 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/19105

摘要： Provided are a soldering flux or paste containing an organic substance which has at least two hydroxyl (--OH) groups in a molecule and of which the temperature at which the mass % becomes approximately 0% is not lower than approximately 170.degree. C. and not lower than the solid phase linear temperature of the solder, as measured by thermal gravimetry in which a flow rate of an air or nitrogen (N.sub.2) gas atmosphere is 200 ml/min and a rate of temperature rise is 10.degree. C./min, and a soldering method using the same. The soldering flux or paste of the present invention gives good wettability to a matrix to be bonded in a normal temperature profile and in a non-reductive atmosphere without leaving any residue.

摘要翻译： 提供了含有分子中具有至少两个羟基（-OH）基团并且质量％变为约0％的温度不低于约170℃的有机物质的焊剂或糊剂，而不是 低于焊料的固相线性温度，通过热重量法测定，其中空气或氮气（N 2）气体气体的流量为200ml / min，升温速率为10℃/ min， 和使用其的焊接方法。 本发明的助焊剂或糊剂对在正常温度曲线和非还原性气氛中键合的基质赋予良好的润湿性，而不留下任何残留物。

公开(公告)号：US5754093A

公开(公告)日：1998-05-19

申请号：US638145

申请日：1996-04-26

申请人： Shinji Ota ,  Takashi Nagasaka

发明人： Shinji Ota ,  Takashi Nagasaka

IPC分类号： H05K1/16 ,  H01C7/00 ,  H01C17/06 ,  H01C17/065 ,  H01L27/01 ,  H01C10/12

CPC分类号： H01C7/003 ,  H01C17/06566 ,  H01L27/013

摘要： A thick-film resistor in a thick-film printed substrate, the resistance of which is maintained at an appropriate value, is disclosed. In a thick-film printed substrate formed by printing a thick-film conductor and a resistor of lanthanum boride type on a ceramic substrate and then sintering, an intermediate resistor layer of lanthanum boride type is provided between the thick-film conductor and the resistor of lanthanum boride type. Reaction of glass composition contained in the thick-film conductor is suppressed, and resistance abnormality is prevented during sintering by causing the intermediate resistor layer of lanthanum boride type to be interposed.

摘要翻译： 公开了一种厚膜印刷基板中的厚膜电阻器，其电阻保持在适当的值。 在通过在陶瓷基板上印刷厚膜导体和硼化镧电阻器然后烧结而形成的厚膜印刷基板中，在厚膜导体和电阻器的电阻器之间设置硼化镧型中间电阻层 硼化镧型。 抑制包含在厚膜导体中的玻璃组合物的反应，并且通过使硼化镧型中间电阻层插入而在烧结期间阻止电阻异常。