公开(公告)号：US20140284754A1

公开(公告)日：2014-09-25

申请号：US14349901

申请日：2012-10-16

申请人： ROHM CO., LTD.

发明人： Hiroki Yamamoto

IPC分类号： H01L29/417 ,  H01L29/861

CPC分类号： H01L29/872 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/5223 ,  H01L23/5228 ,  H01L23/544 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L27/0255 ,  H01L27/0629 ,  H01L27/067 ,  H01L27/0722 ,  H01L27/1021 ,  H01L28/10 ,  H01L28/20 ,  H01L28/24 ,  H01L28/40 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/417 ,  H01L29/66136 ,  H01L29/861 ,  H01L29/8611 ,  H01L29/866 ,  H01L2223/54413 ,  H01L2223/54433 ,  H01L2223/54473 ,  H01L2223/54493 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05144 ,  H01L2224/05553 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/06181 ,  H01L2224/11009 ,  H01L2224/11464 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/85205 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： [Theme] To provide a chip diode, with which a p-n junction formed on a semiconductor layer can be prevented from being destroyed and fluctuations in characteristics can be suppressed even when a large stress is applied to a pad for electrical connection with the exterior, and a diode package that includes the chip diode.[Solution] A chip diode 15 includes an epitaxial layer 21 with a p-n junction 28, constituting a diode element 29, formed therein, an anode electrode 34 disposed along a top surface 22 of the epitaxial layer 21, electrically connected to a diode impurity region 23, which is the p-side pole of the p-n junction 28, and having a pad 37 for electrical connection with the exterior, and a cathode electrode 41 electrically connected to the epitaxial layer 21, which is the n-side pole of the p-n junction 28, and the pad 37 is provided at a position separated from a position directly above the p-n junction 28.

摘要翻译： [主题]提供一种芯片二极管，可以防止在半导体层上形成的pn结被破坏，并且即使当大的应力施加到与外部电连接的焊盘时也可以抑制特性波动，并且 包括芯片二极管的二极管封装。 芯片二极管15包括形成有二极管元件29的pn结28的外延层21，沿着外延层21的顶表面22设置的阳极电极34，电极连接到二极管杂质区 23是pn接点28的p侧极，并且具有用于与外部电连接的焊盘37，以及与外延层21电连接的阴极41，该外延层21是pn的n侧极 接头28，并且垫37设置在与正好在pn结28上方的位置分离的位置。

公开(公告)号：US20150243412A1

公开(公告)日：2015-08-27

申请号：US14431771

申请日：2013-08-07

申请人： ROHM CO., LTD.

发明人： Yasuhiro Kondo ,  Katsuya Matsuura

IPC分类号： H01C1/012 ,  H01G2/06 ,  H01C17/06 ,  H01G4/228 ,  H01G5/01 ,  H01C1/14 ,  H01G4/008

CPC分类号： H01C1/012 ,  H01C1/14 ,  H01C1/16 ,  H01C7/003 ,  H01C17/06 ,  H01G2/065 ,  H01G4/008 ,  H01G4/012 ,  H01G4/228 ,  H01G4/30 ,  H01G4/40 ,  H01G5/01 ,  H05K1/181

摘要： A chip part according to the present invention includes a substrate having a front surface and a side surface, an electrode integrally formed on the front surface and the side surface so as to cover an edge portion of the front surface of the substrate, and an insulating film interposed between the electrode and the substrate. A circuit assembly according to the present invention includes the chip part according to the present invention and a mounting substrate having a land, bonded by solder to the electrode, on a mounting surface facing the front surface of the substrate.

摘要翻译： 根据本发明的芯片部件包括具有前表面和侧表面的基板，一体地形成在前表面和侧表面上以覆盖基板的前表面的边缘部分的电极和绝缘体 介于电极和基板之间的膜。 根据本发明的电路组件包括根据本发明的芯片部件和安装基板，该安装基板具有在与基板的前表面相对的安装表面上的焊料与电极接合的焊盘。

公开(公告)号：US20240361195A1

公开(公告)日：2024-10-31

申请号：US18642297

申请日：2024-04-22

申请人： ROHM CO., LTD.

发明人： Masahiro SAKURAGI

IPC分类号： G01L9/00

CPC分类号： G01L9/0045 ,  G01L9/0044 ,  G01L9/0051

摘要： A sensor includes a substrate. A cavity is formed in the substrate. The substrate includes a membrane spaced from and facing a bottom surface of the cavity. A plurality of protruding portions are formed on one of the bottom surface of the cavity and an inner surface of the membrane.

公开(公告)号：US20240356439A1

公开(公告)日：2024-10-24

申请号：US18635142

申请日：2024-04-15

申请人： ROHM CO., LTD.

发明人： Kiyoshi KANSAKU

IPC分类号： H02M3/156 ,  H03K3/037

CPC分类号： H02M3/156 ,  H03K3/037

摘要： A power-supply control apparatus includes a controller that is configured to perform duty control on a switch device which forms an output stage of a switched-mode power supply which is configured to generate an output voltage from an input voltage. The controller has an OFF-skip function to skip cyclic OFF transitions of the switch device. The controller keeps the switch device turned ON by ignoring a reset signal based on feedback control on the output voltage under a state in which the OFF-skip function is implemented.

公开(公告)号：US20240355892A1

公开(公告)日：2024-10-24

申请号：US18763081

申请日：2024-07-03

申请人： ROHM CO., LTD.

发明人： Yasunobu HAYASHI

IPC分类号： H01L29/423 ,  H01L21/28 ,  H01L29/40 ,  H01L29/51

CPC分类号： H01L29/4234 ,  H01L29/408 ,  H01L29/51 ,  H01L29/40117

摘要： A semiconductor device includes a planar gate structure including a gate insulating film and a gate electrode, and a sidewall structure disposed adjacent to a lateral side of the planar gate structure. The sidewall structure includes a first insulating film and a second insulating film, and a charge storage film disposed between the first insulating film and the second insulating film. The first insulating film is adjacent to the planar gate structure. A ratio between a gate length L of the planar gate structure and a width WS of the sidewall structure is less than or equal to 300/75. Thereby, a semiconductor device having an improved data read and write reliability in a memory structure can be provided.

公开(公告)号：US20240355889A1

公开(公告)日：2024-10-24

申请号：US18761637

申请日：2024-07-02

申请人： ROHM CO., LTD.

发明人： Junya FUKUNISHI

IPC分类号： H01L29/40 ,  H01L29/06 ,  H01L29/417 ,  H01L29/78

CPC分类号： H01L29/407 ,  H01L29/0696 ,  H01L29/41741 ,  H01L29/7813

摘要： A semiconductor device includes: a semiconductor layer; a gate trench formed in the semiconductor layer, the gate trench extending in a first direction in plan view; an insulation layer formed on the semiconductor layer; a field plate electrode arranged in the gate trench and having a width in the second direction; and a gate electrode arranged in the gate trench and separated from the field plate electrode by the insulation layer. The gate trench includes a first region in which the gate electrode is located above the field plate electrode in a depth-wise direction of the gate trench, and a second region including an end of the gate trench in the first direction. The field plate electrode in the second region includes a widened portion having a width that is greater than a width of the field plate electrode in the first region.

公开(公告)号：US20240355886A1

公开(公告)日：2024-10-24

申请号：US18760960

申请日：2024-07-01

申请人： ROHM CO., LTD.

发明人： Yasuhiro KAWAKAMI

IPC分类号： H01L29/16 ,  H01L21/04 ,  H01L29/417 ,  H01L29/47 ,  H01L29/66 ,  H01L29/872

CPC分类号： H01L29/1608 ,  H01L21/0495 ,  H01L29/417 ,  H01L29/47 ,  H01L29/66143 ,  H01L29/872 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05552 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05666 ,  H01L2224/0568 ,  H01L2224/06181 ,  H01L2924/10272 ,  H01L2924/12032 ,  H01L2924/351

摘要： A semiconductor device according to the present invention includes a first conductive-type Sic semiconductor layer, and a Schottky metal, comprising molybdenum and having a thickness of 10 nm to 150 nm, that contacts the surface of the SiC semiconductor layer. The junction of the SiC semiconductor layer to the Schottky metal has a planar structure, or a structure with recesses and protrusions of equal to or less than 5 nm.

公开(公告)号：US12125882B2

公开(公告)日：2024-10-22

申请号：US17598028

申请日：2020-04-14

申请人： ROHM CO., LTD.

发明人： Toshio Nagata

IPC分类号： H01L29/16 ,  H01L21/04 ,  H01L23/00 ,  H01L23/49 ,  H01L29/66

CPC分类号： H01L29/1608 ,  H01L21/0485 ,  H01L23/49 ,  H01L24/05 ,  H01L29/66068 ,  H01L2224/05124 ,  H01L2224/85801 ,  H01L2924/10272

摘要： An SiC semiconductor device includes an SiC chip having a first main surface at one side and a second main surface at another side, a first main surface electrode including a first Al layer and formed on the first main surface, a pad electrode formed on the first main surface electrode and to be connected to a lead wire, and a second main surface electrode including a second Al layer and formed on the second main surface.

公开(公告)号：US12119813B2

公开(公告)日：2024-10-15

申请号：US18047441

申请日：2022-10-18

申请人： ROHM Co., LTD.

发明人： Tetsuo Yamato ,  Shuntaro Takahashi ,  Kazuki Okuyama

IPC分类号： H03K17/687 ,  H01H47/00 ,  H01H47/04 ,  H01H47/32

CPC分类号： H03K17/687 ,  H03K2217/0063 ,  H03K2217/0072

摘要： Disclosed is a switch device including a first terminal, a second terminal, a third terminal, a switch element disposed between the first terminal and the second terminal, a control line that reaches a control end of the switch element from the third terminal, a first circuit block that is disposed on the control line and is configured to drive the switch element according to a control signal supplied to the third terminal, at least one second circuit block, each second circuit block being connected to a corresponding one of branch power supply lines that branch from the control line, a first resistor disposed between the third terminal and the first circuit block, and at least one second resistor, each second resistor being disposed on a corresponding one of the branch power supply lines.

公开(公告)号：US20240340021A1

公开(公告)日：2024-10-10

申请号：US18746648

申请日：2024-06-18

申请人： ROHM CO., LTD.

发明人： Haruaki NAKAMURA

IPC分类号： H03M1/46 ,  H03M1/06

CPC分类号： H03M1/462 ,  H03M1/0675

摘要： A successive approximation register A/D converter (SARADC) has redundancy. An analog unit samples an analog input voltage and generates a comparison signal indicating a magnitude relationship between a threshold voltage corresponding to a control code and the analog input voltage. A logic unit generates, in an i-th (i≥1) cycle, a first value obtained by adding a weight of an (i+1)-th cycle to a control code of the i-th cycle and a second value obtained by subtracting the weight of the (i+1)-th cycle from the control code of the i-th cycle. When a comparison signal of the cycle is determined, the logic unit supplies one of the first value and the second value corresponding to the comparison signal to the analog unit 110 as a control code of the (i+1)-th cycle.