Abstract:
The aim of the invention is to securely fasten wired components having a great mass or an unequal mass distribution to a printed circuit board (60) without gluing the components to the printed board or retaining the same on the printed board by means of snap-in fixtures, as is commonly done. Said aim is achieved by integrating a holding device (65) for retaining a connecting wire or pin (111) of an electronic component (110) in a connecting bore (11) used for accommodating said connecting wire or pin (111). The holding device (65) represents a constriction in the connecting bore (11) to a diameter that is smaller than the diameter of the connecting wire or pin (111). The holding device (65) can be formed by a connecting bore (11) that is configured as a one-sided bore (16) which does not entirely penetrate the printed board (60), for example. In this case, one edge remains in place as a constriction (65) which clamps the connecting pin (111) of the respective component (110) and retains said component on the printed board.
Abstract:
A multi-layer wiring substrate comprises: a plurality of wiring substrates, each of the substrates comprising a plate or sheet-like insulating layer and a wiring layer formed on only one of surfaces of the insulating layer; the plurality of wiring substrates being laminated in such a manner that the insulating layer and wiring layer are alternately arranged; at least a pair of said wiring layers arranged on respective surfaces of the insulating layer being electrically connected with each other by means of connecting portions formed so as to pass through the insulating layer; and the connecting portion comprises a part of the wiring layer which is extended into a region of an opening formed so as to pass through said insulating layer and a low-melting point metal disposed in the opening and electrically connecting the part of the wiring layer with a wiring substrate formed on an adjacent insulating layer of the laminated structure.
Abstract:
A circuit board layer (2) in accordance with the present invention includes a conductive sheet (4) sandwiched between an insulating top layer (10) and an insulating bottom layer (14). The top and bottom layers (10) and (14) and the conductive sheet (4) define the circuit board layer (2) having an edge that includes an edge (20) of the conductive sheet (4). An insulating edge layer (18) covers substantially all of the edge (20) of the conductive sheet (4).
Abstract:
Es wird eine Schaltungsanordnung vorgeschlagen, die sich zum einen sehr kompakt realisieren lässt und zum anderen Schwingungsbelastungen sehr gut standhält. Die Schaltungsanordnung ist zumindest teilweise auf einer ersten Leiterplatte (4) realisiert und umfasst mindestens ein bedrahtetes Bauelement (14, 15). Das bedrahtete Bauelement (14, 15) ist erfindungsgemäß auf einem eigenen Bauelementeträger (5) angeordnet. Außerdem sind die erste Leiterplatte (4) und der Bauelementeträger (5) übereinander angeordnet und mechanisch miteinander verbunden.
Abstract:
To mount a TSOP (1) on an interposer substrate (2), leads (7) provided to the TSOP (1) are joined to pads of the interposer substrate (2) by a thermosetting conductive resin (5), and the TSOP (1) exclusive of the leads (7) is joined to ground layers formed in the interposer substrate (2) by a thermosetting conductive resin (4). The interposer substrates (2) with the TSOPs (1) mounted thereon are stacked in eight layers in such a manner that the TSOPs (1) face downward. Then, leads (8) of the upper interposer substrate (2) are joined to pads formed in the rear face of the lower interposer substrate (2) by a thermosetting conductive resin (6), so that the interposer substrates (2) adjacent in a vertical direction are connected.
Abstract:
The invention relates to the manufacturing of a multilayer structure and especially it relates to the manufacturing of a three-dimensional structure and its use as an electronics assembly substrate and as a winding for transformers and inductors. When a multilayer structure is manufactured by folding a conductor-insulator-conductor laminate, where the conductor layers to be separated from each other follow each other on opposite sides of the conductor-insulator-conductor laminate in the sections following each other and where the insulator has been removed from the places where the conductor layers are to be connected together after folding, it is possible to manufacture a wide range of three-dimensional multilayer structures where the volume occupied by the windings over the total volume can be maximized. Alternatively, by using the method it is also possible to manufacture a multilayer structure where components have been buried inside. The method makes it also possible to make connections between layers in a flexible manner. Among other issues, the method can be easily automated for mass-production.
Abstract:
Resilient contact structures (430) are mounted directly to bond pads (410) on semiconductor dies (402a, 402b), prior to the dies (402a, 402b) being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies (402a, 402b) to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies (702, 704) with a circuit board (710) or the like having a plurality of terminals (712) disposed on a surface thereof. Subsequently, the semiconductor dies (402a, 402b) may be singulated from the semiconductor wafer, whereupon the same resilient contact structures (430) can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements (430) of the present invention as the resilient contact structures, burn-in (792) can be performed at temperatures of at least 150 °C, and can be completed in less than 60 minutes.
Abstract:
The probe card assembly (500) includes a probe card (502), and a space transformer (506) having resilient contact structures (524) mounted to and extending from terminals (522) on its surface. An interposer (504) is disposed between the space transformer and the probe card. The space transformer and interposer are stacked on the probe card and the resilient contact structures can be arranged to optimise probing of entire wafer.