公开(公告)号：EP0198053A4

公开(公告)日：1988-02-08

申请号：EP85905366

申请日：1985-10-11

Applicant: IMPEY JOHN ,  METTLER ROLLIN W JUN ,  METTLER JOHN H

Inventor： IMPEY JOHN

IPC: H05K1/00 ,  H05K1/11 ,  H05K3/32 ,  H05K3/42 ,  H05K3/46 ,  H05K1/14

CPC classification number: H05K3/462 ,  H05K1/0284 ,  H05K1/119 ,  H05K3/326 ,  H05K3/42 ,  H05K3/4623 ,  H05K2201/09045 ,  H05K2201/09118 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/1059 ,  H05K2203/063 ,  Y10T29/49126 ,  Y10T29/49158

Abstract: A multi-layer circuit board comprised of two or more circuit board substrates (10, 12) shaped by injection molding with mating interconnecting pins (22) and holes (24) and banded together with an electrically insulated adhesive material (28). Circuit leads (14, 16, 18, 20) are provided on both sides of each substrate recessed into channels (85) formed in the surface of the substrate during the molding process. Electrical interconnection of the layers of circuitry occurs where the conductive materials of the circuit leads (14, 16) passes down through component lead holes (26) axially located in the interconnecting pins (22) and around the exterior of the interconnecting pins where contact is made with the conductive material coating on the interior of the interconnecting holes (24). A method of making the multi-layer board includes injection molding the substrates (10, 12) in a suitable shaped mold (74, 76) plating substantially all of the surface of the substrates with the conductive material (82) masking with a plating resist (84), plating again with conductive material (88), removing the plating resist and flash-etching to remove the conductive material (82) initially plated and masked by the plating resist (84) so as to define the circuit leads (14, 16, 18, 20). The preferred method uses a roller to apply the plating resist to some surfaces of the substrates.

公开(公告)号：EP0136332A1

公开(公告)日：1985-04-10

申请号：EP84901047.0

申请日：1984-02-15

Applicant: NCR CORPORATION

Inventor： WIRTH, Robert, L. ,  WEEKS, David, E. ,  REECE, John, W.

IPC: B41J2 ,  H01F7 ,  H01F27 ,  H05K1 ,  H05K3

CPC classification number: H01F27/29 ,  B41J2/275 ,  H05K3/3447 ,  H05K3/3468 ,  H05K2201/09045 ,  H05K2201/10287 ,  H05K2201/10568 ,  Y10T29/49142 ,  Y10T29/49144

Abstract: Assemblage comprenant une bobine pourvue d'une bobine de fil (50) et une plaque de circuit imprimé (34) pourvue de conducteurs (44). La bobine (50) possède une première et une deuxième bornes (68, 70) s'étendant au travers d'ouvertures correspondantes (40, 42) dans la plaque de circuit imprimé (34). Chaque borne (68, 70) présente une première et une deuxième rainures (72, 74) s'étendant le long de la borne et chaque extrémité (82) du fil de bobine (80) s'étend le long et à l'intérieur de la première rainure (72), au travers de la pointe (84), et le long et à l'intérieur de la deuxième rainure (74) de la borne respective (68, 70) et est soudée sur le côté opposé de la plaque de circuit imprimé. L'assemblage est exécuté en une seule opération dans laquelle une ouverture simple dans la plaque de circuit imprimé sert aussi bien d'ouverture pour la borne que d'ouverture pour l'extrémité du fil.

公开(公告)号：EP3328170A1

公开(公告)日：2018-05-30

申请号：EP16382562.3

申请日：2016-11-24

Applicant: VALEO ILUMINACION

Inventor： TEBA, Daniel ,  GUZMAN, Alfonso-Manuel ,  MARTINEZ, Francisco

IPC: H05K3/14

CPC classification number: H05K3/14 ,  H05K2201/09045 ,  H05K2201/09118 ,  H05K2201/098 ,  H05K2203/1344

Abstract: An electronic assembly which comprises a plastics substrate in turn comprising a protected surface laterally delimited a first wall extending longitudinally along a first edge and a second wall extending longitudinally along a second edge, in such a way that the protected surface is between the first and second walls, the electronic assembly further comprising a conductive track directly deposited between the first and second walls.

公开(公告)号：EP3277062A1

公开(公告)日：2018-01-31

申请号：EP17177352.6

申请日：2017-06-22

Applicant: Fujitsu Limited

Inventor： Matsumura, Takayoshi ,  Baba, Shunji ,  Kanda, Takashi ,  Ozaki, Noritsugu ,  Kira, Hidehiko

IPC: H05K1/02 ,  H05K1/09 ,  H05K3/24

CPC classification number: H05K1/0283 ,  H05K1/0271 ,  H05K1/092 ,  H05K1/181 ,  H05K1/189 ,  H05K3/245 ,  H05K2201/0314 ,  H05K2201/0338 ,  H05K2201/09045 ,  H05K2201/09281 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/10015 ,  H05K2201/10098 ,  H05K2201/10522

Abstract: A wiring board 1 includes a base 10 having extensibility and a wiring 40 formed on the base. The wiring includes a wiring portion 20 and a conductor portion 30. The wiring portion is formed on the base and extends in a first direction P crossing (for example, perpendicular to) a longitudinal direction X of the base. The conductor portion is formed on the wiring portion and extends in the first direction. Even when the wiring board is extended along a main extension axis S in parallel with the longitudinal direction of the base, change of the resistance of the wiring is prevented. Thus, the wiring board represents stable characteristics.

Abstract translation: 布线板1包括具有延伸性的基座10和形成在基座上的布线40。 布线包括布线部分20和导体部分30.布线部分形成在基底上并且沿着与基底的纵向方向X交叉（例如，垂直于）的第一方向P延伸。 导体部分形成在布线部分上并沿第一方向延伸。 即使布线基板沿着主延伸轴S与基座的长度方向平行地延伸，也能够防止布线的电阻变化。 因此，线路板表现出稳定的特性。

公开(公告)号：EP2722734B1

公开(公告)日：2018-01-03

申请号：EP12800960.2

申请日：2012-06-15

Applicant: Mirae Nano Technologies Co., Ltd.

Inventor： JANG, Kyung Hyun ,  CHOI, Hyung Bae ,  RYU, Sung Jin ,  PARK, Ki Won

IPC: G06F3/044 ,  H05K3/12 ,  H05K1/02

CPC classification number: G06F3/041 ,  G06F3/044 ,  G06F3/046 ,  G06F2203/04103 ,  H05K1/0296 ,  H05K3/1258 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2203/0108

Abstract: Disclosed is a wired electrode of touch screen panel for transmitting a touch signal sensed by a signal sensing pattern of touch screen panel to an external driving circuit, wherein the wired electrode formed on a substrate includes at least one curved portion, and a plurality of fine protrusions are formed on an inner surface of a groove of a resin layer on the substrate. The groove is filled with a conductive material to form the wired electrode.

公开(公告)号：EP1978558B1

公开(公告)日：2017-09-13

申请号：EP08154036.1

申请日：2008-04-03

Applicant: Shinko Electric Industries Co., Ltd.

Inventor： Shiraishi, Akinori ,  Murayama, Kei ,  Sunohara, Masahiro ,  Koizumi, Naoyuki ,  Higashi, Mitsutoshi

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/055 ,  H01L23/13 ,  H01L23/498 ,  H01L21/48 ,  H01L33/48 ,  H05K1/11 ,  H05K3/42

CPC classification number: H05K1/116 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/055 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/97 ,  H01L33/483 ,  H01L2224/16 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16195 ,  H05K3/423 ,  H05K3/426 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/1147 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A substrate (101) includes a storage portion (101C) which is defined by a base for mounting a light emitting element (102) and a wall portion standing up on and from the base. A package (100) is structured such that the upper end of the wall portion so formed as to surround the periphery of the storage portion (101C) is connected to a cover (103) to thereby seal a light emitting element. A seal structure (130; 330; 430) is composed of an uneven portion (140; 340) formed on the lower surface side surface of the base (101A), a close contact layer (150) formed on the surface of the uneven portion (140; 340), a power supply layer (160) formed on the close contact layer (150), and an electrode layer (170) formed on the surface of the power supply layer (160). The uneven portion(140; 340) includes a first recessed portion (180) formed at a position spaced in the radial direction from the outer periphery of a through electrode (107) or from the inner wall of a through hole (120), and a second recessed portion (190) formed at a position spaced further outwardly from the first recessed portion (180).

Abstract translation: 衬底（101）包括由用于安装发光元件（102）的底座和竖立在底座上的壁部分限定的储存部分（101C）。 封装（100）构造成使得围绕存储部分（101C）的周边形成的壁部分的上端连接到盖（103），从而密封发光元件。 密封结构（130; 330; 430）由形成在基座（101A）的下表面侧表面上的不平坦部分（140; 340），形成在不平坦部分的表面上的紧密接触层 （140; 340），形成在所述紧密接触层（150）上的电源层（160）以及形成在所述电源层（160）的表面上的电极层（170）。 凹凸部（140,340）具有：第一凹部（180），其形成在从贯通电极（107）的外周或者贯通孔（120）的内壁向径向隔开的位置;以及 第二凹陷部分（190），形成在从第一凹陷部分（180）向外间隔开的位置处。

公开(公告)号：EP1927118A4

公开(公告)日：2015-05-06

申请号：EP06815217

申请日：2006-09-22

Applicant: RADIAL ELECTRONICS INC

Inventor： QUILICI JAMES E

IPC: H01F5/00 ,  H01F7/06 ,  H01F27/02 ,  H01F27/28

CPC classification number: H01F17/0033 ,  H01F17/062 ,  H01F27/027 ,  H01F41/02 ,  H01F41/0206 ,  H01F41/041 ,  H01F41/042 ,  H01F41/064 ,  H01F2027/2814 ,  H05K1/0284 ,  H05K1/144 ,  H05K1/165 ,  H05K3/0014 ,  H05K3/20 ,  H05K3/4611 ,  H05K2201/0129 ,  H05K2201/0141 ,  H05K2201/086 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09118 ,  H05K2203/0139 ,  H05K2203/0143 ,  H05K2203/0292 ,  Y10T29/4902 ,  Y10T29/49073 ,  Y10T29/49075 ,  Y10T156/10

公开(公告)号：EP2704537A4

公开(公告)日：2014-10-08

申请号：EP12777596

申请日：2012-02-01

Applicant: NGK SPARK PLUG CO

Inventor： HASEGAWA MASAMI ,  HIRAYAMA SATOSHI ,  KITO NAOKI

IPC: H05K1/02 ,  H01L23/12 ,  H05K3/00

CPC classification number: H05K1/0306 ,  C04B41/0036 ,  H01L23/10 ,  H01L23/13 ,  H01L23/15 ,  H01L23/49805 ,  H01L2924/0002 ,  H05K1/14 ,  H05K3/0029 ,  H05K3/0052 ,  H05K3/0097 ,  H05K3/403 ,  H05K2201/017 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/0909 ,  H05K2201/09154 ,  H01L2924/00

Abstract: Provided are a wiring substrate including a substrate main body and a metalized layer provided on the front surface of the substrate main body so as to extend along side surfaces thereof, in which a plating film and a brazing material layer covering the surface of the metalized layer are not damaged; a multi-piece wiring substrate array for simultaneously providing a plurality of the wiring substrates; and a method for producing the multi-piece wiring substrate array. The wiring substrate 1a includes a substrate main body 2 which is formed of a ceramic laminate S and has a rectangular shape in plan view, and which has a front surface 3 and a back surface 4 and has four side surfaces 5, each being located between the front surface 3 and the back surface 4, and having a groove surface 7 located on a side toward the front surface 3 and a fracture surface 6 located on a side toward the back surface 4; and a metalized layer 11 which is formed on the front surface 3 of the substrate main body 2 so as to extend along the four side surfaces 5, and which has a rectangular frame shape in plan view, wherein a horizontal surface 13 of the ceramic laminate S of the substrate main body 2 is exposed between the metalized layer 11 and the groove surface 7 of each side surface 5 of the substrate main body 2.

公开(公告)号：EP2388811A3

公开(公告)日：2014-09-10

申请号：EP11177187.9

申请日：2007-03-22

Applicant: CeramTec GmbH

Inventor： Kluge, Dr. Claus Peter

IPC: H01L23/34 ,  H01L23/373 ,  H01L23/367 ,  H01L23/552 ,  H01L25/16 ,  H05K1/02 ,  H01L23/15 ,  H01L23/36 ,  F21V29/00 ,  F21K99/00 ,  F21Y101/00 ,  F21S8/10 ,  H01L23/00 ,  H01L33/64 ,  H05K1/03 ,  F21Y101/02 ,  F21Y105/00

CPC classification number: F21V29/70 ,  F21K9/23 ,  F21V29/71 ,  F21V29/713 ,  F21V29/75 ,  F21V29/763 ,  F21V29/86 ,  F21V29/89 ,  F21Y2105/10 ,  F21Y2115/10 ,  F28F2215/10 ,  H01L23/15 ,  H01L23/367 ,  H01L23/3672 ,  H01L23/3731 ,  H01L23/3735 ,  H01L23/3736 ,  H01L23/3737 ,  H01L23/552 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L25/16 ,  H01L25/162 ,  H01L33/642 ,  H01L33/648 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H05K1/0203 ,  H05K1/0284 ,  H05K1/0306 ,  H05K1/0373 ,  H05K2201/0209 ,  H05K2201/09045 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00011

Abstract: Die Erfindung betrifft einen Trägerkörper (1, 2) für elektrische oder elektronische Bauelemente (6a, 6b, 6c, 6d) oder Schaltungen, wobei der Trägerkörper (1, 2) elektrisch nicht oder nahezu nicht leitend ist, der Trägerkörper (1, 2) einstückig mit Wärme ab- oder zuführenden Kühlelementen (7) versehen ist, auf der Oberfläche des Trägerkörpers (1, 2) versinterte Metallisierungsbereiche (41) aufgebracht sind und der Trägerkörper (1, 2) eine Platine ist.
Erfindungsgemäß wird vorgeschlagen, dass mit dem Trägerkörper (1, 2) sensorische Bauelemente (6a, 6b, 6c, 6d) verbunden sind.

Abstract translation: 本发明涉及一种承载体（1,2），用于电气或电子元件（6A，6B，6C，6D）或电路，其中，所述承载体（1，2）被电不或基本上不导电的，所述支撑体（1，2） 一体地设置关闭或与冷却元件（7）供给的热量，在承载体的表面上的（1，2）烧结的金属化区域（41）被应用，并且在承载体（1，2）是一种电路板。 根据本发明，提出传感器部件（6a，6b，6c，6d）连接到载体主体（1,2）。

公开(公告)号：EP2722734A2

公开(公告)日：2014-04-23

申请号：EP12800960.2

申请日：2012-06-15

Applicant: Mirae Nano Technologies Co., Ltd.

Inventor： JANG, Kyung Hyun ,  CHOI, Hyung Bae ,  RYU, Sung Jin ,  PARK, Ki Won

IPC: G06F3/041

CPC classification number: G06F3/041 ,  G06F3/044 ,  G06F3/046 ,  G06F2203/04103 ,  H05K1/0296 ,  H05K3/1258 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2203/0108

Abstract: Disclosed is a wired electrode of touch screen panel for transmitting a touch signal sensed by a signal sensing pattern of touch screen panel to an external driving circuit, wherein the wired electrode formed on a substrate includes at least one curved portion, and a plurality of fine protrusions are formed on an inner surface of a groove of a resin layer on the substrate. The groove is filled with a conductive material to form the wired electrode.

Abstract translation: 公开了一种触摸屏面板的有线电极，用于将由触摸屏面板的信号感测图案感测的触摸信号发送到外部驱动电路，其中形成在基板上的布线电极包括至少一个弯曲部分， 在基板上的树脂层的槽的内表面上形成突起。 凹槽填充有导电材料以形成布线电极。