公开(公告)号：JP2012174484A

公开(公告)日：2012-09-10

申请号：JP2011035432

申请日：2011-02-22

Applicant: Olympus Corp ,  オリンパス株式会社

Inventor： YAMADA JUNYA

IPC: H01R12/53 ,  H01R43/02 ,  H05K3/34

CPC classification number: H05K1/111 ,  H05K3/34 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/10287 ,  H05K2201/10356 ,  Y02P70/611

Abstract: PROBLEM TO BE SOLVED: To provide a cable connection structure and a cable connection method which prevent crushing and displacement of a cable conductor part during joining.SOLUTION: A cable connection structure 100 according to the present invention comprises a cable 1A and a substrate 10 having a connection electrode 11 to which the cable 1A is connected. The cable connection structure 100 is characterized in that: the substrate 10 has, on the connection electrode 11, two or more protrusions 12 forming a groove in which a conductor part 1 of the cable 1A is disposed; and a height of the protrusions 12 is greater than a diameter of the conductor part 1 of the cable 1A.

Abstract translation: 要解决的问题：提供一种在接合期间防止电缆导体部分的破碎和移位的电缆连接结构和电缆连接方法。 解决方案：根据本发明的电缆连接结构100包括电缆1A和具有连接电极11的基板10，电缆1A连接到该连接电极11。 电缆连接结构100的特征在于：基板10在连接电极11上具有形成电缆1A的导体部1的槽的2个以上的突起12， 并且突起12的高度大于电缆1A的导体部分1的直径。 版权所有（C）2012，JPO＆INPIT

公开(公告)号：JP5008767B2

公开(公告)日：2012-08-22

申请号：JP2010530764

申请日：2009-06-02

Applicant: シャープ株式会社

Inventor： 素二 塩田 ,  一郎 梅川 ,  行男 清水 ,  元 長岡 ,  泰宏 飛田

IPC: H05K3/32 ,  H01L21/60

CPC classification number: H05K3/323 ,  G02F1/13452 ,  H01L2224/73204 ,  H01L2924/07811 ,  H05K1/0231 ,  H05K3/284 ,  H05K3/361 ,  H05K2201/0379 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00

公开(公告)号：JP2010287834A

公开(公告)日：2010-12-24

申请号：JP2009142258

申请日：2009-06-15

Applicant: Sumitomo Electric Ind Ltd ,  住友電気工業株式会社

Inventor： YAMAMOTO MASAMICHI ,  NAKATSUGI KYOICHIRO ,  OKUDA YASUHIRO

IPC: H01L21/60 ,  H05K3/28 ,  H05K3/32 ,  H05K3/34

CPC classification number: H05K3/323 ,  C09J9/02 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2924/01005 ,  H01L2924/01027 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H05K3/282 ,  H05K3/361 ,  H05K2201/023 ,  H05K2201/0379 ,  Y10T156/10 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To form an inexpensive and highly reliable connection structure capable of simplifying a manufacturing process by connecting a connecting electrode having organic films as an oxidation preventing film using a conductive adhesive. SOLUTION: This electrode connection method for connecting a first connecting electrode 2 to a second connecting electrode 10 through the conductive adhesive 9 interposed between these electrodes includes an organic film forming process to provide an organic film 6 on the surface of at least the first connecting electrode, and an electrode connecting process to connect the first connecting electrode to the second connecting electrode through the conductive adhesive. In the electrode connecting process, an organic film decomposing component blended in the conductive adhesive is made to act on the organic film, and the organic film is decomposed to perform connection between these connecting electrodes. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：通过使用导电粘合剂将具有有机膜的连接电极作为氧化防止膜进行连接，形成能够简化制造工艺的便宜且高度可靠的连接结构。 解决方案：用于通过介于这些电极之间的导电粘合剂9将第一连接电极2连接到第二连接电极10的电极连接方法包括有机膜形成工艺，以在至少 第一连接电极和通过导电粘合剂将第一连接电极连接到第二连接电极的电极连接工艺。 在电极连接工序中，使配合在导电性粘合剂中的有机膜分解成分作用于有机膜，有机膜分解，从而在这些连接电极之间进行连接。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2009044152A

公开(公告)日：2009-02-26

申请号：JP2008202787

申请日：2008-08-06

Applicant: Infineon Technologies Ag ,  インフィネオン テクノロジーズ アクチエンゲゼルシャフト

Inventor： BAYERER REINHOLD

IPC: H01L25/07 ,  H01L23/12 ,  H01L25/18

CPC classification number: H01L23/3735 ,  H01L23/3731 ,  H01L23/3736 ,  H01L24/28 ,  H01L24/29 ,  H01L24/34 ,  H01L24/37 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/072 ,  H01L25/165 ,  H01L2224/29339 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/371 ,  H01L2224/37599 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/4911 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H05K1/0306 ,  H05K1/053 ,  H05K3/4061 ,  H05K3/44 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4629 ,  H05K3/4641 ,  H05K2201/0355 ,  H05K2201/0379 ,  H05K2201/09554 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2224/83205

Abstract: PROBLEM TO BE SOLVED: To provide a substrate which is not easily curved and is excellent in heat radiation efficiency, and to provide a power semiconductor module. SOLUTION: The power semiconductor module 1 is disclosed. One embodiment includes the multilayer substrate 3 having a plurality of metal layers 11, 12 and 13 and a plurality of ceramic layers 21 and 22, where the ceramic layers are located between the metal layers. The power semiconductor module 1 may be pressed directly against a heat sink 9 with the multilayer substrate 3 ahead. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供不容易弯曲并且散热效率优异的基板，并提供功率半导体模块。 解决方案：公开了功率半导体模块1。 一个实施例包括具有多个金属层11,12和13的多层基板3和多个陶瓷层21和22，其中陶瓷层位于金属层之间。 功率半导体模块1可以在多层基板3前方直接压靠在散热器9上。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP4169987B2

公开(公告)日：2008-10-22

申请号：JP2002044240

申请日：2002-02-21

Applicant: ソニーケミカル&インフォメーションデバイス株式会社

Inventor： 雅男 斉藤 ,  隆行 松島

IPC: C09J201/00 ,  H01R11/01 ,  C08G59/18 ,  C08G59/70 ,  C08J3/24 ,  C08L63/00 ,  C09J5/00 ,  C09J9/02 ,  C09J163/00 ,  H01B1/20 ,  H01B5/16 ,  H01L21/60 ,  H05K3/32

CPC classification number: H05K3/323 ,  C08G59/18 ,  C08J3/243 ,  C08L63/00 ,  C09J9/02 ,  C09J163/00 ,  H01L2224/16 ,  H01L2224/83101 ,  H05K2201/0239 ,  H05K2201/0379 ,  H05K2203/1163 ,  H05K2203/121 ,  Y10T428/31511 ,  Y10T428/31515

公开(公告)号：JP2008109140A

公开(公告)日：2008-05-08

申请号：JP2007276875

申请日：2007-10-24

Applicant: Samsung Electro-Mechanics Co Ltd ,  サムソン エレクトロ−メカニックス カンパニーリミテッド.

Inventor： OKABE SHUICHI ,  KANG MYUNG-SAM ,  PARK JUNG-HYUN ,  JUNG HOE-KU ,  PARK JEONG-WOO ,  KIM JI-EUN

IPC: H05K3/20 ,  H05K1/11 ,  H05K3/10 ,  H05K3/24

CPC classification number: H05K1/0265 ,  H05K1/116 ,  H05K3/107 ,  H05K3/108 ,  H05K3/205 ,  H05K3/421 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2203/0361

Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a circuit board, which can manufacture a circuit board having a high-density circuit pattern without adding insulators.
SOLUTION: A method of manufacturing a printed circuit board comprises: a step (a) of forming a conductive convex pattern, in which a first plating layer, a first metal layer, and a second plating layer are sequentially laid so as to correspond to a first circuit pattern, on a seed layer laid on a carrier; a step (b) of laying an insulator so that it faces the one surface of the carrier on which the conductive convex pattern is formed and of press-bonding the carrier and the insulator to each other; a step (c) of removing the carrier to transfer the conductive convex pattern to the insulator; a step (d) of forming a conductive pattern, in which a third plating layer and a second metal layer are sequentially laid so as to correspond to a second circuit pattern, on the one surface of the insulator that has the transferred conductive convex pattern; a step (e) of removing the first plating layer and the seed layer; and a step (f) of removing the first metal layer and the second metal layer.
COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种制造电路板的方法，其可以制造具有高密度电路图案的电路板而不添加绝缘体。 解决方案：制造印刷电路板的方法包括：形成导电凸起图案的步骤（a），其中顺序地铺设第一镀层，第一金属层和第二镀层，以便 对应于铺设在载体上的种子层上的第一电路图案; 布置绝缘体使得其面对形成有导电凸起图案的载体的一个表面并将载体和绝缘体彼此压合的步骤（b）; 去除载体以将导电凸起图案转移到绝缘体的步骤（c）; 在具有转印的导电凸起图案的绝缘体的一个表面上形成导电图案的步骤（d），其中第三镀层和第二金属层依次铺设以对应于第二电路图案; 去除第一镀层和种子层的步骤（e）; 以及去除第一金属层和第二金属层的步骤（f）。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP3960445B2

公开(公告)日：2007-08-15

申请号：JP28914598

申请日：1998-10-12

Applicant: 新光電気工業株式会社

Inventor： 啓 村山

IPC: H01L21/60 ,  H05K1/18 ,  H01L23/12 ,  H01L23/485 ,  H05K3/34

CPC classification number: H05K3/3436 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07802 ,  H05K2201/0379 ,  H05K2201/09472 ,  H05K2201/10992 ,  H05K2203/043 ,  Y02P70/613 ,  H01L2924/0105 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A semiconductor device including a semiconductor chip (10) which has an electrode and also has an active surface covered with an insulating layer (100). A rewiring circuit (120) is formed on the insulating layer (100) and is electrically connected to the electrode. An inner bump (140) is formed on a conductive pad (122) which is a part of the rewiring circuit (120). An insulating film (160) is attached to the rewiring circuit (120) and a surface of the insulating layer (100) at a peripheral portion of the rewiring circuit (120). The insulating film (160) has a through hole (180) into which the inner bump (140) is inserted. An outer bump (200) is superimposed on the inner bump (140) in the through hole (180) so as to project outwards away from the semiconductor chip (10).

公开(公告)号：JP2006032446A

公开(公告)日：2006-02-02

申请号：JP2004205427

申请日：2004-07-13

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： MINO RIICHI

IPC: H01L21/60

CPC classification number: H05K3/3436 ,  B23K1/012 ,  B23K2201/40 ,  H01L24/81 ,  H01L2224/11822 ,  H01L2224/16 ,  H01L2224/75 ,  H01L2224/75252 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014 ,  H05K3/3489 ,  H05K3/3494 ,  H05K2201/0379 ,  H05K2201/10977 ,  H05K2203/0195 ,  H05K2203/0278 ,  H05K2203/0485 ,  Y02P70/613 ,  H01L2224/0401

Abstract: PROBLEM TO BE SOLVED: To provide a mounting method for a semiconductor component which has a suitable solder bump for obtaining an ideal joining state of sufficiently high reliability, and a mounting device.
SOLUTION: The semiconductor component 26 with the solder bump 26a and a substrate 42 with a solder bump 42a are heated one-side ends of the solder bumps 26a and 42a are pressed against a stage having unevenness to plastically be deformed, thereby forming a new surface with a sufficient area. A flux coating 32 is transferred to coat the new surface. The solder bump 26a of the semiconductor component 26 is mounted on the solder bump 42a of the substrate 42 to mount the semiconductor component 26 on the substrate 42. The semiconductor component 26 and the substrate 42 are heated to fuse and join the solder bumps 26a and 42a.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：为了提供一种用于获得具有足够高的可靠性的理想连接状态的合适的焊料凸块的半导体部件的安装方法以及安装装置。 解决方案：具有焊料凸块26a的半导体部件26和具有焊料凸块42a的基板42被加热，焊料凸块26a和42a的单侧端部被压在具有不均匀性的台阶上，从而塑性变形 具有足够面积的新表面。 转移焊剂涂层32以涂覆新表面。 半导体部件26的焊料凸块26a安装在基板42的焊料凸块42a上，以将半导体部件26安装在基板42上。半导体部件26和基板42被加热以熔合并连接焊料凸块26a和 42A。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP3587748B2

公开(公告)日：2004-11-10

申请号：JP29468699

申请日：1999-10-18

Applicant: ソニーケミカル株式会社

Inventor： 英之 栗田 ,  啓之 菱沼

IPC: H01L21/60 ,  H05K1/00 ,  H05K3/28 ,  H05K3/32 ,  H05K3/36 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K3/4635 ,  H01L24/05 ,  H05K1/0393 ,  H05K3/28 ,  H05K3/328 ,  H05K3/361 ,  H05K3/4084 ,  H05K3/4617 ,  H05K2201/0129 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2203/0285 ,  Y10S439/943

公开(公告)号：JP3491595B2

公开(公告)日：2004-01-26

申请号：JP2000050180

申请日：2000-02-25

Applicant: ソニーケミカル株式会社

Inventor： 山本　　憲 ,  博之 熊倉

IPC: C09J7/02 ,  C08L63/00 ,  C09J7/00 ,  C09J9/02 ,  C09J133/00 ,  C09J163/00 ,  H01B1/22 ,  H01B3/18 ,  H01B5/16 ,  H01L21/60 ,  H01R4/04 ,  H01R12/00 ,  H05K3/32

CPC classification number: H01L24/83 ,  C08L63/00 ,  C09J7/10 ,  C09J9/02 ,  C09J2201/36 ,  C09J2201/602 ,  C09J2433/00 ,  C09J2463/00 ,  H01B1/22 ,  H01B3/18 ,  H01L24/29 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/83101 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01055 ,  H01L2924/0132 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/14 ,  H01R4/04 ,  H05K3/323 ,  H05K2201/0133 ,  H05K2201/0379 ,  H05K2201/10674 ,  H05K2203/1189 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49211 ,  Y10T156/1052 ,  Y10T428/254 ,  Y10T428/269 ,  Y10T428/2857 ,  Y10T428/2991 ,  Y10T428/2998 ,  H01L2924/00 ,  H01L2924/01028

Abstract: An anisotropic conductive adhesive film contains a first insulating adhesive layer, a second insulating adhesive layer whose modulus of elasticity after curing is less than the modulus of elasticity of the cured first insulating adhesive layer, and electrically conductive particles which are dispersed in at least either the first insulating adhesive layer or the second insulating adhesive layer.