Methods for forming resistive switching memory elements
    91.
    发明申请
    Methods for forming resistive switching memory elements 审中-公开
    形成电阻式开关存储元件的方法

    公开(公告)号:US20140231744A1

    公开(公告)日:2014-08-21

    申请号:US14264475

    申请日:2014-04-29

    Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.

    Abstract translation: 提供电阻式开关存储器元件,其可以包含由无电金属形成的化学金属电极和金属氧化物。 电阻式开关存储器元件可以表现出双稳态,并且可以用于高密度多层存储器集成电路中。 诸如镍基材料的无电导电材料可以选择性地沉积在硅晶片或其它合适的衬底上的导体上。 无电导电材料可以被氧化以形成用于电阻式开关存储元件的金属氧化物。 可以沉积多层导电材料,每层具有不同的氧化速率。 可以利用导电层的差异氧化速率来确保在制造期间形成所需厚度的金属氧化物层。

    Nonvolatile Memory Device Having a Current Limiting Element
    93.
    发明申请
    Nonvolatile Memory Device Having a Current Limiting Element 有权
    具有限流元件的非易失性存储器件

    公开(公告)号:US20140183436A1

    公开(公告)日:2014-07-03

    申请号:US14186726

    申请日:2014-02-21

    Abstract: Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises at least one layer of resistive material that is configured to improve the switching performance and lifetime of the formed resistive switching memory element. The electrical properties of the formed current limiting layer, or resistive layer, are configured to lower the current flow through the variable resistance layer during the logic state programming steps (i.e., “set” and “reset” steps) by adding a fixed series resistance in the formed resistive switching memory element found in the nonvolatile memory device. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players.

    Abstract translation: 本发明的实施例通常包括一种形成非易失性存储器件的方法,该非易失性存储器件包含由于添加限定在其中的限流部件而具有改进的器件切换性能和寿命的电阻式开关存储元件。 在一个实施例中,限流部件包括至少一层电阻材料,其被配置为提高所形成的电阻式开关存储元件的开关性能和寿命。 所形成的限流层或电阻层的电性能被配置为在逻辑状态编程步骤(即“设定”和“复位”步骤)期间通过添加固定的串联电阻来降低通过可变电阻层的电流 在形成在非易失性存储器件中的电阻式开关存储元件中。 通常,电阻式开关存储器元件可以形成为可用于各种电子设备(例如数码相机,移动电话,手持式计算机和音乐播放器)的大容量非易失性存储器集成电路的一部分。

    Current selector for non-volatile memory in a cross bar array based on defect and band engineering metal-dielectric-metal stacks
    94.
    发明授权
    Current selector for non-volatile memory in a cross bar array based on defect and band engineering metal-dielectric-metal stacks 有权
    基于缺陷和带工程金属 - 电介质金属叠层的交叉条阵列中的非易失性存储器的当前选择器

    公开(公告)号:US08766234B1

    公开(公告)日:2014-07-01

    申请号:US13728860

    申请日:2012-12-27

    CPC classification number: H01L27/2418 H01L27/2409 H01L29/872 H01L45/10

    Abstract: Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. In some embodiments, the selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a high leakage dielectric layer sandwiched between two lower leakage dielectric layers. The low leakage layers can function to restrict the current flow across the selector device at low voltages. The high leakage dielectric layer can function to enhance the current flow across the selector device at high voltages.

    Abstract translation: 可适用于存储器件应用的选择器器件可在低电压下具有低漏电流,以减少非选定器件的漏电流路径,以及高电压下的高泄漏电流,以最大限度地减少器件开关期间的电压降。 在一些实施例中,选择器装置可以包括第一电极,三层电介质层和第二电极。 三层电介质层可以包括夹在两个较低的漏电介质层之间的高泄漏电介质层。 低泄漏层可以起到限制低电压下选择器装置的电流的作用。 高泄漏电介质层可以用于在高电压下增强选择器装置上的电流。

    Combinatorial Processing Using a Remote Plasma Source
    95.
    发明申请
    Combinatorial Processing Using a Remote Plasma Source 有权
    使用远程等离子体源的组合处理

    公开(公告)号:US20140166616A1

    公开(公告)日:2014-06-19

    申请号:US13717478

    申请日:2012-12-17

    Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber, a remote plasma source, and a showerhead. Inert gas ports within the showerhead assembly can be used to alter the concentration and energy of reactive radical or reactive neutral species generated by the remote plasma source in different regions of the showerhead. This allows the showerhead to be used to apply a surface treatment to different regions of the surface of a substrate. Varying parameters such as the remote plasma parameters, the inert gas flows, pressure, and the like allow different regions of the substrate to be treated in a combinatorial manner.

    Abstract translation: 公开了使用远程等离子体源的处理方法和装置。 该装置包括外室,远程等离子体源和喷头。 喷头组件内的惰性气体端口可用于改变由喷头的不同区域中的远程等离子体源产生的反应性基团或反应中性物质的浓度和能量。 这允许使用喷头来对表面的不同区域进行表面处理。 诸如远程等离子体参数,惰性气体流量,压力等的不同参数允许以组合的方式处理衬底的不同区域。

    Resistive switching memory elements having improved switching characteristics
    96.
    发明授权
    Resistive switching memory elements having improved switching characteristics 有权
    具有改进的开关特性的电阻式开关存储元件

    公开(公告)号:US08723156B2

    公开(公告)日:2014-05-13

    申请号:US13656908

    申请日:2012-10-22

    Abstract: Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode comprising hafnium oxide and having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a material including metal titanium and having a second thickness that is less than 25 percent of the first thickness.

    Abstract translation: 描述了具有改进的开关特性的电阻式开关存储元件,包括具有第一电极和第二电极的存储元件,第一电极和第二电极之间的开关层,包括氧化铪并具有第一厚度,以及耦合层, 所述开关层和所述第二电极,所述耦合层包括包含金属钛并且具有小于所述第一厚度的25%的第二厚度的材料。

    Methods of Combinatorial Processing for Screening Multiple Samples on a Semiconductor Substrate
    97.
    发明申请
    Methods of Combinatorial Processing for Screening Multiple Samples on a Semiconductor Substrate 审中-公开
    在半导体基板上筛选多个样品的组合处理方法

    公开(公告)号:US20140090596A1

    公开(公告)日:2014-04-03

    申请号:US14096981

    申请日:2013-12-04

    CPC classification number: G01R31/2831 G01R31/2834 H01L22/34

    Abstract: In embodiments of the current invention, methods of combinatorial processing and a test chip for use in these methods are described. These methods and test chips enable the efficient development of materials, processes, and process sequence integration schemes for semiconductor manufacturing processes. In general, the methods simplify the processing sequence of forming devices or partially formed devices on a test chip such that the devices can be tested immediately after formation. The immediate testing allows for the high throughput testing of varied materials, processes, or process sequences on the test chip. The test chip has multiple site isolated regions where each of the regions is varied from one another and the test chip is designed to enable high throughput testing of the different regions.

    Abstract translation: 在本发明的实施例中,描述了用于这些方法的组合处理方法和测试芯片。 这些方法和测试芯片能够有效地开发用于半导体制造工艺的材料,工艺和工艺顺序集成方案。 通常,这些方法简化了在测试芯片上形成器件或部分形成的器件的处理顺序,使得器件可以在形成后立即进行测试。 即时测试允许测试芯片上各种材料,工艺或工艺顺序的高通量测试。 测试芯片具有多个位置隔离区域,其中每个区域彼此变化,并且测试芯片被设计为能够实现不同区域的高通量测试。

    Atomic Layer Deposition of Metal Oxide Materials for Memory Applications
    98.
    发明申请
    Atomic Layer Deposition of Metal Oxide Materials for Memory Applications 有权
    用于存储器应用的金属氧化物材料的原子层沉积

    公开(公告)号:US20140073107A1

    公开(公告)日:2014-03-13

    申请号:US13897050

    申请日:2013-05-17

    Abstract: Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies. Therefore, the metal oxide film stacks have improved switching performance and reliability during memory cell applications compared to traditional hafnium oxide based stacks of previous memory cells.

    Abstract translation: 本发明的实施例一般涉及非易失性存储器件,例如ReRAM单元,以及用于制造这种存储器件的方法,其包括用于形成金属氧化物膜堆叠的优化的原子层沉积(ALD)工艺。 金属氧化物膜堆叠包含设置在金属氧化物主体层上的金属氧化物耦合层,每个层具有不同的晶粒结构/尺寸。 设置在金属氧化物层之间的界面有助于氧空位移动。 在许多示例中,与垂直于电极界面延伸的体膜中的晶粒相反,界面是不对齐的晶粒界面,其包含平行于电极界面延伸的许多晶界。 因此,氧空缺在切换期间被捕获和释放,而空位明显损失。 因此,与以前的存储单元的传统的基于氧化铪的堆叠相比,金属氧化物膜堆叠在存储单元应用中具有改进的开关性能和可靠性。

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