公开(公告)号：US20160293641A1

公开(公告)日：2016-10-06

申请号：US15187106

申请日：2016-06-20

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Takahiro SATO ,  Yasutaka NAKAZAWA ,  Takayuki CHO ,  Shunsuke KOSHIOKA ,  Hajime TOKUNAGA ,  Masami JINTYOU

IPC分类号： H01L27/12 ,  H01L29/786 ,  G02F1/1362 ,  H01L29/66 ,  G02F1/1368 ,  H01L27/32 ,  H01L29/04

CPC分类号： H01L29/7869 ,  G02F1/136277 ,  G02F1/1368 ,  H01L21/02365 ,  H01L21/02403 ,  H01L21/02422 ,  H01L21/02551 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/30604 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/3248 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78693 ,  H01L29/78696

摘要： A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

公开(公告)号：US09455267B2

公开(公告)日：2016-09-27

申请号：US14491315

申请日：2014-09-19

申请人： SANDISK TECHNOLOGIES INC.

发明人： Yanli Zhang ,  Johann Alsmeier

IPC分类号： H01L23/528 ,  H01L21/283 ,  H01L21/768 ,  H01L21/31 ,  H01L27/115 ,  H01L29/792 ,  H01L29/423 ,  H01L29/417 ,  H01L29/06 ,  H01L21/3213 ,  H01L21/02 ,  H01L21/28 ,  H01L29/788 ,  H01L29/66 ,  H01L21/8234 ,  G11C16/06 ,  G11C16/04

CPC分类号： H01L27/11582 ,  G11C16/0483 ,  G11C16/06 ,  H01L21/02365 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/283 ,  H01L21/31 ,  H01L21/32133 ,  H01L21/768 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823475 ,  H01L21/823487 ,  H01L23/528 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11568 ,  H01L29/0657 ,  H01L29/41775 ,  H01L29/42328 ,  H01L29/42336 ,  H01L29/42344 ,  H01L29/42352 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7889 ,  H01L29/7926 ,  H01L2924/0002 ,  H01L2924/00

摘要： A monolithic three dimensional NAND string includes a plurality of control gate electrodes extending substantially parallel to a major surface of a substrate in at least one active region, a plurality of semiconductor channels having at least one end portion of each of the plurality of semiconductor channels extending substantially perpendicular to the major surface of the substrate, at least one memory film located between each of the plurality of control gate electrodes and each respective semiconductor channel of the plurality of semiconductor channels, and at least one first slit trench extending substantially perpendicular to the major surface of the substrate. Each of the plurality of control gate electrodes has a nonlinear side wall adjacent to the at least one first slit trench in the at least one active region.

摘要翻译： 单片三维NAND串包括在至少一个有源区域中基本上平行于衬底的主表面延伸的多个控制栅电极，多个半导体沟道具有多个半导体沟道中的每一个的至少一个端部延伸 基本上垂直于衬底的主表面，位于多个控制栅电极中的每一个和多个半导体沟道中的每个相应半导体沟道之间的至少一个存储膜，以及至少一个基本上垂直于主体的第一狭缝沟槽 基板的表面。 多个控制栅极电极中的每一个具有与至少一个有源区域中的至少一个第一狭缝沟槽相邻的非线性侧壁。

公开(公告)号：US09368575B2

公开(公告)日：2016-06-14

申请号：US14091663

申请日：2013-11-27

申请人： DENSO CORPORATION

发明人： Takeshi Miyajima

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L29/08 ,  H01L29/10

CPC分类号： H01L29/0684 ,  H01L21/02365 ,  H01L21/0262 ,  H01L21/02658 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1033 ,  H01L29/1095 ,  H01L29/66712 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/7827

摘要： A semiconductor device having a super junction structure includes: multiple first columns extending in a current flowing direction; and multiple second columns extending in the current flowing direction. The first and second columns are alternately arranged in an alternating direction. Each first column provides a drift layer. The first and second columns have a boundary therebetween, from which a depletion layer expands in case of an off-state. At least one of the first columns and the second columns have an impurity dose, which is inhomogeneous by location with respect to the alternating direction.

公开(公告)号：US09318573B2

公开(公告)日：2016-04-19

申请号：US13973584

申请日：2013-08-22

申请人： Samsung Electronics Co., Ltd.

发明人： Chang-Wook Moon ,  Joong S. Jeon ,  Jung-hyun Lee ,  Nae-In Lee ,  Yeon-Sik Park ,  Hwa-Sung Rhee ,  Ho Lee ,  Se-Young Cho ,  Suk-Pil Kim

IPC分类号： H01L21/02 ,  H01L29/66 ,  B82Y10/00 ,  H01L29/10 ,  H01L29/78 ,  H01L29/786 ,  H01L51/42 ,  H01L29/06 ,  B82Y15/00

CPC分类号： H01L29/66439 ,  B82Y10/00 ,  B82Y15/00 ,  H01L21/02365 ,  H01L21/02601 ,  H01L29/0665 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/1033 ,  H01L29/66742 ,  H01L29/7839 ,  H01L29/78684 ,  H01L29/78696 ,  H01L51/426 ,  H01L2221/1094

摘要： A field effect transistor having at least one Ge nanorod and a method of manufacturing the field effect transistor are provided. The field effect transistor may include a gate insulation layer formed on a silicon substrate, at least one nanorod embedded in the gate insulation layer having both ends thereof exposed, a source electrode and a drain electrode connected to opposite sides of the at least one Ge nanorod, and a gate electrode formed on the gate insulation layer between the source electrode and the drain electrode.

摘要翻译： 提供具有至少一个Ge纳米棒的场效应晶体管和制造场效应晶体管的方法。 场效应晶体管可以包括形成在硅衬底上的栅极绝缘层，至少一个纳米棒，其嵌入在其两端露出的栅极绝缘层中，源电极和漏电极连接到至少一个Ge纳米棒的相对侧 以及形成在源电极和漏电极之间的栅极绝缘层上的栅电极。

公开(公告)号：US20150380354A1

公开(公告)日：2015-12-31

申请号：US14845435

申请日：2015-09-04

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Byoung-Gue MIN ,  Sang Choon KO ,  Jong-Won LIM ,  Hokyun AHN ,  Hyung Sup YOON ,  Jae Kyoung MUN ,  Eun Soo NAM

IPC分类号： H01L23/535 ,  H01L23/48

CPC分类号： H01L23/535 ,  H01L21/02365 ,  H01L21/28 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/00

摘要： A semiconductor device may include a substrate having a lower via-hole, an epitaxial layer having an opening exposing a top surface of the substrate, a semiconductor chip disposed on the top surface of the substrate and including first, second, and third electrodes, an upper metal layer connected to the first electrode, a supporting substrate disposed on the upper metal layer and having an upper via-hole, an upper pad disposed on the substrate and extending into the upper via-hole, a lower pad connected to the second electrode in the opening, and a lower metal layer covering a bottom surface of the substrate and connected to the lower pad through the lower via-hole.

摘要翻译： 半导体器件可以包括具有下通孔的衬底，具有暴露衬底的顶表面的开口的外延层，设置在衬底的顶表面上并包括第一，第二和第三电极的半导体芯片， 连接到第一电极的上金属层，设置在上金属层上并具有上通孔的支撑基板，设置在基板上并延伸到上通孔中的上焊盘，连接到第二电极的下焊盘 以及覆盖基板的底面的下金属层，并且通过下通路孔与下焊盘连接。

公开(公告)号：US09064697B2

公开(公告)日：2015-06-23

申请号：US14013000

申请日：2013-08-28

申请人： Silanna Semiconductor U.S.A., Inc.

发明人： Anton Arriagada ,  Michael A. Stuber ,  Stuart B. Molin

IPC分类号： H01L21/30 ,  H01L21/02 ,  H01L21/20 ,  H01L21/84 ,  H01L29/78 ,  H01L27/12

CPC分类号： H01L29/0692 ,  H01L21/02365 ,  H01L21/2007 ,  H01L21/268 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/76243 ,  H01L21/76251 ,  H01L21/7806 ,  H01L21/84 ,  H01L25/00 ,  H01L27/1203 ,  H01L29/7803

摘要： A trap rich layer for an integrated circuit chip is formed by chemical etching and/or laser texturing of a surface of a semiconductor layer. In some embodiments, a trap rich layer is formed by a technique selected from the group of techniques consisting of laser texturing, chemical etch, irradiation, nanocavity formation, porous Si-etch, semi-insulating polysilicon, thermal stress relief and mechanical texturing. Additionally, combinations of two or more of these techniques may be used to form a trap rich layer.

摘要翻译： 通过化学蚀刻和/或半导体层的表面的激光纹理来形成用于集成电路芯片的陷阱富集层。 在一些实施方案中，通过选自由激光纹理化学，化学蚀刻，照射，纳米腔形成，多孔硅蚀刻，半绝缘多晶硅，热应力释放和机械纹理组成的一组技术组成的技术形成陷阱富集层。 另外，可以使用这些技术中的两种或更多种的组合来形成富含阱的层。

公开(公告)号：US08912575B2

公开(公告)日：2014-12-16

申请号：US13718808

申请日：2012-12-18

申请人： SK Hynix Inc.

发明人： Min Gyu Koo

IPC分类号： H01L27/118 ,  H01L29/788 ,  H01L21/28 ,  H01L21/02 ,  H01L27/115

CPC分类号： H01L27/11524 ,  H01L21/02365 ,  H01L21/28273 ,  H01L27/11539 ,  H01L27/1157 ,  H01L29/788 ,  H01L29/7881

摘要： The semiconductor device includes a semiconductor substrate having a first active area defined by a first isolation layer; a gate insulating layer formed on the semiconductor substrate; a first conductive layer formed on the gate insulating layer; a dielectric layer formed on the first conductive layer; at least one first contact hole passing through the dielectric layer; a second conductive layer, formed on the dielectric layer, the second conductive layer filling the at least one first contact hole to contact the first conductive layer; and at least one first contact plug connected to the second conductive layer in the first active area, wherein the at least one first contact plug is offset from the at least one first contact hole to overlap the dielectric layer.

摘要翻译： 半导体器件包括具有由第一隔离层限定的第一有源区的半导体衬底; 形成在半导体衬底上的栅极绝缘层; 形成在所述栅绝缘层上的第一导电层; 形成在所述第一导电层上的电介质层; 至少一个穿过介电层的第一接触孔; 形成在所述电介质层上的第二导电层，所述第二导电层填充所述至少一个第一接触孔以接触所述第一导电层; 以及至少一个第一接触插塞，其连接到所述第一有源区域中的所述第二导电层，其中所述至少一个第一接触插塞从所述至少一个第一接触孔偏移以与所述介电层重叠。

公开(公告)号：US08896093B2

公开(公告)日：2014-11-25

申请号：US13720042

申请日：2012-12-19

申请人： Shekar Mallikararjunaswamy ,  Madhur Bobde

发明人： Shekar Mallikararjunaswamy ,  Madhur Bobde

IPC分类号： H01L29/73 ,  H01L27/02 ,  H01L21/02 ,  H01L29/861 ,  H01L23/60 ,  H01L29/732 ,  H01L27/07

CPC分类号： H01L27/0248 ,  H01L21/02365 ,  H01L23/60 ,  H01L27/0255 ,  H01L27/0727 ,  H01L29/0649 ,  H01L29/407 ,  H01L29/7304 ,  H01L29/7322 ,  H01L29/861 ,  H01L2924/0002 ,  H01L2924/00

摘要： A vertical TVS (VTVS) circuit includes a semiconductor substrate for supporting the VTVS device thereon having a heavily doped layer extending to the bottom of substrate. Deep trenches are provided for isolation between multi-channel VTVS. Trench gates are also provided for increasing the capacitance of VTVS with integrated EMI filter.

摘要翻译： 垂直TVS（VTVS）电路包括用于在其上支撑VTVS器件的半导体衬底，其具有延伸到衬底底部的重掺杂层。 提供深沟槽用于多声道VTVS之间的隔离。 还提供沟槽门，以增加集成EMI滤波器的VTVS电容。

公开(公告)号：US20140264456A1

公开(公告)日：2014-09-18

申请号：US14208803

申请日：2014-03-13

申请人： Semiconductor Components Industries, LLC

发明人： Ali Salih ,  John Michael Parsey, JR.

IPC分类号： H01L29/778 ,  H01L21/02

CPC分类号： H01L29/778 ,  H01L21/02365 ,  H01L21/187 ,  H01L21/6835 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7789 ,  H01L2221/68368

摘要： In an embodiment, a semiconductor device is formed by a method that includes, providing a base substrate of a first semiconductor material, and forming a layer that is one of SiC or a III-V series material on the base substrate. In a different embodiment, the base substrate may be one of silicon, porous silicon, or porous silicon with nucleation sites formed thereon, or silicon in a (111) plane.

摘要翻译： 在一个实施例中，通过一种方法形成半导体器件，该方法包括提供第一半导体材料的基底衬底，并在基底衬底上形成作为SiC或III-V系列材料之一的层。 在不同的实施例中，基底可以是其中形成有成核位点的硅，多孔硅或多孔硅中的一种，或（111）面内的硅。

公开(公告)号：US20140226710A1

公开(公告)日：2014-08-14

申请号：US14234289

申请日：2012-07-23

申请人： Hong-seok Park ,  Yong-je Kim ,  Hee-jean Kim ,  Seong-sin Joo ,  Dae-jong Lee ,  Jae-jun Lee ,  Yong-seok Jang ,  Yu-sung Joo

发明人： Hong-seok Park ,  Yong-je Kim ,  Hee-jean Kim ,  Seong-sin Joo ,  Dae-jong Lee ,  Jae-jun Lee ,  Yong-seok Jang ,  Yu-sung Joo

IPC分类号： H04L29/06

CPC分类号： H04L65/607 ,  H01L21/02365 ,  H04N13/161 ,  H04N13/194 ,  H04N19/00 ,  H04N19/12 ,  H04N19/187 ,  H04N19/37 ,  H04N19/597 ,  H04N21/234327 ,  H04N21/4622 ,  H04N21/6125 ,  H04N21/816

摘要： A transmitting apparatus includes a down-scaler configured to down-scale multimedia data; a first encoder configured to encode the down-scaled multimedia data; a first transmitter configured to transmit the encoded multimedia data through a first transmitting network; a decoder configured to decode the encoded multimedia data; an up-scaler configured to up-scale the decoded multimedia data; a restoration data generator configured to generate restoration data using the up-scaled multimedia data; a second encoder configured to encode the restoration data; and a second transmitter configured to transmit the encoded restoration data through a second transmitting network.

摘要翻译： 一种发送装置，包括被配置为缩小多媒体数据的下变频器; 第一编码器，被配置为对缩小的多媒体数据进行编码; 第一发送器，被配置为通过第一发送网络发送编码的多媒体数据; 解码器，被配置为对编码的多媒体数据进行解码; 上划分器，被配置为对已解码的多媒体数据进行升级; 恢复数据生成器，被配置为使用所述扩展的多媒体数据生成恢复数据; 第二编码器，被配置为对所述恢复数据进行编码; 以及第二发送器，被配置为通过第二发送网络发送经编码的恢复数据。