公开(公告)号：US09316362B2

公开(公告)日：2016-04-19

申请号：US14691936

申请日：2015-04-21

Applicant: NthDegree Technologies Worldwide Inc.

Inventor： Mark David Lowenthal ,  William Johnstone Ray ,  Neil O. Shotton ,  Richard A. Blanchard ,  Brad Oraw ,  Mark Allan Lewandowski ,  Jeffrey Baldridge ,  Eric Anthony Perozziello

IPC: H01J1/62 ,  H01L25/04 ,  F21K99/00 ,  H01L51/52 ,  H01L51/56 ,  H01L23/00 ,  F21V7/00 ,  F21V23/06 ,  H01L33/50 ,  H01L25/075 ,  H01L33/38 ,  H01L33/48 ,  F21V3/04 ,  F21V5/04 ,  F21V9/16 ,  F21V19/00 ,  F21V23/00 ,  F21V23/04 ,  H01L33/06 ,  H01L33/24 ,  H01L33/32 ,  H01L33/62 ,  F21Y101/02 ,  F21Y113/00 ,  F21Y103/00 ,  F21Y111/00 ,  H01L33/20

CPC classification number: F21V23/06 ,  F21K9/232 ,  F21K9/27 ,  F21V3/049 ,  F21V3/06 ,  F21V5/048 ,  F21V7/0066 ,  F21V9/30 ,  F21V19/0005 ,  F21V23/003 ,  F21V23/04 ,  F21Y2101/00 ,  F21Y2107/20 ,  F21Y2115/10 ,  H01L24/24 ,  H01L24/95 ,  H01L25/048 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/06 ,  H01L33/20 ,  H01L33/22 ,  H01L33/24 ,  H01L33/32 ,  H01L33/38 ,  H01L33/382 ,  H01L33/42 ,  H01L33/483 ,  H01L33/486 ,  H01L33/50 ,  H01L33/58 ,  H01L33/62 ,  H01L51/52 ,  H01L51/5203 ,  H01L51/56 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/95101 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13033 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

Abstract: An exemplary printable composition of a liquid or gel suspension of diodes generally includes a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary apparatus may include a plurality of diodes; at least a trace amount of a first solvent; and a polymeric or resin film at least partially surrounding each diode of the plurality of diodes. Various exemplary diodes have a lateral dimension between about 10 to 50 microns and about 5 to 25 microns in height. Other embodiments may also include a plurality of substantially chemically inert particles having a range of sizes between about 10 to about 50 microns.

Abstract translation: 二极管的液体或凝胶悬浮液的示例性可印刷组合物通常包括多个二极管，第一溶剂和/或粘度调节剂。 示例性装置可以包括多个二极管; 至少微量的第一溶剂; 以及至少部分地围绕所述多个二极管的每个二极管的聚合物或树脂膜。 各种示例性二极管的高度为约10至50微米和约5至25微米之间的横向尺寸。 其它实施方案还可以包括多个基本上化学惰性的颗粒，其尺寸范围在约10至约50微米之间。

公开(公告)号：US09281298B2

公开(公告)日：2016-03-08

申请号：US14616347

申请日：2015-02-06

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： William Johnstone Ray ,  Mark David Lowenthal ,  Lixin Zheng

IPC: H01L29/00 ,  H01L25/075 ,  H01L33/06 ,  H01L33/32 ,  H01L33/40 ,  H01L33/42 ,  H01L33/48 ,  H01L33/62

CPC classification number: H01L33/56 ,  H01L25/0753 ,  H01L33/06 ,  H01L33/32 ,  H01L33/405 ,  H01L33/42 ,  H01L33/486 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2933/0066 ,  H01L2924/00 ,  H01L2924/0001

Abstract: A flexible light sheet includes a bottom conductor layer overlying a flexible substrate. An array of vertical light emitting diodes (VLEDs) is printed as an ink over the bottom conductor layer so that bottom electrodes of the VLEDs electrically contact the bottom conductor layer. A top electrode of the VLEDs is formed of a first transparent conductor layer, and a temporary hydrophobic layer is formed over the first transparent conductor layer. A dielectric material is deposited between the VLEDs but is automatically de-wetted off the hydrophobic layer. The hydrophobic layer is then removed, and a second transparent conductor layer is deposited to electrically contact the top electrode of the VLEDs. The VLEDs can be made less than 10 microns in diameter since no top metal bump electrode is used. The VLEDs are illuminated by a voltage differential between the bottom conductor layer and the second transparent conductor layer.

公开(公告)号：US09229597B2

公开(公告)日：2016-01-05

申请号：US14186172

申请日：2014-02-21

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Bradley Steven Oraw

IPC: G06F3/044

CPC classification number: G06F3/044 ,  G06F2203/04103 ,  H01H2239/006

Abstract: A layer of microscopic printed VLEDs is sandwiched between a first conductor layer and a transparent second conductor layer so that light exits the second conductor layer. Touch sensor electrodes are formed overlying the VLED layer so that the VLEDs illuminate the touch sensor. In one embodiment, the touch sensor electrodes are independent from the conductor layers for the VLEDs. In another embodiment, the transparent second conductor layer also serves as a touch sensor electrode. In another embodiment, both the conductor layers for the VLEDs serve as touch sensor electrodes. The conductor layers for the VLEDs may be segmented in groups to selectively illuminate groups of the VLEDs under each touch sensor position. The touch sensor electrodes may be transparent or opaque, depending on whether the electrodes are intended to allow the VLED light to pass through.

Abstract translation: 在第一导体层和透明第二导体层之间夹有显微印刷的VLED层，使得光离开第二导体层。 触摸传感器电极形成在VLED层上方，以便VLED照亮触摸传感器。 在一个实施例中，触摸传感器电极独立于用于VLED的导体层。 在另一个实施例中，透明第二导体层还用作触摸传感器电极。 在另一个实施例中，VLED的导体层都用作触摸传感器电极。 用于VLED的导体层可以被分组成组，以在每个触摸传感器位置下选择性地照亮VLED的组。 根据电极是否允许VLED光通过，触摸传感器电极可以是透明或不透明的。

公开(公告)号：US09177992B2

公开(公告)日：2015-11-03

申请号：US14204965

申请日：2014-03-11

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Richard Austin Blanchard ,  Bradley Steven Oraw

IPC: H01L21/00 ,  H01L27/15

CPC classification number: H01L27/153 ,  H01L27/15 ,  H01L33/32

Abstract: An LED module is disclosed containing an integrated driver transistor (e.g, a MOSFET) in series with an LED. In one embodiment, LED layers are grown over a substrate. The transistor regions are formed over the same substrate. After the LED layers, such as GaN layers, are grown to form the LED portion, a central area of the LED is etched away to expose a semiconductor surface in which the transistor regions are formed. A conductor connects the transistor in series with the LED. Another node of the transistor is electrically coupled to an electrode on the bottom surface of the substrate. In one embodiment, an anode of the LED is connected to one terminal of the module, one current carrying node of the transistor is connected to a second terminal of the module, and the control terminal of the transistor is connected to a third terminal of the module.

Abstract translation: 公开了一种LED模块，其包含与LED串联的集成驱动晶体管（例如，MOSFET）。 在一个实施例中，LED层在衬底上生长。 晶体管区域形成在相同的衬底上。 在诸如GaN层的LED层被生长以形成LED部分之后，将LED的中心区域蚀刻掉以暴露其中形成晶体管区域的半导体表面。 导体将晶体管与LED串联连接。 晶体管的另一节点电耦合到衬底的底表面上的电极。 在一个实施例中，LED的阳极连接到模块的一个端子，晶体管的一个馈电节点连接到模块的第二端子，并且晶体管的控制端子连接到模块的第三端子 模块。

公开(公告)号：US20150267907A1

公开(公告)日：2015-09-24

申请号：US14731129

申请日：2015-06-04

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Travis Thompson ,  Bradley Steven Oraw

IPC: F21V23/06 ,  F21V21/005 ,  F21K99/00

CPC classification number: F21V23/06 ,  F21K9/20 ,  F21K9/64 ,  F21S2/005 ,  F21V21/005 ,  F21Y2105/10 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0066 ,  H01L2924/00

Abstract: A system of interconnectable LED light emitting tiles includes identical tiles having a light emitting area that extends all the way to two contiguous edges. One set of anode and cathode interconnects is accessible from the underside of one edge of the tile, and a second set of anode and cathode interconnects is accessible from the top side of an opposite edge of the tile. The second set of anode and cathode interconnects extends out from the light emitting area on the top side. When tiles are interconnected together, their interconnection edges overlap to make the electrical interconnections, while the light emitting areas of all the tiles abut to form a large seamless light emitting area. The flexible tiles may be mounted on a backplane that includes anode and cathode conductors for electrically interconnecting the tiles. A large, addressable display may be formed using interconnected tiles.

Abstract translation: 可互连的LED发光砖的系统包括具有一直延伸到两个相邻边缘的发光区域的相同的瓦片。 一组阳极和阴极互连可从瓦片的一个边缘的下侧接近，并且第二组阳极和阴极互连可从瓦片的相对边缘的顶侧进入。 第二组阳极和阴极互连从顶侧的发光区域延伸出来。 当瓦片互连在一起时，它们的互连边缘重叠以形成电互连，而所有瓦片的发光区域邻接以形成大的无缝发光区域。 柔性瓦片可以安装在包括用于电互连瓦片的阳极和阴极导体的背板上。 可以使用互连瓦片形成大的可寻址显示器。

公开(公告)号：US09136065B2

公开(公告)日：2015-09-15

申请号：US13944211

申请日：2013-07-17

Applicant: NthDegree Technologies Worldwide Inc.

Inventor： Vera N. Lockett ,  John G. Gustafson ,  Mark D. Lowenthal ,  William J. Ray

IPC: G09F3/00 ,  H01G11/52 ,  H01M2/16 ,  H01G11/24 ,  H01G11/38 ,  H01G11/46 ,  H01M4/62

CPC classification number: C01B33/18 ,  B01D21/262 ,  B04B7/12 ,  H01G11/24 ,  H01G11/26 ,  H01G11/36 ,  H01G11/38 ,  H01G11/46 ,  H01G11/52 ,  H01M2/1646 ,  H01M4/62 ,  Y02E60/13

Abstract: A printed energy storage device includes a first electrode, a second electrode, and a separator between the first and the second electrode. At least one of the first electrode, the second electrode, and the separator includes frustules, for example of diatoms. The frustules may have a uniform or substantially uniform property or attribute such as shape, dimension, and/or porosity. A property or attribute of the frustules can also be modified by applying or forming a surface modifying structure and/or material to a surface of the frustules. A membrane for an energy storage device includes frustules. An ink for a printed film includes frustules.

Abstract translation: 印刷储能装置包括第一电极，第二电极和第一和第二电极之间的隔板。 第一电极，第二电极和分离器中的至少一个包括例如硅藻的截头圆锥体。 截头锥体可以具有均匀或基本均匀的性质或属性，例如形状，尺寸和/或孔隙率。 还可以通过将表面改性结构和/或材料施加或形成至截头体的表面来改变截头体的特性或属性。 用于能量存储装置的膜包括截头圆锥体。 用于印刷膜的油墨包括截头圆锥体。

公开(公告)号：US09074758B2

公开(公告)日：2015-07-07

申请号：US14162257

申请日：2014-01-23

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Bradley Steven Oraw ,  Marc Oliver Meier

IPC: H01R33/00 ,  F21V23/06 ,  F21K99/00 ,  H01L25/075 ,  F21V21/005 ,  F21Y101/02

CPC classification number: F21V23/06 ,  F21K9/20 ,  F21K9/64 ,  F21V21/005 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A system of interlocking LED panel tiles includes a first tile having at least one layer of light emitting diodes (LEDs) provided on a substrate, where the substrate is mounted on a substantially rectangular supporting plate having interlocking features. The substrate overlaps the interlocking features. The first tile has a set of positive and negative voltage conductors running between the two sets of opposite edges of the tile as busses. Multiple identical tiles are provided. Each tile has the interlocking features along their edges that firmly physically connect to abutting tiles to create a lamp having any pattern of tiles selected by the user. By interlocking the tiles, the positive and negative conductors are automatically connected to electrically connect the LEDs in the tiles in parallel, and the interlocking features are hidden by the overlying substrate. Additional conductors may be used to provide greater interconnection flexibility.

Abstract translation: 互锁LED面板瓦的系统包括具有设置在基板上的至少一层发光二极管（LED）的第一瓦片，其中基板安装在具有互锁特征的大致矩形的支撑板上。 基板与互锁特征重叠。 第一瓦片具有一组在瓦片的两组相对边缘之间运行的正和负电压导体作为总线。 提供多个相同的瓷砖。 每个瓦片沿其边缘具有互锁特征，其牢固地物理地连接到邻接的瓦片，以产生具有由用户选择的瓦片的任何图案的灯。 通过互锁瓦片，正和负导体自动连接以平行地电连接瓦片中的LED，并且互锁特征被上覆基板隐藏。 可以使用附加导体来提供更大的互连灵活性。

公开(公告)号：US09035174B2

公开(公告)日：2015-05-19

申请号：US13718978

申请日：2012-12-18

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Tricia A. Youngbull ,  William J. Ray ,  Lixin Zheng ,  Mark D. Lowenthal ,  Vera N. Lockett ,  Theodore I. Kamins ,  Neil O. Shotton

IPC: H01L31/054 ,  H01L31/055 ,  H01L31/103 ,  H01L31/0232 ,  H01L31/0216 ,  H01L31/0352 ,  H01L31/068 ,  H01L31/075 ,  H01L31/18

CPC classification number: H01L31/1804 ,  H01L31/02168 ,  H01L31/022425 ,  H01L31/02322 ,  H01L31/02327 ,  H01L31/035281 ,  H01L31/03529 ,  H01L31/055 ,  H01L31/068 ,  H01L31/075 ,  H01L31/1864 ,  Y02E10/52 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

Abstract: A PV panel uses an array of small silicon sphere diodes (10-300 microns in diameter) connected in parallel. The spheres are embedded in an uncured aluminum-containing layer, and the aluminum-containing layer is heated to anneal the aluminum-containing layer as well as p-dope the bottom surface of the spheres. A phosphorus-containing layer is deposited over the spheres to dope the top surface n-type, forming a pn junction. The phosphorus layer is then removed. A conductor is deposited to contact the top surface. Alternatively, the spheres are deposited with a p-type core and an n-type outer shell. After deposition, the top surface is etched to expose the core. A first conductor layer contacts the bottom surface, and a second conductor layer contacts the exposed core. A liquid lens material is deposited over the rounded top surface of the spheres and cured to provide conformal lenses designed to increase the PV panel efficiency.

Abstract translation: PV面板使用并联连接的小硅球二极管阵列（直径10-300微米）。 将球体嵌入未固化的含铝层中，并且对含铝层进行加热以使含铝层退火，并对球体的底表面进行p涂覆。 在球体上沉积含磷层以掺杂顶表面n型，形成pn结。 然后除去磷层。 沉积导体以接触顶表面。 或者，球体沉积有p型芯和n型外壳。 沉积后，顶表面被蚀刻以露出芯。 第一导体层接触底表面，并且第二导体层接触暴露的芯。 液体透镜材料沉积在球体的圆形顶表面上并固化以提供设计用于增加PV面板效率的适形透镜。

公开(公告)号：US08999742B1

公开(公告)日：2015-04-07

申请号：US14101554

申请日：2013-12-10

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Mark D. Lowenthal ,  Tricia A. Youngbull ,  William J. Ray

IPC: H01L31/18 ,  B29C39/00 ,  B29C39/02 ,  B29C39/38 ,  B29C39/36 ,  B29C39/26 ,  B29C33/38 ,  B29K105/00 ,  B29L31/34

CPC classification number: H01L31/1804 ,  B29C33/3842 ,  B29C39/003 ,  B29C39/02 ,  B29C39/26 ,  B29C39/36 ,  B29C39/38 ,  B29K2105/0064 ,  B29K2105/251 ,  B29K2909/08 ,  B29K2995/0005 ,  B29K2995/0094 ,  B29L2031/3406 ,  H01L21/02532 ,  H01L21/02601 ,  H01L21/02628 ,  H01L31/035209 ,  H01L31/035281 ,  Y02E10/547 ,  Y02P70/521

Abstract: Small silicon spheres, less than 200 um in diameter, are desirable for use in forming solar panels. To make such small spheres, a large-area glass substrate has etched in its surface millions of identical indentations, such as having diameters less than 200 um. A silicon ink, formed of a fluid containing nanoparticles of milled silicon, is then deposited over the substrate to completely fill the indentations, and the excess ink is removed. The ink is heated to evaporate the fluid and melt the silicon nanoparticles. A photonic system is used to rapidly melt the silicon. The melted silicon forms a sphere in each indentation by surface tension. Since the density of the silicon in the ink and the volume of each indentation are well defined, the volume of each sphere is well defined. The substrates are reusable. Hundreds of millions of spheres may be produced per minute using the process.

Abstract translation: 直径小于200um的小硅球是用于形成太阳能电池板的理想材料。 为了制造这样的小球体，大面积玻璃基板在其表面上蚀刻了数百万个相同的凹痕，例如直径小于200μm。 然后将由含有研磨硅的纳米颗粒的流体形成的硅油墨沉积在基材上以完全填充凹痕，并且除去多余的油墨。 将油墨加热以蒸发流体并熔化硅纳米颗粒。 光子系统用于快速熔化硅。 熔融的硅通过表面张力在每个压痕中形成球体。 由于油墨中的硅的密度和每个压痕的体积被很好地限定，所以每个球体的体积被很好地限定。 底物可重复使用。 使用该过程可能每分钟产生数亿个球体。

公开(公告)号：US08940627B2

公开(公告)日：2015-01-27

申请号：US14075089

申请日：2013-11-08

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Richard A. Blanchard ,  William J. Ray ,  Mark D. Lowenthal ,  Xiaorong Cai ,  Theodore Kamins

IPC: H01L21/44 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/288 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L21/288 ,  H01L21/486 ,  H01L21/76879 ,  H01L21/76882 ,  H01L21/76898 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/5328 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/19 ,  H01L24/80 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03002 ,  H01L2224/0332 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/08146 ,  H01L2224/08165 ,  H01L2224/73265 ,  H01L2224/76155 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/12042 ,  H01L2224/03 ,  H01L2224/80 ,  H01L2924/00

Abstract: Vias (holes) are formed in a wafer or a dielectric layer. A low viscosity conductive ink, containing microscopic metal particles, is deposited over the top surface of the wafer to cover the vias. An external force is applied to urge the ink into the vias, including an electrical force, a magnetic force, a centrifugal force, a vacuum, or a suction force for outgassing the air in the vias. Any remaining ink on the surface is removed by a squeegee, spinning, an air knife, or removal of an underlying photoresist layer. The ink in the vias is heated to evaporate the liquid and sinter the remaining metal particles to form a conductive path in the vias. The resulting wafer may be bonded to one or more other wafers and singulated to form a 3-D module.

Abstract translation: 通孔（孔）形成在晶片或电介质层中。 包含微观金属颗粒的低粘度导电油墨沉积在晶片的顶表面上以覆盖通孔。 施加外力以将油墨推入通孔中，包括用于使过孔中的空气排气的电力，磁力，离心力，真空或吸力。 表面上的任何剩余的油墨都被刮刀，纺丝，气刀或下面的光致抗蚀剂层除去。 将通孔中的油墨加热以蒸发液体并烧结剩余的金属颗粒，以在通孔中形成导电路径。 所得到的晶片可以结合到一个或多个其它晶片并且被单个化以形成3-D模块。