Abstract:
A method of making an engineering change to a printed wiring board changes connection for a terminal of an electronic component which is mounted on the printed wiring board through a terminal pad. The terminal is electrically connected to a destination through the terminal pad and wiring within the printed wiring board. The present invention places an insulator, including an insulating material and a conductive layer formed thereon, between the terminal and the terminal pad. The electronic component is mounted on the printed wiring board and the terminal is electrically connected to the conductive layer. A discrete wire is placed between the conductive layer and the destination.
Abstract:
The present invention relates to a connector structure for soldering a wiring substrate such as a ceramic wiring substrate to a connector provided on a printed board and also pertains to semiconductor device packages using the same. It is an object of the present invention to provide a connector structure which provides highly reliable electrical connection, together with semiconductor device package using the same. The object is attained by soldering a ceramic wiring substrate to a connector which involves a heater.
Abstract:
A novel plastic molded chip carrier package for an integrated circuit chip has a carrier member molded of a plastic material to which are integrally embedded a plurality of I/O pins and a conductor member for interconnection between the terminals of the chip and the corresponding I/O pins to provide a unitary construction obtained at a single molding process. This plastic molded chip carrier package is preferred to have integral positioning studs which project in the same direction of the I/O pins for abutment against a printed circuit board for mounting the package in a spaced relation thereto with the I/O pins plugged into metallized through holes provided in the board. A method of fabricating the plastic chip carrier package is also disclosed to comprise the steps of placing a plurality of I/O pins into corresponding vertical slots formed in a molding die with the top portion of the I/O pins projecting above the molding die surface; supporting a conductor member on the I/O pins with the distal top ends of the I/O pins extending into correspondingly through holes formed in the conductor member, the conductor member including a plurality of conductor lines for electrical interconnection between the individual I/O pins and the terminals of the chip; and filling a molten plastic material at least between the conductor member and the molding die surface and solidifying the same so as to form thereat a plastic carrier member to which the conductor member is integrally embedded together with the top portions of the I/O pins.
Abstract:
A solder preform and technique for making same is disclosed for use in a one time flux process for attaching electronic modules to printed circuit substrates via plated through holes or surface mount pads.
Abstract:
An electrical assembly having an integrated circuit package which has a plurality of electrical conductors fixed thereto. The electrical conductors form mechanical and electrical connections. Each of the electrical conductors has a root at one end and a tip at the other end. The root of each conductor is attached to the integrated circuit package to form a fixed electrical and mechanical connection. The tip of each conductor is adapted to be connected to a surface at a predetermined location. Each of the electrical conductors has at least two bends between the root and the tip for providing strain relief when the tip is connected to a surface.
Abstract:
High frequency noise is decoupled from power supplied to a Pin Grid Array (PGA) package by insertion of a decoupling capacitor between the PGA package and printed circuit board. The decoupling capacitor comprises a multi layer capacitive element sandwiched between a pair of conductors and having a plurality of leads extending from each conductor. In accordance with the present invention, the decoupling capacitor is individually dimensioned and configured to fit under a PGA package and correspond to the power and ground pin configuration of that PGA package.
Abstract:
An improved electronic component or integrated circuit (IC) package characterized by an extraordinary small size for the number of input-output (I/O) leads which are available and capable of use on surface mounted, Flat Pack, hybrid, or through hole (DIP) printed circuit boards. The package has one or more cylindrical or shaped forms at the base, with a flange to provide a stop in order to limit the insertion travel in those circuit boards having through holes, and a top body which is used to house the electronic device. The forms, which protrude down from the upper body (housing), have one or more conductive lead segments, either pins or printed circuit types, running longitudinally and continuing through the housing to the upper body.Each lead segment is connected directly to the electronic device or attached via an additonal lead to a pad on the electronic device, mounted on the upper body. A cover to seal the device is provided. Grooves in the body or on the cover aid in handling the device, either manually or by automatic machinery, are provided. These grooves also provide gripping areas for top hat heat sinks.
Abstract:
A semiconductor termination socket for use with a printed wiring board has a mounting socket base for attachment to the board and plural pin socket receiving elements in the base for connecting to leads of a semiconductor chip package which will be removably inserted into the socket. The socket further has electrical components fabricated within the socket base for connecting a pin of the socket and a termination potential. The electrical components are preferably fabricated using planar technology so that the socket becomes, in essence, a printed wiring board. The semiconductor packages can be of any configuration including, for example, 149 pin grid array packages. If more than one layer of component circuitry is needed, a plurality of layers can be embedded within the mounting socket.
Abstract:
An apparatus, includes a PCB, a semiconductor package that includes a substrate and a stiffener with an opening, and at least one connection component. The stiffener is disposed on a top surface of the PCB. The at least one connection component is configured to connect the PCB to the semiconductor package. The at least one connection component may include another PCB that is disposed on the substrate within the opening of the stiffener and on the PCB. The at least one connection component may include an array of connectors that are disposed on the substrate within the opening of the stiffener, and may include a socket disposed on the PCB. The at least one connection component may include a BGA that is disposed on the substrate within the opening of the stiffener and on the PCB and on a pedestal portion of a surface of the PCB.
Abstract:
Methods and apparatus relating to integrating System in Package (SiP) with Input/Output (IO) board for platform miniaturization are described. In an embodiment, a SiP board includes a plurality of logic components. An IO board is coupled to the SiP board via a grid array. The plurality of logic components is provided on both sides of the SiP board and one or more of the plurality of logic components are to positioned in an opening in the IO board. Other embodiments are also disclosed and claimed.