公开(公告)号：US11990424B2

公开(公告)日：2024-05-21

申请号：US18303308

申请日：2023-04-19

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  KyungHwan Kim ,  HeeSoo Lee ,  ChangOh Kim ,  KyoungHee Park ,  JinHee Jung ,  OMin Kwon ,  JiWon Lee ,  YuJeong Jang

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/49822

Abstract: A semiconductor package has a substrate, a first component disposed over the substrate, an encapsulant deposited over the first component, and a second component disposed over the substrate outside the encapsulant. A metal mask is disposed over the second component. A shielding layer is formed over the semiconductor package. The metal mask after forming the shielding layer. The shielding layer is optionally formed on a contact pad of the substrate while a conic area above the contact pad that extends 40 degrees from vertical remains free of the encapsulant and metal mask while forming the shielding layer. Surfaces of the metal mask and encapsulant oriented toward the contact pad can be sloped. The metal mask can be disposed and removed using a pick-and-place machine.

公开(公告)号：US20240153783A1

公开(公告)日：2024-05-09

申请号：US18543992

申请日：2023-12-18

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  Gwang Kim ,  Junho Ye

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/60 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L21/4853 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/60 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/81815 ,  H01L2924/1532

Abstract: A semiconductor device has a substrate and a first component disposed over a first surface of the substrate. A connector is disposed over the first surface of the substrate. A first encapsulant is deposited over the first component while the connector remains outside of the first encapsulant. A shielding layer is formed over the first encapsulant while the connector remains outside of the shielding layer. A second component is disposed over a second surface of the substrate. A solder bump is disposed over the second surface of the substrate. A second encapsulant is deposited over the second surface of the substrate. An opening is formed through the second encapsulant to expose the solder bump. A solder ball is disposed in the opening. The solder ball and solder bump are reflowed to form a combined solder bump.

公开(公告)号：US20240128201A1

公开(公告)日：2024-04-18

申请号：US18390051

申请日：2023-12-20

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  Gwang Kim ,  Junho Ye ,  YouJoung Choi ,  MinKyung Kim ,  Yongwoo Lee ,  Namgu Kim

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L23/64 ,  H01L23/66 ,  H01Q1/24 ,  H01Q1/40

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/645 ,  H01L23/66 ,  H01Q1/243 ,  H01Q1/40 ,  H01L2223/6677

Abstract: A semiconductor device has a substrate and an electrical component disposed over a surface of the substrate. An antenna interposer is disposed over the substrate. A first encapsulant is deposited around the antenna interposer. The first encapsulant has a high dielectric constant. The antenna interposer has a conductive layer operating as an antenna and an insulating layer having a low dielectric constant less than the high dielectric constant of the first encapsulant. The antenna interposer is made from an antenna substrate having a plurality of antenna interposers. Bumps are formed over the antenna substrate and the antenna substrate is singulated to make the plurality of antenna interposers. A second encapsulant is deposited over the electrical component. The second encapsulant has a low dielectric constant less than the high dielectric constant of the first encapsulant. A shielding layer is disposed over the second encapsulant.

公开(公告)号：US11961764B2

公开(公告)日：2024-04-16

申请号：US17231591

申请日：2021-04-15

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Thomas J. Strothmann ,  Damien M. Pricolo ,  Il Kwon Shim ,  Yaojian Lin ,  Heinz-Peter Wirtz ,  Seung Wook Yoon ,  Pandi C. Marimuthu

IPC: H01L23/28 ,  H01L21/56 ,  H01L21/683 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/28 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/522 ,  H01L24/12 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L24/73 ,  H01L2221/68327 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/11 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/951 ,  H01L2224/97 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/97 ,  H01L2224/83 ,  H01L2224/97 ,  H01L2224/85 ,  H01L2924/15311 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/97 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/12041 ,  H01L2924/00 ,  H01L2924/1306 ,  H01L2924/00 ,  H01L2924/01322 ,  H01L2924/00 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00

Abstract: A semiconductor device has a carrier with a fixed size. A plurality of first semiconductor die is singulated from a first semiconductor wafer. The first semiconductor die are disposed over the carrier. The number of first semiconductor die on the carrier is independent from the size and number of first semiconductor die singulated from the first semiconductor wafer. An encapsulant is deposited over and around the first semiconductor die and carrier to form a reconstituted panel. An interconnect structure is formed over the reconstituted panel while leaving the encapsulant devoid of the interconnect structure. The reconstituted panel is singulated through the encapsulant. The first semiconductor die are removed from the carrier. A second semiconductor die with a size different from the size of the first semiconductor die is disposed over the carrier. The fixed size of the carrier is independent of a size of the second semiconductor die.

公开(公告)号：US20240120291A1

公开(公告)日：2024-04-11

申请号：US18482849

申请日：2023-10-07

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh KIM ,  JinHee JUNG

IPC: H01L23/552 ,  H01L21/56 ,  H01L21/66 ,  H01L23/31 ,  H01L23/544

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L22/12 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/544 ,  H01L2223/54453

Abstract: A semiconductor device and a method for making the same are provided. The method includes: providing a package including: a substrate including a top substrate surface and a bottom substrate surface; an electronic component mounted on the top substrate surface; and a first encapsulant disposed on the top substrate surface and encapsulating the electronic component; forming a fiducial mark in the first encapsulant; and forming a first shielding layer on the first encapsulant using an aerosol jetting apparatus, wherein the first shielding layer is at a predetermined distance from the fiducial mark and above the electronic component.

公开(公告)号：US20240112981A1

公开(公告)日：2024-04-04

申请号：US18475238

申请日：2023-09-27

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh KIM ,  SeungHyun LEE ,  HeeSoo LEE

IPC: H01L23/42 ,  H01L21/48 ,  H01L23/00 ,  H01L23/367 ,  H01L23/48 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L23/42 ,  H01L21/4882 ,  H01L23/367 ,  H01L23/481 ,  H01L24/32 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32245 ,  H01L2225/06568

Abstract: A semiconductor device comprises a substrate; a primary semiconductor die attached onto the substrate comprising a front surface and a back surface, wherein the primary semiconductor die has a first region and a second region besides the first region; an auxiliary semiconductor die attached onto the front surface at the first region; a heat transfer block comprising a main body attached onto the front surface at the second region; a metal layer wrapping around the main body; a graphene layer formed outside of the metal layer; a heat spreader attached onto the substrate and defining with the substrate a chamber for accommodating the primary semiconductor die, the auxiliary semiconductor die and the heat transfer block, wherein the graphene layer extends between the heat spreader and the front surface such that heat generated by the first region can be transferred to the heat spreader through the graphene layer.

公开(公告)号：US20240105630A1

公开(公告)日：2024-03-28

申请号：US17936037

申请日：2022-09-28

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Yaojian Lin ,  Linda Pei Ee Chua ,  Ching Meng Fang ,  Hin Hwa Goh

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/552 ,  H01L25/16

CPC classification number: H01L23/5385 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5386 ,  H01L23/552 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/96 ,  H01L24/97 ,  H01L25/162 ,  H01L25/165 ,  H01L21/563 ,  H01L24/81 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/95001 ,  H01L2924/182 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/37001

Abstract: A semiconductor device has a first RDL substrate with first conductive pillars formed over a first surface of the first RDL substrate. A first electrical component is disposed over the first surface of the first RDL substrate. A hybrid substrate is bonded to the first RDL substrate. An encapsulant is deposited around the hybrid substrate and first RDL substrate with the first conductive pillars and first electrical component embedded within the encapsulant. A second RDL substrate with second conductive pillars formed over the second RDL substrate and second electrical component disposed over the second RDL substrate can be bonded to the hybrid substrate. A second RDL can be formed over a second surface of the first RDL substrate. A third electrical component is disposed over a second surface of the first RDL substrate. A shielding frame is disposed over the third electrical component.

公开(公告)号：US11935840B2

公开(公告)日：2024-03-19

申请号：US17817461

申请日：2022-08-04

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  KyoWang Koo ,  SungWon Cho ,  BongWoo Choi ,  JiWon Lee

IPC: H01L23/552 ,  H01L21/56 ,  H01L21/60 ,  H01L23/00 ,  H01L23/28 ,  H01L23/66 ,  H01L25/00

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L23/28 ,  H01L23/66 ,  H01L24/94 ,  H01L25/50 ,  H01L2021/60112

Abstract: A semiconductor device has a substrate. A first component and second component are disposed over the substrate. The first component includes an antenna. A lid is disposed over the substrate between the first component and second component. An encapsulant is deposited over the substrate and lid. A conductive layer is formed over the encapsulant and in contact with the lid. A first portion of the conductive layer over the first component is removed using laser ablation.

公开(公告)号：US11935777B2

公开(公告)日：2024-03-19

申请号：US17457155

申请日：2021-12-01

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HyeonChul Lee ,  HunTeak Lee ,  HyunSu Tak ,  Wanil Lee ,  InHo Seo

IPC: H01L21/683 ,  H01L21/56 ,  H01L21/77

CPC classification number: H01L21/6835 ,  H01L21/561 ,  H01L21/77

Abstract: A semiconductor device is manufactured using a support base and a filling material formed on the support base. The filling material can be a plurality of protrusions or penetrable film. The protrusions are attached to the support base with an adhesive. The protrusions have a variety of shapes such as square frustum, conical frustum, three-sided pyramid with a flat top, four-sided rectangular body, and elongated square frustum. A semiconductor wafer is disposed over the support base with the filling material extending into openings in the semiconductor wafer. The openings in the semiconductor wafer can have slanted sidewalls, or a more complex shape such as ledges and vertical projections. The filling material may substantially fill the openings in the semiconductor wafer. The protrusions may partially fill the openings in the semiconductor wafer. The protrusions occupy at least a center of the openings in the semiconductor wafer.

公开(公告)号：US20240071885A1

公开(公告)日：2024-02-29

申请号：US17823827

申请日：2022-08-31

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Yaojian Lin ,  Linda Pei Ee Chua ,  Jian Zuo ,  Hin Hwa Goh

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L25/16

CPC classification number: H01L23/49833 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/16 ,  H01L25/16 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/3511

Abstract: A semiconductor device has a first hybrid substrate with a first thickness, and a second hybrid substrate with a second thickness different from the first thickness of the first hybrid substrate. An encapsulant is deposited around the first hybrid substrate and second hybrid substrate. A portion of the first hybrid substrate and a portion of the second hybrid substrate and a portion of the encapsulant can be removed after encapsulation to achieve uniform thickness for the first hybrid substate and second hybrid substrate. The first hybrid substrate has an embedded substrate, a first interconnect structure formed over a first surface of the embedded substrate, and a second interconnect structure formed over a second surface of the embedded substrate opposite the first surface of the embedded substrate. A plurality of conductive pillars is formed over the first interconnect structure. A plurality of conductive vias is formed through the embedded substrate.