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30 条记录 (耗时 0.03 秒)

    Semiconductor package and method for manufacturing the same
    13.
    发明授权
    Semiconductor package and method for manufacturing the same 有权
    半导体封装及其制造方法

    公开(公告)号：US06846704B2

    公开(公告)日：2005-01-25

    申请号：US10680280

    申请日：2003-10-07

    申请人： Jong Sik Paek

    发明人： Jong Sik Paek

    IPC分类号： H01L23/04 ,  H01L23/31 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

    CPC分类号： H01L23/3114 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2224/05599

    摘要： A semiconductor package is provided which includes a semiconductor die having opposed, generally planar first and second surfaces and a peripheral edge. Formed on the second surface of the semiconductor die in close proximity to the peripheral edge thereof is a plurality of bond pads. The semiconductor package further includes a plurality of leads which are positioned about the peripheral edge of the semiconductor die in space relation to the second surface thereof. Each of the leads includes opposed, generally planar first and second surfaces, and a generally planar third surface which is oriented between the first and second surfaces in opposed relation to a portion of the second surface. In the semiconductor package, a plurality of conductive bumps are used to electrically and mechanically connect the bond pads of the semiconductor die to the third surfaces of the respective ones of the leads. An encapsulating portion is applied to and partially encapsulates the leads, the semiconductor die, and the conductive bumps.

    摘要翻译： 提供一种半导体封装，其包括具有相对的大致平面的第一和第二表面和周边的半导体管芯。 形成在半导体管芯的靠近其周缘的第二表面上的是多个接合焊盘。 所述半导体封装还包括多个引线，所述引线围绕所述半导体管芯的周边边缘与其第二表面呈空间关系。 每个引线包括相对的，大致平面的第一和第二表面，以及大致平坦的第三表面，其在与第二表面的一部分相对的第一和第二表面之间取向。 在半导体封装中，使用多个导电凸块将半导体管芯的焊盘电连接和机械地连接到各个引线的第三表面。 将封装部分施加到部分地封装引线，半导体管芯和导电凸块。

    Semiconductor package including flip chip
    17.
    发明授权
    Semiconductor package including flip chip 有权

    公开(公告)号：US07045882B2

    公开(公告)日：2006-05-16

    申请号：US10944314

    申请日：2004-09-17

    申请人： Jong Sik Paek

    发明人： Jong Sik Paek

    IPC分类号： H01L23/495

    CPC分类号： H01L23/4951 ,  H01L23/3107 ,  H01L23/49551 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2224/05599

    摘要： A semiconductor package comprising a plurality of leads. Each of the leads defines opposed first and second surfaces. Also included in the semiconductor package is a semiconductor chip which defines opposed first and second surfaces, and includes a plurality of input/output pads disposed on the first surface thereof. A plurality of conductive bumps are used to electrically connect the input/output pads of the semiconductor package to the second surfaces of respective ones of the leads. An encapsulant portion of the semiconductor package covers the semiconductor chip, the conductive bumps, and the second surfaces of the leads such that at least portions of the first surfaces of the leads are exposed within the encapsulant portion.