公开(公告)号：US08362612B1

公开(公告)日：2013-01-29

申请号：US12728119

申请日：2010-03-19

申请人： Jong Sik Paek ,  Eun Sook Sohn ,  In Bae Park ,  Won Chul Do ,  Glenn A. Rinne

发明人： Jong Sik Paek ,  Eun Sook Sohn ,  In Bae Park ,  Won Chul Do ,  Glenn A. Rinne

IPC分类号： H01L21/00

CPC分类号： H01L21/76885 ,  H01L23/3192 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/0558 ,  H01L2224/05647 ,  H01L2224/10126 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2924/181 ,  H01L2924/01082 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01083 ,  H01L2924/0103 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/00

摘要： A semiconductor device and a manufacturing method thereof are disclosed. A first insulation layer is formed on a semiconductor die, a redistribution layer electrically connected to a bond pad is formed on the first insulation layer, and a second insulation layer covers the redistribution layer. The second insulation layer is made of a cheap, non-photosensitive material. Accordingly, the manufacturing cost of the semiconductor device can be reduced.

摘要翻译： 公开了一种半导体器件及其制造方法。 在半导体管芯上形成第一绝缘层，在第一绝缘层上形成与接合焊盘电连接的再分配层，第二绝缘层覆盖再分布层。 第二绝缘层由便宜的非感光材料制成。 因此，可以降低半导体器件的制造成本。

公开(公告)号：US08026589B1

公开(公告)日：2011-09-27

申请号：US12390999

申请日：2009-02-23

申请人： Bong Chan Kim ,  Do Hyung Kim ,  Chan Ha Hwang ,  Min Woo Lee ,  Eun Sook Sohn ,  Won Joon Kang

发明人： Bong Chan Kim ,  Do Hyung Kim ,  Chan Ha Hwang ,  Min Woo Lee ,  Eun Sook Sohn ,  Won Joon Kang

IPC分类号： H01L23/48

CPC分类号： H01L24/48 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49517 ,  H01L24/16 ,  H01L24/29 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/056 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48471 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/85001 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： In accordance with the present invention, there is provided multiple embodiments of a reduced profile stackable semiconductor package. The semiconductor package comprises a substrate having at least one semiconductor die attached thereto. The semiconductor die is also electrically connected to the substrate by a plurality of conductive wires. A package body defining opposed top and bottom surfaces and a side surface at least partially encapsulates the substrate, the conductive wires and the semiconductor die. The package body is formed such that at least portions of the conductive wires are exposed in the top surface thereof. The package body may include a groove formed in the top surface thereof, with at least portions of the conductive wires being exposed in the groove. In this instance, conductive material layers may be disposed within the groove and electrically connected to the exposed portions of respective ones of the conductive wires, with solder pads further bring electrically connected to respective ones of the conductive material layers and at least partially residing within the groove.

摘要翻译： 根据本发明，提供了缩减轮廓可堆叠半导体封装的多个实施例。 半导体封装包括具有至少一个连接到其上的半导体管芯的衬底。 半导体管芯也通过多个导电线电连接到衬底。 限定相对的顶表面和底表面的封装主体和至少部分地封装基板，导线和半导体管芯的侧表面。 封装体形成为使得导线的至少一部分在其顶表面中露出。 封装体可以包括形成在其顶表面中的凹槽，其中至少一部分导电线暴露在凹槽中。 在这种情况下，导电材料层可以设置在凹槽内并且电连接到相应的导电线的暴露部分，焊料垫进一步电连接到相应的导电材料层，并且至少部分地位于 槽。

公开(公告)号：US06936922B1

公开(公告)日：2005-08-30

申请号：US10672886

申请日：2003-09-26

申请人： Sung Soon Park ,  Sang Jae Jang ,  Choon Heung Lee ,  Seon Goo Lee ,  Eun Sook Sohn ,  Sung Su Park

发明人： Sung Soon Park ,  Sang Jae Jang ,  Choon Heung Lee ,  Seon Goo Lee ,  Eun Sook Sohn ,  Sung Su Park

IPC分类号： H01L23/16 ,  H01L23/48 ,  H01L23/498 ,  H01L25/10 ,  H05K1/11 ,  H05K3/34

CPC分类号： H05K3/3436 ,  H01L23/16 ,  H01L23/49816 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/3511 ,  H05K1/111 ,  H05K2201/094 ,  H05K2201/09736 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electrical substrate useful for semiconductor packages is disclosed. The electrical substrate includes a core insulative layer. A first surface of the insulative layer has circuit patterns thereon. Some of the circuit patterns are stepped in their heights from the first surface, in that a first subportion of the circuit pattern, including a ball land, extends further from the first surface than a second subportion of the same circuit pattern, and also extends further from the first surface than a ball land of other circuit patterns. Accordingly, solder balls fused to the ball lands of the stepped circuit patterns extend further from the first surface than same-size solder balls fused to the ball lands of the non-stepped circuit patterns, thereby circumventing electrical connectivity problems that may arise from warpage of the electrical substrate.

摘要翻译： 公开了一种可用于半导体封装的电气基板。 电气基板包括芯绝缘层。 绝缘层的第一表面具有电路图案。 电路图案中的一些从第一表面上升到它们的高度，因为电路图形的第一子部分（包括球形区域）比第一表面的第一子部分比相同电路图案的第二子部分进一步延伸，并且还进一步延伸 从第一个表面比其他电路图案的球场。 因此，熔融到阶梯式电路图案的球台的焊球比与非阶梯式电路图案的球面熔合的相同尺寸的焊球相比，从第一表面延伸出来，从而避免了由于翘曲引起的电连接问题 电气基板。

公开(公告)号：US08492893B1

公开(公告)日：2013-07-23

申请号：US13049647

申请日：2011-03-16

申请人： Eun Sook Sohn ,  Jin Young Kim ,  Tae Kyung Hwang

发明人： Eun Sook Sohn ,  Jin Young Kim ,  Tae Kyung Hwang

IPC分类号： H01L23/12 ,  H01L23/48

CPC分类号： H01L24/13 ,  H01L23/3192 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/13007 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor device is disclosed. A conductive pillar for electrically connecting a semiconductor die to a circuit board may be gradually slimmed from the semiconductor die to the circuit board. A dummy conductive layer may be disposed between the semiconductor die and the conductive pillar. A width of an opening for opening a pattern of the circuit board may range from about 50% to 90% of the width of the lower end of the conductive pillar. Accordingly, a mechanical stress is prevented from being transmitted from the conductive pillar to the semiconductor die, or is absorbed by the dummy conductive layer, and thus, preventing cracks of the semiconductor die and a dielectric layer having a low dielectric constant.

摘要翻译： 公开了一种半导体器件。 用于将半导体管芯电连接到电路板的导电柱可以从半导体管芯到电路板逐渐变薄。 可以在半导体管芯和导电柱之间设置虚设导电层。 用于打开电路板的图案的开口的宽度可以在导电柱的下端的宽度的约50％至90％的范围内。 因此，防止机械应力从导电柱传递到半导体管芯，或被虚拟导电层吸收，从而防止半导体管芯和具有低介电常数的电介质层的裂纹。

公开(公告)号：US08618658B1

公开(公告)日：2013-12-31

申请号：US12727608

申请日：2010-03-19

申请人： Jong Sik Paek ,  Won Chul Do ,  Eun Sook Sohn

发明人： Jong Sik Paek ,  Won Chul Do ,  Eun Sook Sohn

IPC分类号： H01L21/283

CPC分类号： H01L24/13 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/02125 ,  H01L2224/02145 ,  H01L2224/0215 ,  H01L2224/024 ,  H01L2224/0346 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1132 ,  H01L2224/11849 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13008 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13076 ,  H01L2224/131 ,  H01L2224/13191 ,  H01L2224/13551 ,  H01L2224/13562 ,  H01L2224/13583 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/381 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/00012 ,  H01L2924/15791 ,  H01L2924/01074 ,  H01L2924/07 ,  H01L2924/00 ,  H01L2924/014

摘要： A semiconductor device and a fabrication method thereof are provided. An electrically conductive elastic member is formed on a semiconductor die, and a conductive bump is formed on the elastic member. Accordingly, since the conductive bump is formed on the elastic member, or to protrude from a top surface of the elastic member, the height and thus diameter of the conductive bump is reduced allowing a fine pitch to be realized. Further, the elastic member is elastic and thus mitigates external impacts from being transferred from the conductive bump to the semiconductor die.

摘要翻译： 提供半导体器件及其制造方法。 在半导体管芯上形成导电性弹性部件，在弹性部件上形成导电凸块。 因此，由于导电凸块形成在弹性构件上或从弹性构件的顶面突出，因此导电凸块的高度和直径减小，从而可以实现微细间距。 此外，弹性构件是弹性的，从而减轻外部冲击从导电凸块转移到半导体管芯。

公开(公告)号：US08487420B1

公开(公告)日：2013-07-16

申请号：US12330424

申请日：2008-12-08

申请人： Chan Ha Hwang ,  Eun Sook Sohn ,  Ho Choi ,  Byong Jin Kim ,  Ji Yeon Yu ,  Min Woo Lee

发明人： Chan Ha Hwang ,  Eun Sook Sohn ,  Ho Choi ,  Byong Jin Kim ,  Ji Yeon Yu ,  Min Woo Lee

IPC分类号： H01L23/02

CPC分类号： H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/131 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/8385 ,  H01L2225/0651 ,  H01L2225/06558 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19105 ,  H01L2924/19107 ,  H05K2201/10378 ,  H05K2201/10674 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In accordance with the present invention, there is provided multiple embodiments of a package-in-package semiconductor device including shortened electrical signal paths to optimize electrical performance. The semiconductor device comprises a substrate having a conductive pattern formed thereon. In each embodiment of the semiconductor device, a semiconductor package and one or more semiconductor dies are vertically stacked upon the substrate, and placed into electrical communication with the conductive pattern thereof. In certain embodiments, a semiconductor die which is electrically connected to the conductive pattern of the substrate may be fully or partially covered with a film-over-wire. Additionally, in each embodiment of the semiconductor device, the vertically stacked electronic components thereof may be covered with a package body which also partially covers the substrate.

摘要翻译： 根据本发明，提供了包装封装半导体器件的多个实施例，其包括缩短的电信号路径以优化电性能。 半导体器件包括其上形成有导电图案的衬底。 在半导体器件的每个实施例中，半导体封装和一个或多个半导体管芯垂直堆叠在衬底上，并与其导电图案电连通。 在某些实施例中，电连接到基板的导电图案的半导体管芯可以完全地或部分地被覆盖在膜上的线上。 此外，在半导体器件的每个实施例中，其垂直堆叠的电子部件可以被也部分地覆盖衬底的封装体覆盖。

公开(公告)号：US08193624B1

公开(公告)日：2012-06-05

申请号：US12036498

申请日：2008-02-25

申请人： Eun Sook Sohn

发明人： Eun Sook Sohn

IPC分类号： H01L23/02

CPC分类号： H01L21/563 ,  H01L23/3128 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48666 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48766 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48866 ,  H01L2224/48871 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/48744 ,  H01L2224/48771 ,  H01L2224/48671 ,  H01L2924/00012 ,  H01L2224/05552

摘要： A semiconductor package assembly has a first semiconductor package. A plurality of first solder balls is attached to the first semiconductor package. A circuit board is provided having a plurality of mounting pads that is electrically connected to the plurality of first solder balls. A first underfill is disposed on each of the plurality of first solder balls. The first underfill is disposed on interfaces between each of the plurality of first solder balls and the first semiconductor package and each of the plurality of first solder balls and the circuit board. The first underfill is removed from an area between adjacent first solder balls.

摘要翻译： 半导体封装组件具有第一半导体封装。 多个第一焊球附接到第一半导体封装。 电路板具有电连接到多个第一焊球的多个安装焊盘。 第一底部填充物设置在多个第一焊球中的每一个上。 第一底部填充物设置在多个第一焊球和第一半导体封装中的每一个与多个第一焊球和电路板中的每一个之间的界面上。 从相邻的第一焊球之间的区域移除第一底部填充物。