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公开(公告)号:US07582556B2
公开(公告)日:2009-09-01
申请号:US11426317
申请日:2006-06-26
申请人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
发明人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
IPC分类号: H01L21/4763
CPC分类号: H01L24/12 , H01L21/76801 , H01L23/3192 , H01L23/5227 , H01L23/53295 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05073 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/05669 , H01L2224/11 , H01L2224/1147 , H01L2224/13 , H01L2224/13022 , H01L2224/13099 , H01L2224/16227 , H01L2224/45144 , H01L2224/45147 , H01L2224/45164 , H01L2224/45169 , H01L2224/45173 , H01L2224/45176 , H01L2224/45183 , H01L2224/48091 , H01L2224/48463 , H01L2224/48844 , H01L2224/48847 , H01L2224/48864 , H01L2224/73204 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/3011 , H01L2924/351 , H01L2224/48824 , H01L2924/00 , H01L2224/48869 , H01L2224/05599
摘要: A circuit structure includes a semiconductor substrate, first and second metallic posts over the semiconductor substrate, an insulating layer over the semiconductor substrate and covering the first and second metallic posts, first and second bumps over the first and second metallic posts or over the insulating layer. The first and second metallic posts have a height of between 20 and 300 microns, with the ratio of the maximum horizontal dimension thereof to the height thereof being less than 4. The distance between the center of the first bump and the center of the second bump is between 10 and 250 microns.
摘要翻译: 电路结构包括半导体衬底,半导体衬底上的第一和第二金属柱,半导体衬底上的绝缘层,并覆盖第一和第二金属柱,第一和第二金属柱上的第一和第二凸块或绝缘层 。 第一和第二金属柱的高度为20至300微米,其最大水平尺寸与其高度之比小于4.第一凸起的中心与第二凸起的中心之间的距离 在10和250微米之间。
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公开(公告)号:US08884433B2
公开(公告)日:2014-11-11
申请号:US12545880
申请日:2009-08-24
申请人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
发明人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
IPC分类号: H01L29/40 , H01L23/532 , H01L23/00 , H01L23/31 , H01L21/768 , H01L23/522
CPC分类号: H01L24/12 , H01L21/76801 , H01L23/3192 , H01L23/5227 , H01L23/53295 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05073 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/05669 , H01L2224/11 , H01L2224/1147 , H01L2224/13 , H01L2224/13022 , H01L2224/13099 , H01L2224/16227 , H01L2224/45144 , H01L2224/45147 , H01L2224/45164 , H01L2224/45169 , H01L2224/45173 , H01L2224/45176 , H01L2224/45183 , H01L2224/48091 , H01L2224/48463 , H01L2224/48844 , H01L2224/48847 , H01L2224/48864 , H01L2224/73204 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/3011 , H01L2924/351 , H01L2224/48824 , H01L2924/00 , H01L2224/48869 , H01L2224/05599
摘要: A circuit structure includes a semiconductor substrate, first and second metallic posts over the semiconductor substrate, an insulating layer over the semiconductor substrate and covering the first and second metallic posts, first and second bumps over the first and second metallic posts or over the insulating layer. The first and second metallic posts have a height of between 20 and 300 microns, with the ratio of the maximum horizontal dimension thereof to the height thereof being less than 4. The distance between the center of the first bump and the center of the second bump is between 10 and 250 microns.
摘要翻译: 电路结构包括半导体衬底,半导体衬底上的第一和第二金属柱,半导体衬底上的绝缘层,并覆盖第一和第二金属柱,第一和第二金属柱上的第一和第二凸起或绝缘层 。 第一和第二金属柱的高度为20至300微米,其最大水平尺寸与其高度之比小于4.第一凸起的中心与第二凸起的中心之间的距离 在10和250微米之间。
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公开(公告)号:US08294279B2
公开(公告)日:2012-10-23
申请号:US11307127
申请日:2006-01-24
申请人: Ke-Hung Chen , Shih-Hsiung Lin , Mou-Shiung Lin
发明人: Ke-Hung Chen , Shih-Hsiung Lin , Mou-Shiung Lin
CPC分类号: H01L25/0657 , H01L21/563 , H01L21/568 , H01L23/3128 , H01L23/49575 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05026 , H01L2224/05027 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05184 , H01L2224/05568 , H01L2224/0557 , H01L2224/05571 , H01L2224/05572 , H01L2224/05573 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05684 , H01L2224/13099 , H01L2224/16145 , H01L2224/16225 , H01L2224/26145 , H01L2224/26175 , H01L2224/27013 , H01L2224/29109 , H01L2224/29111 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/81193 , H01L2224/83051 , H01L2224/83365 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06555 , H01L2225/06582 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/15151 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/01007 , H01L2924/01083 , H01L2924/00012 , H01L2224/29099
摘要: A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pillar. The first chip is connected to the second chip via the conductive pillars and the conductive connecting material.
摘要翻译: 一种组装芯片的方法。 提供第一芯片和第二芯片。 在第一芯片上形成至少一个导电柱,并且在导电柱上形成导电连接材料。 第二芯片还包括至少一个导电柱。 第一芯片经由导电柱和导电连接材料连接到第二芯片。
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公开(公告)号:US20090309224A1
公开(公告)日:2009-12-17
申请号:US12545880
申请日:2009-08-24
申请人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
发明人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
IPC分类号: H01L23/522
CPC分类号: H01L24/12 , H01L21/76801 , H01L23/3192 , H01L23/5227 , H01L23/53295 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05073 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/05669 , H01L2224/11 , H01L2224/1147 , H01L2224/13 , H01L2224/13022 , H01L2224/13099 , H01L2224/16227 , H01L2224/45144 , H01L2224/45147 , H01L2224/45164 , H01L2224/45169 , H01L2224/45173 , H01L2224/45176 , H01L2224/45183 , H01L2224/48091 , H01L2224/48463 , H01L2224/48844 , H01L2224/48847 , H01L2224/48864 , H01L2224/73204 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/3011 , H01L2924/351 , H01L2224/48824 , H01L2924/00 , H01L2224/48869 , H01L2224/05599
摘要: A circuit structure includes a semiconductor substrate, first and second metallic posts over the semiconductor substrate, an insulating layer over the semiconductor substrate and covering the first and second metallic posts, first and second bumps over the first and second metallic posts or over the insulating layer. The first and second metallic posts have a height of between 20 and 300 microns, with the ratio of the maximum horizontal dimension thereof to the height thereof being less than 4. The distance between the center of the first bump and the center of the second bump is between 10 and 250 microns.
摘要翻译: 电路结构包括半导体衬底,半导体衬底上的第一和第二金属柱,半导体衬底上的绝缘层,并覆盖第一和第二金属柱,第一和第二金属柱上的第一和第二凸起或绝缘层 。 第一和第二金属柱的高度为20至300微米,其最大水平尺寸与其高度之比小于4.第一凸起的中心与第二凸起的中心之间的距离 在10和250微米之间。
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15.POST PASSIVATION STRUCTURE FOR A SEMICONDUCTOR DEVICE AND PACKAGING PROCESS FOR SAME 有权
标题翻译: 用于半导体器件的后处理结构和用于其的封装工艺公开(公告)号:US20090057895A1
公开(公告)日:2009-03-05
申请号:US12264271
申请日:2008-11-04
申请人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
发明人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
IPC分类号: H01L23/488
CPC分类号: H01L23/5227 , H01L21/2885 , H01L21/563 , H01L21/76801 , H01L21/76885 , H01L23/3114 , H01L23/5223 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/83 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05173 , H01L2224/05176 , H01L2224/05183 , H01L2224/05548 , H01L2224/05571 , H01L2224/05572 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/05669 , H01L2224/1147 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2224/16 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/45164 , H01L2224/45169 , H01L2224/45173 , H01L2224/45176 , H01L2224/45183 , H01L2224/48091 , H01L2224/48463 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48664 , H01L2224/48669 , H01L2224/48839 , H01L2224/48844 , H01L2224/48847 , H01L2224/48864 , H01L2224/83101 , H01L2224/83192 , H01L2924/00011 , H01L2924/00014 , H01L2924/0002 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/351 , H01L2924/00 , H01L2224/48869 , H01L2224/83851 , H01L2224/05552 , H01L2224/05599
摘要: A post passivation rerouting support structure comprises a relatively thin support layer above the passivation layer to support the RDL, and a relatively thick support layer for fine pitch interconnects extending from the RDL and terminating as contact structures at the surface of the thick support layer, for a next level packaging structure. The thick support layer is planarized before defining the contact structures. The thick support layer may be formed after the conducting posts have been formed, or the thick support layer is formed before forming the conducting posts in vias formed in the thick support layer. An encapsulating layer may be provided above the thick support layer, which top surface is planarized before defining the contact structures. The encapsulating layer and the further support layer may be the same layer.
摘要翻译: 后钝化重路由支持结构包括钝化层上方相对薄的支撑层以支撑RDL,以及用于从RDL延伸并作为接触结构终止于厚支撑层表面的细间距互连的相对较厚的支撑层,用于 下一级包装结构。 在限定接触结构之前,将厚支撑层平坦化。 可以在形成导电柱之后形成厚的支撑层,或者在形成在厚支撑层中的通孔中形成导电柱之前形成厚的支撑层。 可以在厚支撑层之上设置封装层,在限定接触结构之前该顶表面被平坦化。 封装层和另外的支撑层可以是相同的层。
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16.Post passivation structure for a semiconductor device and packaging process for same 有权
标题翻译: 用于半导体器件的钝化结构及其封装工艺公开(公告)号:US07468545B2
公开(公告)日:2008-12-23
申请号:US11430513
申请日:2006-05-08
申请人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
发明人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
IPC分类号: H01L29/06
CPC分类号: H01L23/5227 , H01L21/2885 , H01L21/563 , H01L21/76801 , H01L21/76885 , H01L23/3114 , H01L23/5223 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/83 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05173 , H01L2224/05176 , H01L2224/05183 , H01L2224/05548 , H01L2224/05571 , H01L2224/05572 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/05669 , H01L2224/1147 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2224/16 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/45164 , H01L2224/45169 , H01L2224/45173 , H01L2224/45176 , H01L2224/45183 , H01L2224/48091 , H01L2224/48463 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48664 , H01L2224/48669 , H01L2224/48839 , H01L2224/48844 , H01L2224/48847 , H01L2224/48864 , H01L2224/83101 , H01L2224/83192 , H01L2924/00011 , H01L2924/00014 , H01L2924/0002 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/351 , H01L2924/00 , H01L2224/48869 , H01L2224/83851 , H01L2224/05552 , H01L2224/05599
摘要: A post passivation rerouting support structure comprises a relatively thin support layer above the passivation layer to support the RDL, and a relatively thick support layer for fine pitch interconnects extending from the RDL and terminating as contact structures at the surface of the thick support layer, for a next level packaging structure. The thick support layer is planarized before defining the contact structures. The thick support layer may be formed after the conducting posts have been formed, or the thick support layer is formed before forming the conducting posts in vias formed in the thick support layer. An encapsulating layer may be provided above the thick support layer, which top surface is planarized before defining the contact structures. The encapsulating layer and the further support layer may be the same layer.
摘要翻译: 后钝化重路由支持结构包括钝化层上方相对薄的支撑层以支撑RDL,以及用于从RDL延伸并作为接触结构终止于厚支撑层表面的细间距互连的相对较厚的支撑层,用于 下一级包装结构。 在限定接触结构之前,将厚支撑层平坦化。 可以在形成导电柱之后形成厚的支撑层,或者在形成在厚支撑层中的通孔中形成导电柱之前形成厚的支撑层。 可以在厚支撑层之上设置封装层,在限定接触结构之前该顶表面被平坦化。 封装层和另外的支撑层可以是相同的层。
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公开(公告)号:US20060292851A1
公开(公告)日:2006-12-28
申请号:US11426317
申请日:2006-06-26
申请人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
发明人: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
IPC分类号: H01L21/4763
CPC分类号: H01L24/12 , H01L21/76801 , H01L23/3192 , H01L23/5227 , H01L23/53295 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05073 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/05669 , H01L2224/11 , H01L2224/1147 , H01L2224/13 , H01L2224/13022 , H01L2224/13099 , H01L2224/16227 , H01L2224/45144 , H01L2224/45147 , H01L2224/45164 , H01L2224/45169 , H01L2224/45173 , H01L2224/45176 , H01L2224/45183 , H01L2224/48091 , H01L2224/48463 , H01L2224/48844 , H01L2224/48847 , H01L2224/48864 , H01L2224/73204 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/3011 , H01L2924/351 , H01L2224/48824 , H01L2924/00 , H01L2224/48869 , H01L2224/05599
摘要: A circuit structure includes a semiconductor substrate, first and second metallic posts over the semiconductor substrate, an insulating layer over the semiconductor substrate and covering the first and second metallic posts, first and second bumps over the first and second metallic posts or over the insulating layer. The first and second metallic posts have a height of between 20 and 300 microns, with the ratio of the maximum horizontal dimension thereof to the height thereof being less than 4. The distance between the center of the first bump and the center of the second bump is between 10 and 250 microns.
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公开(公告)号:US20060220259A1
公开(公告)日:2006-10-05
申请号:US11307127
申请日:2006-01-24
申请人: Ke-Hung Chen , Shih-Hsiung Lin , Mou-Shiung Lin
发明人: Ke-Hung Chen , Shih-Hsiung Lin , Mou-Shiung Lin
IPC分类号: H01L23/48
CPC分类号: H01L25/0657 , H01L21/563 , H01L21/568 , H01L23/3128 , H01L23/49575 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05026 , H01L2224/05027 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05184 , H01L2224/05568 , H01L2224/0557 , H01L2224/05571 , H01L2224/05572 , H01L2224/05573 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05684 , H01L2224/13099 , H01L2224/16145 , H01L2224/16225 , H01L2224/26145 , H01L2224/26175 , H01L2224/27013 , H01L2224/29109 , H01L2224/29111 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/81193 , H01L2224/83051 , H01L2224/83365 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06555 , H01L2225/06582 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/15151 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/01007 , H01L2924/01083 , H01L2924/00012 , H01L2224/29099
摘要: A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pillar. The first chip is connected to the second chip via the conductive pillars and the conductive connecting material.
摘要翻译: 一种组装芯片的方法。 提供第一芯片和第二芯片。 在第一芯片上形成至少一个导电柱,并且在导电柱上形成导电连接材料。 第二芯片还包括至少一个导电柱。 第一芯片经由导电柱和导电连接材料连接到第二芯片。
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