公开(公告)号：US20230369192A1

公开(公告)日：2023-11-16

申请号：US18226652

申请日：2023-07-26

Applicant: Intel Corporation

Inventor： Jonathan ROSCH ,  Wei-Lun JEN ,  Cheng XU ,  Liwei CHENG ,  Andrew BROWN ,  Yikang DENG

IPC: H01L23/498 ,  H01L21/48 ,  H05K1/11 ,  H05K1/02 ,  H05K1/18

CPC classification number: H01L23/49838 ,  H01L21/4857 ,  H01L23/49827 ,  H05K1/111 ,  H01L21/486 ,  H05K1/115 ,  H01L23/49822 ,  H05K2201/09727 ,  H05K1/025 ,  H05K2201/09736 ,  H05K2201/09827 ,  H05K1/18 ,  H05K2201/095

Abstract: Embodiments include a package substrate, a method of forming the package substrate, and a semiconductor package. A package substrate includes a conductive layer in a dielectric, a first trace and a first via pad of the conductive layer having a first thickness, and a second trace and a second via pad of the conductive layer having a second thickness. The second thickness of second trace and second via pad may be greater than the first thickness of the first trace and first via pad. The dielectric may include a first dielectric thickness and a second dielectric thickness, where the second dielectric thickness may be less than the first dielectric thickness. The package substrate may include a third via having a third thickness on the first via pad, and a fourth via having a fourth thickness on the second via pad, wherein the third thickness is greater than the fourth thickness.

公开(公告)号：US11778754B2

公开(公告)日：2023-10-03

申请号：US16777116

申请日：2020-01-30

Applicant: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft

Inventor： Robin Zhang ,  Seok Kim Tay

IPC: H05K3/42 ,  H05K1/18 ,  H05K1/11

CPC classification number: H05K3/429 ,  H05K1/115 ,  H05K1/186 ,  H05K3/423 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2203/1572

Abstract: A component carrier includes an electrically insulating layer structure with a first main surface and a second main surface, a through hole extends through the electrically insulating layer structure between the first main surface and the second main surface. The through hole has a first tapering portion extending from the first main surface and a second tapering portion extending from the second main surface. The through hole is delimited by a first plating structure on at least part of the sidewalls of the electrically insulating layer structure and a second plating structure formed separately from and arranged on the first plating structure. The second plating structure includes an electrically conductive bridge structure connecting the opposing sidewalls.

公开(公告)号：US20230189431A1

公开(公告)日：2023-06-15

申请号：US17925059

申请日：2021-05-13

Applicant: LG INNOTEK CO., LTD.

Inventor： Won Suk JUNG

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0225 ,  H05K1/116 ,  H05K2201/096 ,  H05K2201/09509 ,  H05K2201/09827

Abstract: A circuit board according to an embodiment includes an insulating layer; a second outer circuit pattern disposed on an upper surface of the insulating layer; and a via disposed in the insulating layer and connected to the second outer circuit pattern; wherein the second outer circuit pattern includes: a first pattern embedded in the insulating layer and having a first width; and a second pattern protruding on the upper surface of the insulating layer, having a second width greater than the first width, and connected to the first pattern through the via.

公开(公告)号：US20190215963A1

公开(公告)日：2019-07-11

申请号：US16354556

申请日：2019-03-15

Applicant: FUJITSU LIMITED

Inventor： Tomoyuki Akahoshi ,  Hideaki Nagaoka ,  Daisuke Mizutani

IPC: H05K1/16 ,  H05K1/18 ,  H05K1/11 ,  H05K3/46 ,  H01G4/33

CPC classification number: H05K1/162 ,  B32B7/02 ,  B32B17/00 ,  B32B27/00 ,  B32B27/38 ,  H01G2/06 ,  H01G4/12 ,  H01G4/33 ,  H01L23/12 ,  H01L23/49816 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0216 ,  H05K1/115 ,  H05K1/181 ,  H05K3/46 ,  H05K3/4644 ,  H05K2201/0154 ,  H05K2201/09827

Abstract: A circuit board includes a first capacitor that includes a first dielectric layer, a first conductor layer disposed on a first surface of the first dielectric layer, and a second conductor layer disposed on a second surface of the first dielectric layer opposite to the first surface, a first insulating layer that is bonded to the first surface side with a first adhesive layer and has a higher elastic modulus than the first adhesive layer, and a second insulating layer that is bonded to the second surface side with a second adhesive layer and has a higher elastic modulus than the second adhesive layer.

公开(公告)号：US20190208631A1

公开(公告)日：2019-07-04

申请号：US16299553

申请日：2019-03-12

Applicant: Innovium, Inc.

Inventor： Yongming Xiong

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/40

CPC classification number: H05K1/115 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/181 ,  H05K3/0047 ,  H05K3/4038 ,  H05K2201/09636 ,  H05K2201/09727 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/10545 ,  H05K2203/0207

Abstract: A printed circuit board having multiple layers of circuitry, the printed circuit board including a first layer having a first cylindrical opening with a first diameter, the first cylindrical opening formed through at least the first layer and formed about a particular axis; and a second layer having a second cylindrical opening with a second diameter, the second cylindrical opening formed through at least the second layer and formed about the particular axis, where the first cylindrical opening is a portion of a conductive via, and where the second diameter is smaller than the first diameter.

公开(公告)号：US20180284923A1

公开(公告)日：2018-10-04

申请号：US15937244

申请日：2018-03-27

Applicant: Japan Display Inc.

Inventor： Yoichi KAMIJO ,  Yoshikatsu IMAZEKI ,  Shuichi OSAWA ,  Yoshihiro WATANABE

IPC: G06F3/044 ,  H05K1/14 ,  H05K1/11 ,  H05K3/40

CPC classification number: G06F3/044 ,  G06F3/0412 ,  G06F3/0416 ,  G06F2203/04103 ,  H05K1/115 ,  H05K1/144 ,  H05K3/4053 ,  H05K2201/09827

Abstract: According to one embodiment, a display device includes an organic insulating layer located between an first basement and an second basement, a first hole penetrating the second basement and the organic insulating layer, a connecting material provided via the first hole to electrically connects a first terminal and a second terminal to each other and a filling member covering the connecting material and filled in the first hole, and the protective member includes an exposure area in which the filling member is disposed, and a thickness from the second basement to an upper surface of the filling member is substantially equal to a thickness from the second basement to an upper surface of the protective member.

公开(公告)号：US20180242464A1

公开(公告)日：2018-08-23

申请号：US15756745

申请日：2016-08-08

Applicant: DENSO CORPORATION

Inventor： Kenichiro HASEGAWA ,  Tomohiro YOKOCHI ,  Yasunori KASAMA

IPC: H05K3/46 ,  H05K1/11 ,  H05K1/02

CPC classification number: H05K3/462 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/16227 ,  H01L2224/48227 ,  H05K1/0271 ,  H05K1/113 ,  H05K1/115 ,  H05K1/116 ,  H05K3/0014 ,  H05K3/4069 ,  H05K3/4617 ,  H05K3/4623 ,  H05K3/4638 ,  H05K2201/09454 ,  H05K2201/09527 ,  H05K2201/09627 ,  H05K2201/09709 ,  H05K2201/09827

Abstract: Before a laminated body is subjected to hot pressing, at least two or more land electrodes are displaced from each other as viewed in the lamination direction, whereby at least two or more gaps disposed in the lamination direction are displaced from each other as viewed in the lamination direction. The hot pressing on the laminated body causes resin materials that compose resin films to flow and fill the gaps in the laminated body. Consequently, the planarity of a multilayer substrate can be improved to a greater extent than in a case where a plurality of gaps disposed in the lamination direction is located at the same position as viewed in the lamination direction.

公开(公告)号：US09974184B2

公开(公告)日：2018-05-15

申请号：US15355559

申请日：2016-11-18

Applicant: FUJITSU LIMITED

Inventor： Mitsuaki Hayashi ,  Osamu Saito ,  Akira Okada ,  Junichi Hayama

IPC: H05K1/18 ,  H05K3/34 ,  H05K3/00

CPC classification number: H05K1/183 ,  H05K1/184 ,  H05K3/0044 ,  H05K3/0047 ,  H05K3/34 ,  H05K3/3447 ,  H05K2201/09036 ,  H05K2201/09827

Abstract: A printed board includes: a depression formed in at least one surface of a board; an open hole formed in the board so as to penetrate the board from a bottom portion of the depression; and a conductor formed over an edge of an opening portion of the open hole and an inner surface of the open hole.

公开(公告)号：US20180077800A1

公开(公告)日：2018-03-15

申请号：US15266734

申请日：2016-09-15

Applicant: Innovium, Inc.

Inventor： Yongming Xiong

IPC: H05K1/11 ,  H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/40

CPC classification number: H05K1/115 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/181 ,  H05K3/0047 ,  H05K3/4038 ,  H05K2201/09636 ,  H05K2201/09727 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/10545 ,  H05K2203/0207

Abstract: A printed circuit board having multiple layers of circuitry, the printed circuit board including a first layer having a first cylindrical opening with a first diameter, the first cylindrical opening formed through at least the first layer and formed about a particular axis; and a second layer having a second cylindrical opening with a second diameter, the second cylindrical opening formed through at least the second layer and formed about the particular axis, where the first cylindrical opening is a portion of a conductive via, and where the second diameter is smaller than the first diameter.

公开(公告)号：US20180031938A1

公开(公告)日：2018-02-01

申请号：US15661443

申请日：2017-07-27

Applicant: Japan Display Inc.

Inventor： Yoshihiro WATANABE ,  Yoshikatsu IMAZEKI ,  Yoichi KAMIJO ,  Shuichi OSAWA

IPC: G02F1/1362 ,  G02F1/1339 ,  H05K3/36 ,  H05K1/11 ,  H05K3/00 ,  H05K3/40 ,  G02F1/1333 ,  H05K1/14

CPC classification number: G02F1/136286 ,  G02F1/133345 ,  G02F1/13338 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/133528 ,  G02F1/1339 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/1368 ,  G02F2001/133519 ,  G02F2001/13629 ,  G02F2001/136295 ,  G02F2201/121 ,  G02F2201/123 ,  G02F2201/42 ,  H05K1/115 ,  H05K1/144 ,  H05K3/002 ,  H05K3/0026 ,  H05K3/366 ,  H05K3/4038 ,  H05K2201/041 ,  H05K2201/09036 ,  H05K2201/09827 ,  H05K2201/10136 ,  H05K2203/107

Abstract: According to one embodiment, an electronic apparatus includes a first substrate, a second substrate, and a connecting material. The second substrate includes a second basement and a second conductive layer. The second basement has a third surface opposed to the first conductive layer and a fourth surface and is spaced apart from the first conductive layer. The second substrate has a first hole penetrating the second basement. The first substrate has a second hole. A third opening of the second hole is smaller than a first opening of the first hole. A connecting material connects the first conductive layer and the second conductive layer via the first hole.