公开(公告)号：US20050237365A1

公开(公告)日：2005-10-27

申请号：US11113576

申请日：2005-04-25

Applicant: Shuhei Hiwada

Inventor： Shuhei Hiwada

IPC: B41J2/045 ,  B41J2/05 ,  B41J2/055 ,  B41J2/14 ,  H05K3/00 ,  H05K3/32 ,  H05K3/36 ,  H05K3/40

CPC classification number: B41J2/14209 ,  B41J2002/14217 ,  B41J2002/14225 ,  B41J2002/14306 ,  B41J2002/14459 ,  B41J2002/14491 ,  H05K3/0058 ,  H05K3/321 ,  H05K3/361 ,  H05K3/365 ,  H05K3/4007 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/091 ,  H05K2201/10977 ,  H05K2203/0195

Abstract: There is disclosed an electric device comprising: an actuator unit which includes a plurality of electrodes formed thereon; a printed wiring board which comprises: an electrically insulating flexible layer which has on one of its opposite sides protrusions for the respective electrodes, each of the protrusions forming a corresponding recess on the other side of the flexible layer; and a plurality of electrically conducting layers disposed on the respective protrusions to be in contact with the respectively corresponding electrodes; and a plurality of bonding parts each of which is in contact with one of the conducting layers and a corresponding one of the electrodes to completely cover a contact portion between the conducting layer and the electrode so as to maintain the contact therebetween.

Abstract translation: 公开了一种电气装置，包括：致动器单元，其包括形成在其上的多个电极; 一种印刷线路板，包括：电绝缘柔性层，其在相对侧的一个上相对于各个电极具有突起，每个突起在柔性层的另一侧上形成相应的凹部; 以及多个导电层，设置在各个突起上以与相应的电极接触; 以及多个接合部，其各自与导电层中的一个和相应的一个电极接触，以完全覆盖导电层和电极之间的接触部分，从而保持它们之间的接触。

公开(公告)号：US20050218528A1

公开(公告)日：2005-10-06

申请号：US10815564

申请日：2004-03-31

Applicant: John Beatty ,  Timothy Takeuchi

Inventor： John Beatty ,  Timothy Takeuchi

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/13 ,  H01L23/498 ,  H01L29/40 ,  H05K3/28 ,  H05K3/30

CPC classification number: H01L23/49816 ,  H01L21/563 ,  H01L23/13 ,  H01L24/28 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H05K3/284 ,  H05K3/305 ,  H05K2201/09063 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2203/0126 ,  Y02P70/613 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/05599

Abstract: An interposer, between a die and a substrate, has a body with a first surface, an opposite second surface, and a channel that passes from the first surface, through the body to the opposite second surface.

Abstract translation: 芯片和基板之间的插入件具有带有第一表面，相对的第二表面的主体以及从第一表面穿过主体到相对的第二表面的通道。

公开(公告)号：US20050208704A1

公开(公告)日：2005-09-22

申请号：US11130622

申请日：2005-05-17

Applicant: Salman Akram ,  Syed Ahmad

Inventor： Salman Akram ,  Syed Ahmad

IPC: H01L21/50 ,  H01L21/60 ,  H05K3/34

CPC classification number: H01L21/44 ,  B33Y10/00 ,  B33Y80/00 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/742 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/10126 ,  H01L2224/1148 ,  H01L2224/1191 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/16 ,  H01L2224/75 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/351 ,  H05K3/3436 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Methods for fabricating carrier substrates and other semiconductor device components include disposing a collar around at least a portion of a contact. The collar may be formed by a programmed material consolidation process. The programmed material consolidation process may be effected in conjunction with a feature recognition technique, such as machine vision. Once one or more collars are in place, the semiconductor device component may be electrically connected to another semiconductor device component.

Abstract translation: 用于制造载体基板和其它半导体器件部件的方法包括在接触件的至少一部分周围设置套环。 套环可以通过编程材料固结工艺形成。 编程材料合并过程可以结合诸如机器视觉的特征识别技术来实现。 一旦一个或多个轴环就位，则半导体器件部件可以电连接到另一个半导体器件部件。

公开(公告)号：US20050200045A1

公开(公告)日：2005-09-15

申请号：US10800959

申请日：2004-03-15

Applicant: Hugh Hunkeler

Inventor： Hugh Hunkeler

IPC: B29C39/10 ,  B60R16/023 ,  H01R12/00 ,  H05K1/00 ,  H05K3/28 ,  H05K3/36 ,  H05K5/00 ,  H05K5/06 ,  H05K7/14

CPC classification number: H05K5/064 ,  B60R16/0239 ,  H05K3/284 ,  H05K3/361 ,  H05K5/0039 ,  H05K7/1417 ,  H05K7/142 ,  H05K7/20463 ,  H05K2201/10189 ,  H05K2201/10977

Abstract: A sealed electronic module is manufactured by forming a housing that is open at one end, dispensing a first quantity of potting material into the housing via the open end, inserting a circuit board and electrical connector assembly into the housing so that the inboard end of the circuit board is immersed in the potting material, and dispensing a second quantity of potting material into an area bridging the connector assembly and the housing. When cured, the first quantity of potting material attaches the inboard end of the circuit board to the housing, and the second quantity of potting material attaches the connector to the housing and environmentally seals the module.

Abstract translation: 密封电子模块通过形成在一端开口的壳体来制造，通过开口端将第一量的灌封材料分配到壳体中，将电路板和电连接器组件插入壳体中，使得内侧端部 电路板浸入灌封材料中，并将第二量的灌封材料分配到桥接连接器组件和壳体的区域中。 当固化时，第一批量的灌封材料将电路板的内侧端部连接到壳体，并且第二数量的灌封材料将连接器附接到壳体并且环境地密封模块。

公开(公告)号：US20050195582A1

公开(公告)日：2005-09-08

申请号：US10791048

申请日：2004-03-02

Applicant: Juan Landeros ,  Jason Zhang ,  Lejun Wang

Inventor： Juan Landeros ,  Jason Zhang ,  Lejun Wang

IPC: H05K7/06

CPC classification number: B23K1/0016 ,  B23K3/0623 ,  B23K3/08 ,  B23K2101/42 ,  H01L21/563 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83385 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K3/284 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y10T29/49146 ,  H01L2924/014 ,  H01L2924/00

Abstract: An article includes a mounting substrate, a passive component site on the mounting substrate, and an active component site on the mounting substrate. The article also includes a fluid flow barrier disposed local to the passive component site and spaced apart from the active component site. The fluid flow barrier can be a recess that resists fluid flow thereinto because of surface tension of the fluid when it meets the recess edge. The fluid flow barrier can include a boundary that diverts fluid flow due to the angle of the recess edge as the fluid approaches it. An embodiment also includes a packaging system that includes the article and at least one passive component. An embodiment also includes a method of assembling the article or the packaging system.

Abstract translation: 一种物品包括安装基板，安装基板上的无源部件位置和安装基板上的有源部件位置。 该制品还包括设置在被动部件部位的局部并与活性部件部位间隔开的流体流动阻挡件。 流体阻挡层可以是当流体遇到凹陷边缘时由于流体的表面张力而阻止流体流入其中的凹槽。 流体阻挡层可以包括当流体接近它时由于凹口边缘的角度而转移流体流动的边界。 实施例还包括包括物品和至少一个无源部件的包装系统。 实施例还包括组装物品或包装系统的方法。

公开(公告)号：US20050178574A1

公开(公告)日：2005-08-18

申请号：US10960721

申请日：2004-10-08

Applicant: Takashi Noguchi ,  Masahiro Machida ,  Makoto Terui ,  Yuichi Deushi

Inventor： Takashi Noguchi ,  Masahiro Machida ,  Makoto Terui ,  Yuichi Deushi

IPC: H05K3/28 ,  H01L23/12 ,  H01L23/28 ,  H01L23/36 ,  H01L23/367 ,  H01L23/40 ,  H01L23/467 ,  H01L23/498 ,  H01L23/50 ,  H02G3/08 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/34 ,  H05K5/00

CPC classification number: H05K1/0206 ,  H01L23/3677 ,  H01L23/49827 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05569 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/16152 ,  H05K1/114 ,  H05K3/28 ,  H05K3/3452 ,  H05K2201/0209 ,  H05K2201/0959 ,  H05K2201/099 ,  H05K2201/10734 ,  H05K2201/10977 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: An infrared emissive first insulating portion, which radiates heat transferred from a WCSP corresponding to an electronic part to a first conductive portion as infrared radiation with high efficiency, is formed on the first conductive portion lying in a through hole provided in a printed wiring board with the WCSP mounted thereon.

Abstract translation: 在设置在印刷电路板中的通孔中的第一导电部分上形成有将从电子部件对应的WCSP传递到第一导电部分的红外发射第一绝缘部分作为高效率的红外线辐射， 安装在其上的WCSP。

公开(公告)号：US06929971B2

公开(公告)日：2005-08-16

申请号：US10302254

申请日：2002-11-22

Applicant: Kensho Murata ,  Mutsumi Masumoto ,  Kenji Masumoto

Inventor： Kensho Murata ,  Mutsumi Masumoto ,  Kenji Masumoto

IPC: H01L21/56 ,  H01L21/60 ,  H01L23/485 ,  H05K3/34 ,  H01L21/00

CPC classification number: H01L21/56 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/0508 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/11334 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/3436 ,  H05K2201/0379 ,  H05K2201/10234 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2224/13099

Abstract: Improve the productivity and cost for the manufacturing of a semiconductor device referred to as a wafer level CSP. The manufacturing method for a semiconductor device related to this invention contains each of the processes that form a wiring (18) for the purpose of electrically connecting each electrode pad (10a) and external connecting terminals on top of a wafer (10) on which semiconductor elements are formed, connect conductive balls that are preformed by a separate process on top of this, and next, cover the above-mentioned wafer with a resin (32) such that the upper portion of the conductive supporting posts (30) are exposed. In a later process, solder balls (34) are arranged as external connecting terminals on the upper portion of the conductive supporting posts, and in the final process, semiconductor elements are formed by dicing the above-mentioned wafer along the boundary lines of the above-mentioned semiconductor elements.

Abstract translation: 提高制造称为晶片级CSP的半导体器件的生产率和成本。 与本发明相关的半导体器件的制造方法包含形成布线（18）的每个工艺，其用于将每个电极焊盘（10a）和外部连接端子电连接到晶片（10）的顶部上， 形成半导体元件，连接通过其上的单独工艺预成型的导电球，接下来，用树脂（32）覆盖上述晶片，使得导电支撑柱（30）的上部暴露 。 在后面的处理中，焊球（34）被布置为导电支柱上部的外部连接端子，最后，通过沿着上述边界线对上述晶片进行切割而形成半导体元件 所述半导体元件。

公开(公告)号：US06913343B2

公开(公告)日：2005-07-05

申请号：US10426584

申请日：2003-04-30

Applicant: Mohammad Akhavain ,  Joseph E. Scheffelin ,  Noah Lassar ,  Conrad Lepe

Inventor： Mohammad Akhavain ,  Joseph E. Scheffelin ,  Noah Lassar ,  Conrad Lepe

IPC: B41J2/16 ,  H05K3/28 ,  H05K3/34 ,  B41J2/14

CPC classification number: H05K3/284 ,  B41J2/16 ,  B41J2/1623 ,  B41J2002/14491 ,  B41J2202/20 ,  H05K3/3421 ,  H05K2201/10977 ,  H05K2203/0126

Abstract: The described embodiments relate to methods and systems for forming and protecting electrical interconnect assemblies. In one embodiment, an electrical interconnect assembly forming method forms an electrical interconnect between one or more conductors of a first support structure and one or more conductors of a second support structure. The method also distributes a generally flowable material over the electrical interconnect and exposes the generally flowable material to conditions sufficient to render the generally flowable material into a generally non-flowable state that provides fluid protection to the electrical interconnect and supports the electrical interconnect to reduce stress concentration at the electrical interconnect.

Abstract translation: 所描述的实施例涉及用于形成和保护电互连组件的方法和系统。 在一个实施例中，电互连组件形成方法形成第一支撑结构的一个或多个导体与第二支撑结构的一个或多个导体之间的电互连。 该方法还将通常可流动的材料分布在电互连上并且将大体上可流动的材料暴露于足以使总体上可流动的材料进入通常不可流动的状态以向电互连提供流体保护并支持电互连以减少应力 浓度在电互连。

公开(公告)号：US06897142B2

公开(公告)日：2005-05-24

申请号：US10631756

申请日：2003-08-01

Applicant: Joji Fujimori ,  Ichiro Yamaguchi

Inventor： Joji Fujimori ,  Ichiro Yamaguchi

IPC: H01L21/56 ,  H01L21/60 ,  H05K3/34

CPC classification number: H01L24/12 ,  H01L21/563 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/1152 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/1369 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/81355 ,  H01L2224/818 ,  H01L2224/83191 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01059 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/1579 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/043 ,  H05K2203/0568 ,  H05K2203/0577 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/05599

Abstract: A method of forming a solder ball includes the steps of forming an electrode pad on a substrate, forming an insulating layer having a first opening at a position of the electrode pad, filling the first opening with solder paste that include solder and first resin, and applying a heating process to the solder paste so as to form a solder ball on the electrode pad and to form a cured resin member of the first resin across a border between the electrode pad and the substrate.

Abstract translation: 形成焊球的方法包括以下步骤：在基板上形成电极焊盘，在电极焊盘的位置形成具有第一开口的绝缘层，用包括焊料和第一树脂的焊膏填充第一开口，以及 对焊膏进行加热处理，以便在电极焊盘上形成焊球，并且在电极焊盘和基板之间的边界上形成第一树脂的固化树脂部件。

公开(公告)号：US20050082580A1

公开(公告)日：2005-04-21

申请号：US10904320

申请日：2004-11-03

Applicant: Chih-Pin Hung

Inventor： Chih-Pin Hung

IPC: H01L23/367 ,  H01L23/498 ,  H01L23/50 ,  H05K1/02 ,  H05K1/11 ,  H05K3/28 ,  H05K3/34 ,  H01L29/768

CPC classification number: H01L24/73 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/14 ,  H01L24/17 ,  H01L2224/05001 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01033 ,  H05K1/0203 ,  H05K1/0263 ,  H05K1/111 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A package structure with an area bump has at least a chip (also known as a die), a substrate, a plurality of first bumps (normal bumps) and at least a second bump (area bump), wherein the first bumps are electrically and mechanically connected to one of first bonding pads and the corresponding one of first contact pads. The second bump is electrically and mechanically connected to a second bonding pad and the corresponding second contact pad of the substrate, wherein the size of the second bump is larger than one of the first bumps. Because the size of the second bump is larger than one of the first bumps, the structure has much better electrical performance and performance of heat dissipation.

Abstract translation: 具有区域凸块的封装结构至少具有芯片（也称为芯片），基板，多个第一凸块（正常凸块）和至少第二凸块（区域凸块），其中第一凸块电气和 机械地连接到第一接合焊盘和第一接触焊盘中的相应一个之一。 第二凸块电连接和机械地连接到第二焊盘和衬底的对应的第二接触焊盘，其中第二凸块的尺寸大于第一凸起之一。 由于第二凸块的尺寸大于第一凸块中的一个，所以结构具有更好的电气性能和散热性能。