公开(公告)号：US06335104B1

公开(公告)日：2002-01-01

申请号：US09510996

申请日：2000-02-22

申请人： Carlos J. Sambucetti ,  Daniel C. Edelstein ,  John G. Gaudiello ,  Judith M. Rubino ,  George Walker

发明人： Carlos J. Sambucetti ,  Daniel C. Edelstein ,  John G. Gaudiello ,  Judith M. Rubino ,  George Walker

IPC分类号： B32B1500

CPC分类号： H01L24/48 ,  C23C18/1608 ,  C23C18/1651 ,  C23C18/1831 ,  C23C18/1844 ,  C23C18/34 ,  C23C18/36 ,  C23C18/54 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05556 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48739 ,  H01L2224/48764 ,  H01L2224/48769 ,  H01L2224/48799 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48864 ,  H01L2224/48869 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H05K3/244 ,  H05K13/06 ,  Y10S428/926 ,  Y10S428/936 ,  Y10T428/12493 ,  Y10T428/12646 ,  Y10T428/12674 ,  Y10T428/12771 ,  Y10T428/12778 ,  Y10T428/12875 ,  Y10T428/12889 ,  Y10T428/12896 ,  Y10T428/12903 ,  Y10T428/1291 ,  Y10T428/12944 ,  Y10T428/12986 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00015

摘要： A method for preparing a copper pad surface for electrical connection that has superior diffusion barrier and adhesion properties is provided. In the method, a copper pad surface is first provided that has been cleaned by an acid solution, a protection layer of a phosphorus or boron-containing metal alloy is then deposited on the copper pad surface, and then an adhesion layer of a noble metal is deposited on top of the protection layer. The protection layer may be a single layer, or two or more layers intimately joined together formed of a phosphorus or boron-containing metal alloy such as Ni-P, Co-P, Co-W-P, Co-Sn-P, Ni-W-P, Co-B, Ni-B, Co-Sn-B, Co-W-B and Ni-W-B to a thickness between about 1,000 Å and about 10,000 Å. The adhesion layer can be formed of a noble metal such as Au, Pt, Pd and Ag to a thickness between about 500 Å and about 4,000 Å.

摘要翻译： 提供了一种制备具有优异的扩散阻挡层和粘合性能的用于电连接的铜焊盘表面的方法。 在该方法中，首先提供已经被酸溶液清洗的铜焊盘表面，然后在铜焊盘表面上沉积磷或含硼金属合金的保护层，然后将贵金属的粘附层 沉积在保护层的顶部。 保护层可以是由磷或含硼金属合金如Ni-P，Co-P，Co-WP，Co-Sn-P，Ni-WP紧密连接在一起的两层或更多层 ，Co-B，Ni-B，Co-Sn-B，Co-WB和Ni-WB，厚度在约至Å至约Å之间。 粘合层可以由贵金属如Au，Pt，Pd和Ag形成，厚度在约至约4,000之间。

公开(公告)号：US4753105A

公开(公告)日：1988-06-28

申请号：US5747

申请日：1987-01-22

申请人： Douglas B. Juanarena ,  Timothy W. Worst ,  George Walker

发明人： Douglas B. Juanarena ,  Timothy W. Worst ,  George Walker

IPC分类号： G01L9/04 ,  G01L19/00 ,  G01L27/00

CPC分类号： G01L27/002 ,  G01L19/0015 ,  G01L9/045

摘要： A rugged electronic pressure scanner which is capable of withstanding extreme environmental conditions is provided with a transducer per port configuration. Internal multiplexing, amplification and integral calibration valve permit on-line calibrations. The construction of a plurality of individual transducer modules each containing its own electronics permits field replacement of individual pressure transducer modules in the event of destruction or inoperativeness.

摘要翻译： 一个坚固耐用的电子压力扫描仪能够承受极端的环境条件，每端口配置有一个换能器。 内部多路复用，放大和积分校准阀允许在线校准。 每个包含其自己的电子设备的多个单独的换能器模块的结构允许在破坏或不操作的情况下对各个压力传感器模块进行现场更换。

公开(公告)号：US20080106282A1

公开(公告)日：2008-05-08

申请号：US11929899

申请日：2007-10-30

申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

IPC分类号： G01R1/073

CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

公开(公告)号：US20070271781A9

公开(公告)日：2007-11-29

申请号：US09921867

申请日：2001-08-03

申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

IPC分类号： H05K3/00 ,  G01R1/00 ,  H01R9/00

CPC分类号： G01R1/07371 ,  G01R1/06711 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07314 ,  G01R1/07342 ,  G01R1/07378 ,  G01R3/00 ,  G01R31/2886 ,  H01L23/49827 ,  H01L23/5384 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0652 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45164 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/78301 ,  H01L2224/85205 ,  H01L2224/85214 ,  H01L2924/00013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3011 ,  Y10S29/029 ,  Y10T29/49004 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49158 ,  Y10T29/49162 ,  Y10T29/49192 ,  Y10T29/53174 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed ion the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

摘要翻译： 本发明涉及一种高密度测试探针，其提供用于测试晶片形式的高密度和高性能集成电路或作为离散芯片的装置。 测试探针由嵌入柔性或高模量弹性体材料的细长电导体的密集阵列形成。 使用陶瓷集成电路芯片封装基板等标准封装基板来提供空间变压器。 电线被连接到空间变压器表面上的接触焊盘阵列。 空间变压器由多层集成电路芯片封装基板形成。 电线与接触位置阵列一样密集。 围绕着向外突出的线的阵列设置模具。 液体弹性体离开模具，以填充电线之间的空间。 弹性体被固化并且模具被去除，留下布置在弹性体中并且与空间变压器电接触的线阵列。空间变压器可以具有一组引脚，这些引脚位于空间变压器的相反表面上， 其中细长导体被接合。 这些销插入第二空间变压器（例如印刷电路板）上的插座中以形成探针组件。 或者，插入器电连接器可以设置在第一和第二空间变压器之间。

公开(公告)号：US20060124927A1

公开(公告)日：2006-06-15

申请号：US10905013

申请日：2004-12-09

申请人： Robert Groves ,  Peter Gruber ,  Kevin Petrarca ,  Richard Volant ,  George Walker

发明人： Robert Groves ,  Peter Gruber ,  Kevin Petrarca ,  Richard Volant ,  George Walker

IPC分类号： H01L21/66 ,  H01L23/58

CPC分类号： H05K3/3468 ,  G01R1/07314 ,  G01R3/00 ,  H01L21/4853 ,  H01L21/6835 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01058 ,  H01L2924/01066 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19042 ,  H05K3/325 ,  H05K2201/09745 ,  H05K2201/10734 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/128 ,  H05K2203/162 ,  H05K2203/167 ,  H01L2224/0401

摘要： Methods of forming a conductive structure on a substrate prior to packaging, and a test probe structure generated according to the method, are disclosed. The conductive structure includes a high aspect ratio structure formed by injected molded solder. The invention can be applied to form passive elements and interconnects on a conventional semiconductor substrate after the typical BEOL, and prior to packaging. The method may provide better electromigration characteristics, lower resistivity, and higher Q factors for conductive structures. In addition, the method is backwardly compatible and customizable.

摘要翻译： 公开了在封装之前在基板上形成导电结构的方法和根据该方法生成的测试探针结构。 导电结构包括通过注射成型的焊料形成的高纵横比结构。 本发明可以应用于在典型的BEOL之后以及在封装之前在常规半导体衬底上形成无源元件和互连。 该方法可以为导电结构提供更好的电迁移特性，较低的电阻率和更高的Q因子。 此外，该方法可以向后兼容并可定制。

公开(公告)号：US20050121768A1

公开(公告)日：2005-06-09

申请号：US10729254

申请日：2003-12-05

申请人： Daniel Edelstein ,  Paul Andry ,  Leena Buchwalter ,  Jon Casey ,  Sherif Goma ,  Raymond Horton ,  Gareth Hougham ,  Michael Lane ,  Xiao Liu ,  Chirag Patel ,  Edmund Sprogis ,  Michelle Steen ,  Brian Sundlof ,  Cornelia Tsang ,  George Walker

发明人： Daniel Edelstein ,  Paul Andry ,  Leena Buchwalter ,  Jon Casey ,  Sherif Goma ,  Raymond Horton ,  Gareth Hougham ,  Michael Lane ,  Xiao Liu ,  Chirag Patel ,  Edmund Sprogis ,  Michelle Steen ,  Brian Sundlof ,  Cornelia Tsang ,  George Walker

IPC分类号： H01L21/48 ,  H01L21/768 ,  H01L23/498 ,  H01L23/48 ,  H01L21/4763

CPC分类号： H01L23/49883 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00

摘要： A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or closely matched to that of the substrate, and having an effective elastic modulus value which is less than or closely matches that of the substrate. The conductive structure may include concentric via fill areas having differing materials disposed concentrically therein, a core of the substrate material surrounded by an annular ring of conductive material, a core of CTE-matched non-conductive material surrounded by an annular ring of conductive material, a conductive via having an inner void with low CTE, or a full fill of a conductive composite material such as a metal-ceramic paste which has been sintered or fused.

摘要翻译： 一种载体结构和方法，用于制造具有通孔的载流子结构，每个导通孔具有导电结构，其有效热膨胀系数小于或接近于基板的热膨胀系数，并且具有小于或等于 或者与衬底的密切匹配。 导电结构可以包括同心的通孔填充区域，其具有同心设置的不同材料，由导电材料的环形环包围的衬底材料的芯，由导电材料的环形环包围的CTE匹配的非导电材料的芯， 具有低CTE的内部空隙的导电通孔，或已经烧结或熔合的诸如金属 - 陶瓷浆料的导电复合材料的完整填充物。

公开(公告)号：US20080106284A1

公开(公告)日：2008-05-08

申请号：US11929982

申请日：2007-10-30

申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

IPC分类号： G01R31/26

CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

公开(公告)号：US20080048697A1

公开(公告)日：2008-02-28

申请号：US11929883

申请日：2007-10-30

申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

IPC分类号： G01R1/067

CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

公开(公告)号：US20080048691A1

公开(公告)日：2008-02-28

申请号：US11930010

申请日：2007-10-30

申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

IPC分类号： G01R31/02

CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

公开(公告)号：US20080048690A1

公开(公告)日：2008-02-28

申请号：US11929873

申请日：2007-10-30

申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

IPC分类号： G01R31/02

CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.