公开(公告)号：US20170103953A1

公开(公告)日：2017-04-13

申请号：US15298480

申请日：2016-10-20

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chih-Hsien Chiu ,  Hsin-Lung Chung ,  Cho-Hsin Chang ,  Chia-Yang Chen ,  Chao-Ya Yang

IPC: H01L23/552 ,  H01L21/48 ,  H01L25/065 ,  H01L23/66 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L23/552 ,  H01L21/485 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48157 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/1421 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.

公开(公告)号：US09343401B2

公开(公告)日：2016-05-17

申请号：US14256496

申请日：2014-04-18

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chi-Liang Shih ,  Hsin-Lung Chung ,  Te-Fang Chu ,  Sheng-Ming Yang ,  Hung-Cheng Chen ,  Chia-Yang Chen

IPC: H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/50 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32268 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83385 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.

Abstract translation: 提供了一种制造半导体封装的方法，其包括以下步骤：提供具有多个焊盘和相对的第二表面的具有第一表面的封装基板; 在所述包装基板的第一表面上设置多个无源元件; 通过粘合膜将半导体芯片设置在无源元件上; 通过多个接合线电连接半导体芯片和接合焊盘; 以及在所述封装衬底的所述第一表面上形成密封剂以封装所述半导体芯片，所述无源元件和所述接合线。 通过在封装基板和半导体芯片之间配置无源元件，本发明节约了封装基板上的空间，增加了布线灵活性。 此外，由于接合线不容易与无源元件接触，所以本发明防止发生短路。

公开(公告)号：US20160027740A1

公开(公告)日：2016-01-28

申请号：US14463999

申请日：2014-08-20

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chih-Hsien Chiu ,  Hsin-Lung Chung ,  Cho-Hsin Chang ,  Chia-Yang Chen ,  Chao-Ya Yang

IPC: H01L23/552 ,  H01L21/78 ,  H01L21/50 ,  H01L23/28

CPC classification number: H01L23/552 ,  H01L21/485 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48157 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/1421 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.

Abstract translation: 封装结构包括载体，布置在载体上的电子部件，形成在载体上用于封装电子部件的密封剂，形成在密封剂上的第一屏蔽层和形成在第一屏蔽层上的第二屏蔽层。 第一和第二屏蔽层由不同的材料制成。 通过形成在封装层上的多个屏蔽层，电子部件被保护免受电磁干扰。 本发明还提供一种制造封装结构的方法。

公开(公告)号：US08962396B2

公开(公告)日：2015-02-24

申请号：US14086135

申请日：2013-11-21

Applicant: Siliconware Precision Industries Co., Ltd

Inventor： Ching-Hua Chen ,  Heng-Cheng Chu ,  Hsin-Lung Chung ,  Chih-Hsien Chiu ,  Chia-Yang Chen

IPC: H01L21/00 ,  H01L21/56 ,  H01L23/31 ,  H01L21/683 ,  H01L23/00

CPC classification number: H01L21/56 ,  H01L21/6835 ,  H01L23/3128 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/49174 ,  H01L2224/73265 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design.

Abstract translation: 一种无载体半导体封装，包括具有绝缘层和嵌入绝缘层中的电路层并具有多个导电迹线和RF（射频）迹线的电路结构，设置在该绝缘层的第一表面上的芯片，以及 电连接到导电迹线，覆盖芯片和电路层的密封剂，形成在与第一表面相对的绝缘层的第二表面上的接地层和设置在导电迹线上的多个焊球 导电迹线，其中焊球的部分电连接接地层，以便允许RF迹线和接地层形成具有RF功能的微带线，从而获得具有低成本的单层无载流子半导体封装， 简化射频设计。

公开(公告)号：US20140353850A1

公开(公告)日：2014-12-04

申请号：US13971189

申请日：2013-08-20

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chih-Hsien Chiu ,  Tsung-Hsien Tsai ,  Chao-Ya Yang ,  Chia-Yang Chen ,  Chih-Ming Cheng ,  Yude Chu

IPC: H01L23/52 ,  H01L21/56 ,  H01L23/28 ,  H01L23/12 ,  H01L23/00

CPC classification number: H01L24/85 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/552 ,  H01L23/66 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A semiconductor package is disclosed, which includes: a circuit board; a carrier disposed on the circuit board; an RF chip disposed on the carrier; a plurality of high level bonding wires electrically connecting electrode pads of the RF chip and the circuit board; and an encapsulant formed on the circuit board for encapsulating the carrier, the high level bonding wires and the RF chip. The present invention positions the RF chip at a high level so as to facilitate element arrangement and high frequency wiring on the circuit board, thereby achieving a highly integrated wireless SiP (System in Package) module.

Abstract translation: 公开了一种半导体封装，其包括：电路板; 布置在电路板上的载体; 布置在载体上的RF芯片; 电连接RF芯片的电极焊盘和电路板的多个高级焊接线; 以及形成在电路板上用于封装载体，高电平接合线和RF芯片的密封剂。 本发明将RF芯片定位在高水平，以便于电路板上的元件布置和高频布线，从而实现高度集成的无线SiP（系统级封装）模块。

公开(公告)号：US11749583B2

公开(公告)日：2023-09-05

申请号：US17379289

申请日：2021-07-19

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chih-Hsien Chiu ,  Siang-Yu Lin ,  Wen-Jung Tsai ,  Chia-Yang Chen ,  Chien-Cheng Lin

IPC: H01L23/42 ,  H01L23/367 ,  H01L23/16 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/42 ,  H01L21/561 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/367

Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.

公开(公告)号：US20210005524A1

公开(公告)日：2021-01-07

申请号：US16793667

申请日：2020-02-18

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chih-Chiang He ,  Yu-Wei Yeh ,  Chia-Yang Chen ,  Chih-Yi Liao ,  Chih-Hsien Chiu ,  Chang-Chao Su

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L21/768 ,  H01L23/498 ,  H01L23/538

Abstract: An electronic structure and a method for fabricating the same are provided. An electronic component and conductive elements are disposed on a carrier. An encapsulation layer encapsulates the electronic component and the conductive elements. The encapsulation layer has concave portions corresponding in position to the conductive elements. Each of the conductive elements is in no contact with corresponding one of the concave portions.

公开(公告)号：US10410970B1

公开(公告)日：2019-09-10

申请号：US15993108

申请日：2018-05-30

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chih-Hsien Chiu ,  Chia-Yang Chen

IPC: H01L23/552 ,  H01L23/538 ,  H01L23/00 ,  H01L25/10 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L23/31

Abstract: An electronic package is provided. An electronic component and a plurality of conductive pillars are provided on a carrier structure. An encapsulation layer encapsulates the electronic component and the conductive pillars. Each of the conductive pillars has a peripheral surface narrower than two end surfaces of the conductive pillar. Therefore, the encapsulation layer is better bonded to the conductive pillars. A method for fabricating the electronic package is also provided.

公开(公告)号：US10074621B2

公开(公告)日：2018-09-11

申请号：US15181489

申请日：2016-06-14

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chih-Hsien Chiu ,  Chi-Pin Tsai ,  Chi-Liang Shih ,  Ming-Fan Tsai ,  Chia-Yang Chen

IPC: H01L23/48 ,  H01L23/66 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/66 ,  H01L23/3121 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48106 ,  H01L2224/48195 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48265 ,  H01L2224/49171 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: Provided is an electronic package, including: a carrier, an electronic component disposed on the carrier, and an antenna structure, wherein the antenna structure has a plurality of spacing members and at least one wire connected among the spacing members. No additional layout area is required to be formed on a surface of the carrier, such that the objective of miniaturization can be achieved.

公开(公告)号：US20180047711A1

公开(公告)日：2018-02-15

申请号：US15352942

申请日：2016-11-16

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chih-Hsien Chiu ,  Chi-Liang Shih ,  Jia-Huei Hung ,  Chia-Yang Chen ,  Yueh-Chiung Chang

IPC: H01L25/10 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L25/105 ,  H01L23/49833 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/48 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: An electronic stack structure is provided, including a first substrate, a second substrate stacked on the first substrate through a plurality of passive elements, and an electronic element disposed on at least one of the first substrate and the second substrate. As such, the distance between the first substrate and the second substrate is defined by the height and size of the passive elements. The present disclosure further provides a method for fabricating the electronic stack structure.