公开(公告)号：US20120021183A1

公开(公告)日：2012-01-26

申请号：US12841882

申请日：2010-07-22

Applicant: Kuei-Wei Huang ,  Wei-Hung Lin ,  Lin-Wei Wang ,  Bor-Ping Jang ,  Ming-Da Cheng ,  Chung-shi Liu

Inventor： Kuei-Wei Huang ,  Wei-Hung Lin ,  Lin-Wei Wang ,  Bor-Ping Jang ,  Ming-Da Cheng ,  Chung-shi Liu

IPC: B32B3/00 ,  B23K31/02

CPC classification number: B23K31/02 ,  B23K1/0016 ,  H01L21/563 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/13147 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2224/75252 ,  H01L2224/75302 ,  H01L2224/75824 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81947 ,  H01L2225/06513 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/144 ,  H05K1/181 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2203/082 ,  Y02P70/613 ,  Y10T428/24612 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of forming a bump structure includes providing a first work piece including a dielectric layer having a top surface; placing a second work piece facing the first work piece; placing a heating tool contacting the second work piece; and heating the second work piece using the heating tool to perform a reflow process. A first solder bump between the first and the second work pieces is melted to form a second solder bump. Before the second solder bump solidifies, pulling the second work piece away from the first work piece, until an angle formed between a tangent line of the second solder bump and the top surface of the dielectric layer is greater than about 50 degrees, wherein the tangent line is drawn at a point where the second solder bump joins the dielectric layer.

Abstract translation: 形成凸块结构的方法包括提供包括具有顶表面的电介质层的第一工件; 放置面向第一工件的第二工件; 放置与第二工件接触的加热工具; 并使用加热工具加热第二工件以进行回流处理。 在第一和第二工件之间的第一焊料凸块熔化以形成第二焊料凸点。 在第二焊料凸块固化之前，将第二工件拉离第一工件，直到在第二焊料凸块的切线与电介质层的顶表面之间形成的角度大于约50度，其中切线 线在第二焊料凸块连接电介质层的点处被拉伸。

公开(公告)号：US20080191326A1

公开(公告)日：2008-08-14

申请号：US12068256

申请日：2008-02-05

Applicant: Wei-Hung Lin ,  Zao-Kuo Lai

Inventor： Wei-Hung Lin ,  Zao-Kuo Lai

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H05K3/4682 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2203/1105 ,  H01L2924/00

Abstract: A coreless packaging substrate and a method for making the same are disclosed in the present invention. The coreless packaging substrate is made by first providing a metal adhesion layer having a melting point lower than that of the substrate, and removing a core board connected with the substrate therefrom through melting the metal adhesion layer. In addition, the disclosed packaging substrate further includes a circuit built-up structure of which has the electrical pads embedded under a surface. The disclosed packaging substrate can achieve the purposes of reducing the thickness, increasing circuit layout density, and facilitating the manufacturing of the substrate.

Abstract translation: 无芯封装基板及其制造方法在本发明中公开。 无芯封装基板通过首先提供熔点低于基板的金属粘附层，并且通过熔化金属粘合层来除去与基板相连的芯板。 此外，所公开的封装基板还包括电路组合结构，其中电垫嵌入在表面下。 所公开的封装基板可以实现减小厚度，增加电路布局密度以及促进基板的制造的目的。

公开(公告)号：US09543185B2

公开(公告)日：2017-01-10

申请号：US13309311

申请日：2011-12-01

Applicant: Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: B23Q3/00 ,  H01L21/683 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L21/6835 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05554 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/11444 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/14135 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75754 ,  H01L2224/7698 ,  H01L2224/81001 ,  H01L2224/81136 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/83102 ,  H01L2224/9205 ,  H01L2224/92125 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/3841 ,  Y10T29/41 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2224/05552 ,  H01L2924/013

Abstract: Packaging process tools and systems, and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure for supporting package substrates or integrated circuit die during a packaging process for the integrated circuit die. The mechanical structure includes a low thermal conductivity material disposed thereon.

Abstract translation: 公开了用于半导体器件的封装加工工具和系统以及封装方法。 在一个实施例中，用于半导体器件的封装处理工具包括用于在集成电路管芯的封装工艺期间支撑封装衬底或集成电路管芯的机械结构。 机械结构包括设置在其上的低热导率材料。

公开(公告)号：US09536818B2

公开(公告)日：2017-01-03

申请号：US13272434

申请日：2011-10-13

Applicant: Wei-Hung Lin ,  Ming-Da Cheng ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu

Inventor： Wei-Hung Lin ,  Ming-Da Cheng ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu

IPC: H01L23/498 ,  B23K1/20 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49894 ,  H01L21/4864 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05647 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81022 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/01073 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/0103 ,  H01L2924/01025 ,  H01L2924/01024 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01038 ,  H01L2924/01078 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01079 ,  H01L2924/01051 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00

Abstract: A method of a semiconductor package includes providing a substrate having a conductive trace coated with an organic solderability preservative (OSP) layer, removing the OSP layer from the conductive trace, and then coupling a chip to the substrate to form a semiconductor package.

Abstract translation: 半导体封装的方法包括提供具有涂覆有有机可焊性防腐剂（OSP）层的导电迹线的衬底，从导电迹线去除OSP层，然后将芯片耦合到衬底以形成半导体封装。

公开(公告)号：US08878352B2

公开(公告)日：2014-11-04

申请号：US13357379

申请日：2012-01-24

Applicant: Chun-Cheng Lin ,  Chung-Shi Liu ,  Kuei-Wei Huang ,  Cheng-Ting Chen ,  Wei-Hung Lin ,  Ming-Da Cheng

Inventor： Chun-Cheng Lin ,  Chung-Shi Liu ,  Kuei-Wei Huang ,  Cheng-Ting Chen ,  Wei-Hung Lin ,  Ming-Da Cheng

IPC: H01L23/02

Abstract: A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A post-contact material is formed on the first contact in order to adjust the height of a joint between the contact pad a conductive bump. In another embodiment a conductive pillar is utilized to control the height of the joint between the contact pad and external connections.

公开(公告)号：US20140045300A1

公开(公告)日：2014-02-13

申请号：US13571665

申请日：2012-08-10

Applicant: Meng-Tse Chen ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Tsai-Tsung Tsai ,  Ai-Tee Ang ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Meng-Tse Chen ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Tsai-Tsung Tsai ,  Ai-Tee Ang ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L21/50 ,  H05B3/00

CPC classification number: H01L21/67288 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/15311 ,  H05B6/6447 ,  H05B6/80 ,  H01L2924/0001

Abstract: The present disclosure relates to a tool arrangement and method to reduce warpage within a package-on-package semiconductor structure, while minimizing void formation within an electrically-insulating adhesive which couples the packages. A pressure generator and a variable frequency microwave source are coupled to a process chamber which encapsulates a package-on-package semiconductor structure. The package-on-package semiconductor structure is simultaneously heated by the variable frequency microwave source at variable frequency, variable temperature, and variable duration and exposed to an elevated pressure by the pressure generator. This combination for microwave heating and elevated pressure limits the amount of warpage introduced while preventing void formation within an electrically-insulating adhesive which couples the substrates of the package-on-package semiconductor structure.

Abstract translation: 本公开涉及一种减少封装封装半导体结构内的翘曲的工具布置和方法，同时最小化耦合封装的电绝缘粘合剂内的空隙形成。 压力发生器和可变频率微波源耦合到封装封装的封装半导体结构的处理室。 封装的封装半导体结构由可变频率，可变温度和可变持续时间的可变频率微波源同时加热，并通过压力发生器暴露于高压。 这种用于微波加热和升高压力的组合限制了引入的翘曲量，同时防止在封装封装半导体结构的衬底的电绝缘粘合剂中形成空隙。

公开(公告)号：US08609462B2

公开(公告)日：2013-12-17

申请号：US13272032

申请日：2011-10-12

Applicant: Meng-Tse Chen ,  Chun-Cheng Lin ,  Kuei-Wei Huang ,  Yu-Peng Tsai ,  Wei-Hung Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Meng-Tse Chen ,  Chun-Cheng Lin ,  Kuei-Wei Huang ,  Yu-Peng Tsai ,  Wei-Hung Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L21/44

CPC classification number: B23Q3/18 ,  H01L21/50 ,  H01L21/561 ,  H01L21/563 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75733 ,  H01L2224/75744 ,  H01L2224/75754 ,  H01L2224/7598 ,  H01L2224/75983 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2224/83862 ,  H01L2224/83868 ,  H01L2224/83874 ,  H01L2224/97 ,  H01L2924/3511 ,  Y10T29/41 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/014

Abstract: A method includes dispensing an underfill between a first package component and a second package component, wherein the first package component is placed on a lower jig, and the second package component is over and bonded to the first package component. A through-opening is in the lower jig and under the first package component. The underfill is cured, wherein during the step of curing the underfill, a force is applied to flatten the first package component. The force is applied by performing an action selected from the group consisting of vacuuming and air blowing through the through-opening.

公开(公告)号：US08603860B2

公开(公告)日：2013-12-10

申请号：US13280163

申请日：2011-10-24

Applicant: Meng-Tse Chen ,  Kuei-Wei Huang ,  Wei-Hung Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Meng-Tse Chen ,  Kuei-Wei Huang ,  Wei-Hung Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L24/75 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/75272 ,  H01L2224/75314 ,  H01L2224/75704 ,  H01L2224/7598 ,  H01L2224/81191 ,  H01L2224/81208 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2924/014

Abstract: A method includes loading a first package component on a concave boat, and placing a second package component over the first package component. A load clamp is placed over the second package component, wherein the load clamp is supported by a temperature-variable spacer of the concave boat. A reflow step is performed to bond the second package component to the first package component. During a temperature-elevation step of the reflow step, the temperature-variable spacer is softened in response to an increase in temperature, and a height of the softened temperature-variable spacer is reduced, until the load clamp is stopped by a rigid spacer of the concave boat.

Abstract translation: 一种方法包括将第一包装部件装载在凹形船上，以及将第二包装部件放置在第一包装部件上。 负载夹具放置在第二包装部件上，其中负载夹具由凹形舟皿的温度可变的间隔件支撑。 执行回流步骤以将第二包装部件粘合到第一包装部件。 在回流步骤的升温步骤期间，温度可变的间隔件响应于温度升高而软化，并且软化的温度可变间隔件的高度减小，直到负载夹具被刚性间隔件 凹船。

公开(公告)号：US08254132B2

公开(公告)日：2012-08-28

申请号：US12605869

申请日：2009-10-26

Applicant: Wei-Hung Lin

Inventor： Wei-Hung Lin

IPC: H05K7/00 ,  H05K5/00

CPC classification number: G06K19/07 ,  G06K19/07732 ,  H01R13/4538

Abstract: A flash drive and a housing assembly thereof is provided. The housing assembly comprises a housing, a base and a rotating mechanism. The housing has a first opening, a second opening, and a space, the first opening is situated at a side surface of the housing, and the second opening is situated on a top surface of the housing. The base is used for accommodating a storage device which has a connecting member, the base is movably disposed in the space and has a slot facing the second opening. The rotating mechanism is disposed at the second opening and mounted to the housing, the rotating mechanism has a protrusion portion movably engaged in the slot. When the rotating mechanism rotates relative to the housing, the protrusion portion moves along the slot and drives the base to reciprocate between a first position and a second position.

Abstract translation: 提供闪存驱动器及其壳体组件。 壳体组件包括壳体，基座和旋转机构。 壳体具有第一开口，第二开口和空间，第一开口位于壳体的侧表面处，并且第二开口位于壳体的顶表面上。 基座用于容纳具有连接构件的存储装置，基座可移动地设置在该空间中，并且具有面向第二开口的槽。 旋转机构设置在第二开口处并且安装到壳体，旋转机构具有可移动地接合在槽中的突出部。 当旋转机构相对于壳体旋转时，突起部分沿着狭槽移动并驱动基座在第一位置和第二位置之间往复运动。

公开(公告)号：US07754598B2

公开(公告)日：2010-07-13

申请号：US12068256

申请日：2008-02-05

Applicant: Wei-Hung Lin ,  Zao-Kuo Lai

Inventor： Wei-Hung Lin ,  Zao-Kuo Lai

IPC: H01L21/4763

CPC classification number: H05K3/4682 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2203/1105 ,  H01L2924/00

Abstract: Method for making a coreless packaging substrate are disclosed in the present invention. The coreless packaging substrate is made by first providing a metal adhesion layer having a melting point lower than that of the substrate, and removing a core board connected with the substrate therefrom through melting the metal adhesion layer. In addition, the disclosed packaging substrate further includes a circuit built-up structure of which has the electrical pads embedded under a surface. The disclosed packaging substrate can achieve the purposes of reducing the thickness, increasing circuit layout density, and facilitating the manufacturing of the substrate.

Abstract translation: 制造无芯封装基板的方法在本发明中公开。 无芯封装基板通过首先提供熔点低于基板的金属粘附层，并且通过熔化金属粘合层来除去与基板相连的芯板。 此外，所公开的封装基板还包括电路组合结构，其中电垫嵌入在表面下。 所公开的封装基板可以实现减小厚度，增加电路布局密度以及促进基板的制造的目的。