公开(公告)号：US6130112A

公开(公告)日：2000-10-10

申请号：US166857

申请日：1998-10-06

申请人： Makoto Kitano ,  Ryuji Kohno ,  Naotaka Tanaka ,  Akihiro Yaguchi ,  Tetsuo Kumazawa ,  Ichiro Anjoh ,  Hideki Tanaka ,  Asao Nishimura ,  Shuji Eguchi ,  Akira Nagai ,  Mamoru Mita

发明人： Makoto Kitano ,  Ryuji Kohno ,  Naotaka Tanaka ,  Akihiro Yaguchi ,  Tetsuo Kumazawa ,  Ichiro Anjoh ,  Hideki Tanaka ,  Asao Nishimura ,  Shuji Eguchi ,  Akira Nagai ,  Mamoru Mita

IPC分类号： H01L21/60 ,  H01L23/04 ,  H01L23/12 ,  H01L23/31 ,  H01L23/495 ,  H01L21/48

CPC分类号： H01L24/50 ,  H01L23/3114 ,  H01L23/49572 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/15787

摘要： A semiconductor device, is provided will semiconductor chips having a plurality of electrodes for external connection, elastomer resin portions formed of an elastomer resin, which are bonded to the semiconductor chip excepting at least some of the plurality of electrodes, a tape layer of resin including tape wiring patterns on the surface thereof, a plurality of solder bumps for bonding the printed wiring pattern to the tape wiring patterns, leads for connecting the plurality of electrodes of the semiconductor chips to the tape wiring patterns, and seal resin for covering the leads and the plurality of electrodes which are connected by the leads. The elastomer resin has a modulus of transverse elasticity not less than 50 MPa and not more than 750 MPa.

公开(公告)号：US5895965A

公开(公告)日：1999-04-20

申请号：US933056

申请日：1997-09-18

申请人： Naotaka Tanaka ,  Makoto Kitano ,  Akihiro Yaguchi ,  Ichiro Anjoh ,  Hideki Tanaka ,  Asao Nishimura

发明人： Naotaka Tanaka ,  Makoto Kitano ,  Akihiro Yaguchi ,  Ichiro Anjoh ,  Hideki Tanaka ,  Asao Nishimura

IPC分类号： H01L21/60 ,  H01L23/12 ,  H01L23/16 ,  H01L23/495

CPC分类号： H01L23/16 ,  H01L2224/50 ,  H01L2924/3511

摘要： In order to provide a semiconductor device of high reliability which suppresses a degradation of the fatigue strength of solder connection portions and warping of a tape-type wiring substrate forming the cause of the inferior contact between solder bumps and an external substrate, and a method of manufacturing the semiconductor device, a frame-like member is disposed on the inner peripheral part of the tape-type wiring substrate so as to relax constraint on the thermal deformation of the tape-type semiconductor substrate.

摘要翻译： 为了提供高可靠性的半导体器件，其抑制焊料连接部的疲劳强度的劣化和形成焊料凸块与外部基板之间的不良接触的原因的带状布线基板的翘曲，以及 制造半导体器件时，框带状部件设置在带状布线基板的内周部上，以便放松对带状半导体基板的热变形的约束。

公开(公告)号：US5569960A

公开(公告)日：1996-10-29

申请号：US438466

申请日：1995-05-10

申请人： Tetsuo Kumazawa ,  Makoto Kitano ,  Akihiro Yaguchi ,  Ryuji Kohno ,  Naotaka Tanaka ,  Nae Yoneda ,  Ichiro Anjoh

发明人： Tetsuo Kumazawa ,  Makoto Kitano ,  Akihiro Yaguchi ,  Ryuji Kohno ,  Naotaka Tanaka ,  Nae Yoneda ,  Ichiro Anjoh

IPC分类号： H05K1/18 ,  H01L21/60 ,  H01L23/12 ,  H01L23/31 ,  H01L23/50 ,  H05K1/11 ,  H05K3/34 ,  H01L23/48

CPC分类号： H01L24/11 ,  H01L23/3128 ,  H05K3/3436 ,  H01L2224/13099 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/20752 ,  H05K1/11 ,  H05K1/111 ,  H05K2201/094 ,  H05K2203/0465 ,  H05K3/3431 ,  Y02P70/613

摘要： An electronic component unit is provided with two electronic components which are disposed in parallel with each other and each of which has an internal electric circuit therein. Electrode pads are provided on the opposed surfaces of the two electronic components and are electrically connected to the internal electric circuits. The pads on one of the electronic components are respectively electrically and mechanically connected to the corresponding pads on the other electronic component by solder bumps. The areas of the pads increase or decrease stepwise in the direction from the central portions toward the outer peripheral edges of the two electronic components, while the volumes of the solder bumps are constant. Alternatively, the volumes of the solder bumps decrease or increase in the direction from the central portions toward the outer peripheral edges of the two electronic components, while the areas of all pads are constant. Each of the pads of the two electronic components is bonded to an associated solder bump over the whole area of the pad, whereby the shapes of the solder bumps respectively connected to the pads of the two electronic components change in the direction from the central portions toward the outer peripheral edges of the two electronic components to provide the solder bumps with different durabilities to stress, thereby assuring high reliability of the connection between the two electronic components.

摘要翻译： 电子部件单元设置有彼此并联布置的两个电子部件，每个电子部件在其中具有内部电路。 电极焊盘设置在两个电子部件的相对表面上并与内部电路电连接。 其中一个电子部件上的焊盘通过焊料凸块分别电连接和机械连接到另一电子部件上的对应的焊盘。 焊盘的面积在从两个电子部件的中心部分朝向外周边缘的方向上逐渐增加或减小，而焊料凸块的体积是恒定的。 或者，焊料凸块的体积在从两个电子部件的中心部分朝向外周边缘的方向上减小或增加，而所有焊盘的面积是恒定的。 两个电子部件的每个焊盘在焊盘的整个区域上结合到相关联的焊料凸块，由此分别连接到两个电子部件的焊盘的焊料凸块的形状在从中心部分朝向 两个电子部件的外周边缘，以使焊料凸块具有不同的应力耐久性，从而确保两个电子部件之间的连接的高可靠性。

公开(公告)号：US20120091583A1

公开(公告)日：2012-04-19

申请号：US13340165

申请日：2011-12-29

申请人： Michihiro KAWASHITA ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

发明人： Michihiro KAWASHITA ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

IPC分类号： H01L23/498

CPC分类号： H01L25/0657 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5386 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/81 ,  H01L24/94 ,  H01L25/074 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13009 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2224/16112 ,  H01L2224/16146 ,  H01L2224/274 ,  H01L2224/81136 ,  H01L2224/81345 ,  H01L2224/81365 ,  H01L2224/81801 ,  H01L2224/81898 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1205 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1451 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/35121 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

摘要： In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.

摘要翻译： 在层叠多个半导体芯片的半导体装置中，不会降低生产率而提高性能。 半导体器件具有多个元件，层间绝缘膜，焊盘和与依次形成在硅基板的主表面上的焊盘电连接的凸块电极，并且具有形成在硅衬底的背面上的背面电极 硅基板并与凸块电极电连接。 凸块电极具有贯穿焊盘并朝向硅衬底侧突出的突出部分。 背面电极形成为从硅衬底的背面侧朝向主面侧到达突起电极的突出部，并覆盖未到达的背面电极孔部的内侧 垫，使得背面电极与凸块电极电连接。

公开(公告)号：US08110900B2

公开(公告)日：2012-02-07

申请号：US12360466

申请日：2009-01-27

申请人： Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Michihiro Kawashita ,  Takahiro Naito ,  Takashi Akazawa

发明人： Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Michihiro Kawashita ,  Takahiro Naito ,  Takashi Akazawa

IPC分类号： H01L29/40

CPC分类号： H01L24/16 ,  H01L21/6835 ,  H01L21/7682 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/83 ,  H01L24/90 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/1134 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/838 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00012 ,  H01L2224/05552

摘要： After forming a ring-shaped trench penetrating through a semiconductor substrate from a rear surface side thereof and forming an insulating film inside the trench and on the rear surface of the semiconductor substrate, a through hole is formed in the insulating film and semiconductor substrate on an inner side of the ring-shaped trench from the rear surface side, thereby exposing a surface protection insulating film formed on a front surface of the semiconductor substrate at a bottom of the through hole. After removing the surface protection insulating film at the bottom of the through hole to form an opening to expose an element surface electrode, a contact electrode connected to the element surface electrode is formed on inner walls of the through hole and opening, and a pad electrode made of the same layer as the contact electrode is formed on the rear surface of the semiconductor substrate.

摘要翻译： 在形成从其后表面侧穿过半导体衬底的环形沟槽形成并在沟槽内部和半导体衬底的后表面上形成绝缘膜之后，在绝缘膜和半导体衬底上形成通孔 从后表面侧的环形沟槽的内侧，露出在通孔的底部形成在半导体衬底的前表面上的表面保护绝缘膜。 在去除通孔底部的表面保护绝缘膜以形成露出元件表面电极的开口之后，在通孔和开口的内壁上形成连接到元件表面电极的接触电极，并且焊盘电极 由与所述接触电极相同的层形成在所述半导体衬底的后表面上。

公开(公告)号：US20110233773A1

公开(公告)日：2011-09-29

申请号：US13153860

申请日：2011-06-06

申请人： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

发明人： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

IPC分类号： H01L23/48

CPC分类号： H01L21/76898 ,  H01L21/6835 ,  H01L24/05 ,  H01L24/90 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05553 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/1134 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/90 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05552

摘要： A through silicon via reaching a pad from a second surface of a semiconductor substrate is formed. A penetration space in the through silicon via is formed of a first hole and a second hole with a diameter smaller than that of the first hole. The first hole is formed from the second surface of the semiconductor substrate to the middle of the interlayer insulating film. Further, the second hole reaching the pad from the bottom of the first hole is formed. Then, the interlayer insulating film formed on the first surface of the semiconductor substrate has a step shape reflecting a step difference between the bottom surface of the first hole and the first surface of the semiconductor substrate. More specifically, the thickness of the interlayer insulating film between the bottom surface of the first hole and the pad is smaller than that in other portions.

摘要翻译： 形成从半导体衬底的第二表面到达焊盘的通硅。 贯穿硅通孔中的穿透空间由直径小于第一孔直径的第一孔和第二孔形成。 第一孔从半导体衬底的第二表面到层间绝缘膜的中间形成。 此外，形成从第一孔的底部到达垫的第二孔。 然后，形成在半导体衬底的第一表面上的层间绝缘膜具有反映第一孔的底表面和半导体衬底的第一表面之间的台阶差的台阶形状。 更具体地说，第一孔的底表面和垫之间的层间绝缘膜的厚度小于其它部分的厚度。

公开(公告)号：US20100155940A1

公开(公告)日：2010-06-24

申请号：US12640766

申请日：2009-12-17

申请人： Michihiro KAWASHITA ,  Yasuhiro YOSHIMURA ,  Naotaka Tanaka ,  Takahiro NAITO ,  Takashi AKAZAWA

发明人： Michihiro KAWASHITA ,  Yasuhiro YOSHIMURA ,  Naotaka Tanaka ,  Takahiro NAITO ,  Takashi AKAZAWA

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L25/0657 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5386 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/81 ,  H01L24/94 ,  H01L25/074 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13009 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2224/16112 ,  H01L2224/16146 ,  H01L2224/274 ,  H01L2224/81136 ,  H01L2224/81345 ,  H01L2224/81365 ,  H01L2224/81801 ,  H01L2224/81898 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1205 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1451 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/35121 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

摘要： In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface-electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.

摘要翻译： 在层叠多个半导体芯片的半导体装置中，不会降低生产率而提高性能。 半导体器件具有多个元件，层间绝缘膜，焊盘和与依次形成在硅基板的主表面上的焊盘电连接的凸块电极，并且具有形成在硅衬底的背面上的背面电极 硅基板并与凸块电极电连接。 凸块电极具有贯穿焊盘并朝向硅衬底侧突出的突出部分。 背面电极形成为从硅衬底的背面侧朝向主面侧到达突起电极的突出部，并覆盖未到达的背面电极孔部的内部 垫，使得背面电极与凸块电极电连接。

公开(公告)号：US20050009329A1

公开(公告)日：2005-01-13

申请号：US10840677

申请日：2004-05-07

申请人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Naotaka Tanaka

发明人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Naotaka Tanaka

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/12 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/48

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/11 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099

摘要： A semiconductor chip production method including the steps of: forming a front side recess in a semiconductor substrate; depositing a metal material in the front side recess to form a front side electrode electrically connected to a functional device formed on the front surface; removing a rear surface portion of the semiconductor substrate to reduce the thickness of the semiconductor substrate to a thickness greater than the depth of the front side recess; forming a rear side recess communicating with the front side recess in the rear surface of the semiconductor substrate after the thickness reducing step; and depositing a metal material in the rear side recess to form a rear side electrode electrically connected to the front side electrode for formation of a through-electrode.

摘要翻译： 一种半导体芯片制造方法，包括以下步骤：在半导体衬底中形成前侧凹部; 在所述前侧凹部中沉积金属材料，以形成与形成在所述前表面上的功能元件电连接的前侧电极; 去除半导体衬底的后表面部分以将半导体衬底的厚度减小到大于前侧凹槽的深度的厚度; 在所述厚度减小步骤之后形成与所述半导体衬底的后表面中的所述前侧凹部连通的后侧凹部; 以及在后侧凹部中沉积金属材料，以形成与前侧电极电连接以形成贯通电极的后侧电极。

公开(公告)号：US20050001314A1

公开(公告)日：2005-01-06

申请号：US10873251

申请日：2004-06-23

申请人： Naotaka Tanaka ,  Tomio Iwasaki ,  Hideo Miura ,  Yasuyuki Nakajima ,  Tomoo Matsuzawa

发明人： Naotaka Tanaka ,  Tomio Iwasaki ,  Hideo Miura ,  Yasuyuki Nakajima ,  Tomoo Matsuzawa

IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/44 ,  H01L21/56 ,  H01L21/60 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/485 ,  H01L23/532 ,  H01L25/065

CPC分类号： H01L23/53238 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48453 ,  H01L2224/48465 ,  H01L2224/4851 ,  H01L2224/48624 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85205 ,  H01L2225/06558 ,  H01L2225/06568 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20303 ,  H01L2924/20304 ,  H01L2924/20305 ,  H01L2924/20751 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2924/00015

摘要： An object of the present invention is to establish, for an LSI having a stacked interconnection structure of Cu interconnect/Low-k material, a narrow pitch wire bonding technique enabling a reduction in damage to a bonding pad and application similar to the conventional LSI of an aluminum interconnection. In a semiconductor device having a multilayer interconnection made of a Cu interconnect/Low-k dielectric material, the above-described object can be attained by a bonding pad structure in which all the wiring layers up to the uppermost cap interconnect are formed of a Cu wiring layer and a bonding pad portion formed of a Cu layer is equipped with a refractory intermediate metal layer such as Ti (titanium) filmor (tungsten) film on the Cu layer and an aluminum alloy layer on the intermediate metal layer.

摘要翻译： 本发明的目的在于，对于具有Cu互连/ Low-k材料的堆叠互连结构的LSI，可以实现能够减少对焊盘的损伤的窄间距引线接合技术和类似于常规LSI的 铝互连。 在具有由Cu互连/ Low-k电介质材料制成的多层互连的半导体器件中，上述目的可以通过一种焊盘结构来实现，其中所有的布线层直到最上盖互连件都是由Cu 布线层和由Cu层形成的接合焊盘部分在Cu层上装有诸如Ti（钛）膜（钨）的耐火材料中间金属层和中间金属层上的铝合金层。

公开(公告)号：US06423571B1

公开(公告)日：2002-07-23

申请号：US09884378

申请日：2001-06-20

申请人： Masahiko Ogino ,  Akira Nagai ,  Shuji Eguchi ,  Toshiaki Ishii ,  Masanori Segawa ,  Haruo Akahoshi ,  Akio Takahashi ,  Takao Miwa ,  Naotaka Tanaka ,  Ichirou Anjou

发明人： Masahiko Ogino ,  Akira Nagai ,  Shuji Eguchi ,  Toshiaki Ishii ,  Masanori Segawa ,  Haruo Akahoshi ,  Akio Takahashi ,  Takao Miwa ,  Naotaka Tanaka ,  Ichirou Anjou

IPC分类号： H01L2144

摘要： A method of forming a semiconductor device having a multi-layered wiring structure that includes a conductor layer to be electrically connected to a packaging substrate, with the multi-layered wiring structure being provided on a circuit formation surface of a semiconductor chip. Ball-like terminals are formed, disposed in a grid array on the surface of the multi-layered wiring structure on the packaging substrate side. The multi-layered wiring structure is formed to include a buffer layer for relieving a thermal stress provided between the semiconductor chip and the packaging substrate, due to the packaging procedure. In the semiconductor device formed, the wiring distance is shorter than that of a conventional semiconductor device, so that an inductance component becomes smaller, to thereby increase signal speed. The distance between a ground layer and a power supply layer is shortened, to reduce noise produced upon operation, and also a thermal stress upon packaging is relieved by the buffer layer of the multi-layered wiring structure, resulting in improved connection reliability, and the number of terminals per unit can be increased, because of elimination of wire bonding. The buffer layer can be made of an elastomer, and can have a modulus of elasticity of 10 kg/mm2 or less.