Buried pattern substrate
    42.
    发明申请
    Buried pattern substrate 审中-公开
    埋地图案衬底

    公开(公告)号:US20090242238A1

    公开(公告)日:2009-10-01

    申请号:US12457166

    申请日:2009-06-02

    IPC分类号: H05K1/09

    摘要: A buried pattern substrate includes an insulation layer; a circuit pattern buried in the insulation layer such that a part thereof is exposed at a surface of the insulation layer; and a stud bump buried in the insulation layer such that one end portion is exposed at one surface of the insulation layer, and such that the other end portion is exposed at the other surface of the insulation layer.

    摘要翻译: 掩埋图案衬底包括绝缘层; 埋置在绝缘层中的电路图案,使得其一部分在绝缘层的表面露出; 以及埋在所述绝缘层中的螺柱凸起,使得一个端部暴露在所述绝缘层的一个表面处,并且使得所述另一端部暴露在所述绝缘层的另一个表面处。

    BOARD ON CHIP PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF
    46.
    发明申请
    BOARD ON CHIP PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF 审中-公开
    芯片包装基板及其制造方法

    公开(公告)号:US20120225521A1

    公开(公告)日:2012-09-06

    申请号:US13472317

    申请日:2012-05-15

    IPC分类号: H01L21/50

    摘要: A single-layer board on chip package substrate and a method of manufacturing the same are disclosed. The single-layer board on chip package substrate in accordance with an embodiment of the present invention includes an insulator, which has a window perforated therethrough, a wiring pattern, a wire bonding pad and a solder ball pad, which are embedded in one surface of the insulator, and a solder resist layer, which is formed on the one surface of the insulator such that the solder resist layer covers the wiring pattern but at least portions of the wire bonding pad and the solder ball pad are exposed.

    摘要翻译: 公开了一种单层片上封装衬底及其制造方法。 根据本发明的实施例的单层片上封装基板包括:具有穿孔的窗口的绝缘体,布线图案,引线接合焊盘和焊球垫,其嵌入在 绝缘体和阻焊层,其形成在绝缘体的一个表面上,使得阻焊层覆盖布线图案,但是引线接合焊盘和焊球垫的至少一部分被暴露。