公开(公告)号：US20080191723A1

公开(公告)日：2008-08-14

申请号：US11886139

申请日：2005-03-11

申请人： Eichi Osato ,  Junichi Kasai ,  Kouichi Meguro ,  Masanori Onodera

发明人： Eichi Osato ,  Junichi Kasai ,  Kouichi Meguro ,  Masanori Onodera

IPC分类号： G01R31/02 ,  H05K7/00

CPC分类号： G01R1/0483 ,  G01R1/0466

摘要： An IC device (10) held on an IC carrier (24) is a double-sided electrode type BGA IC device (10) provided with bump electrodes (14) on a first surface of a package. The IC device has, on a second surface opposite the first surface, (a) a central protrusion (30), (b) a peripheral portion (32) lower than the protrusion by one step, and (c) upper electrodes (18) formed on the peripheral portion of the IC device. The IC carrier is provided with a frame (36), a cover (40), and a holding means (42). The frame forms a device reception space (38) for receiving the IC device. The cover can cover the upper electrodes while in contact with the periphery of the IC device held on the IC carrier. The holding means can hold the IC device on the IC carrier with the cover covering the upper electrodes of the IC device. The IC device can be set in an IC socket while being mounted on the IC carrier.

摘要翻译： 保持在IC载体（24）上的IC器件（10）是在封装的第一表面上设置有凸块电极（14）的双面电极型BGA IC器件（10）。 IC器件在与第一表面相对的第二表面上具有（a）中心突起（30），（b）比突起低一级的周边部分（32），（c）上电极（18） 形成在IC器件的周边部分上。 IC载体设有框架（36），盖（40）和保持装置（42）。 该帧形成用于接收IC设备的设备接收空间（38）。 盖可以覆盖上电极，同时与保持在IC载体上的IC器件的周边接触。 保持装置可以将IC器件保持在IC载体上，盖子覆盖IC器件的上部电极。 该IC器件可以安装在IC载体上而设置在IC插座中。

公开(公告)号：US07964446B2

公开(公告)日：2011-06-21

申请号：US12044851

申请日：2008-03-07

申请人： Masanori Onodera ,  Kouichi Meguro

发明人： Masanori Onodera ,  Kouichi Meguro

IPC分类号： H01L21/336

CPC分类号： H01L21/563 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/83191 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A manufacturing method of a semiconductor device includes: forming a columnar electrode on a semiconductor wafer; flip-chip bonding a second semiconductor chip onto the semiconductor wafer; forming a molding portion on the semiconductor wafer, the molding portion covering and molding the columnar electrode and the second semiconductor chip; grinding or polishing the molding portion and the second semiconductor chip so that an upper face of the columnar electrode and an upper face of the semiconductor chip are exposed; and cutting the molding portion and the semiconductor wafer so that a first semiconductor chip, where the second semiconductor chip is flip-chip bonded and the columnar electrode is formed, is formed.

摘要翻译： 半导体器件的制造方法包括：在半导体晶片上形成柱状电极; 将第二半导体芯片倒装成半导体晶片; 在所述半导体晶片上形成模制部分，所述模制部分覆盖并模制所述柱状电极和所述第二半导体芯片; 研磨或抛光模制部分和第二半导体芯片，使得柱状电极的上表面和半导体芯片的上表面露出; 并且切割成型部和半导体晶片，从而形成第二半导体芯片倒装芯片接合的第一半导体芯片和柱状电极。

公开(公告)号：US20070105304A1

公开(公告)日：2007-05-10

申请号：US11540034

申请日：2006-09-28

申请人： Junichi Kasai ,  Kouichi Meguro ,  Masanori Onodera

发明人： Junichi Kasai ,  Kouichi Meguro ,  Masanori Onodera

IPC分类号： H01L21/8242 ,  H01L29/76

CPC分类号： H01L25/0657 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H05K3/323 ,  H05K2203/107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor device, a fabrication method therefor, and a film fabrication method, the semiconductor device including a first substrate (e.g., a semiconductor chip), an anisotropic conductive film that is provided on the first substrate and has a wiring pattern having at least a portion providing conduction through the anisotropic conductive film, and a second substrate (semiconductor chip) provided on the anisotropic conductive film and coupled to the first substrate via the portion providing conduction through the anisotropic conductive film. According to the present invention, it is possible to provide a semiconductor device, a fabrication method therefor, and a film fabrication method, by which production costs can be reduced in electrically coupling different positions in upper and lower substrates.

摘要翻译： 本发明提供一种半导体器件及其制造方法和膜制造方法，该半导体器件包括第一衬底（例如，半导体芯片），各向异性导电膜，其设置在第一衬底上并具有布线图案 具有通过各向异性导电膜提供导电的至少一部分，以及设置在各向异性导电膜上的第二基板（半导体芯片），并且经由各向异性导电膜提供导电的部分与第一基板耦合。 根据本发明，可以提供一种半导体器件及其制造方法和薄膜制造方法，通过该方法可以降低在上下基板中电连接不同位置的生产成本。

公开(公告)号：US20070065653A1

公开(公告)日：2007-03-22

申请号：US11603151

申请日：2006-11-22

申请人： Kouichi Meguro ,  Toru Nishino ,  Noboru Hayasaka

发明人： Kouichi Meguro ,  Toru Nishino ,  Noboru Hayasaka

IPC分类号： B32B3/26 ,  B32B3/00 ,  B32B3/02

CPC分类号： H01L21/4846 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  Y10T428/21 ,  Y10T428/249953 ,  Y10T428/249971 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A substrate sheet material for semiconductor device and manufacturing method thereof and a manufacturing method of a semiconductor device using the substrate sheet material can suppress and reduce a warp which may occur in the substrate sheet material even when a plurality of semiconductor chips formed in the substrate sheet material are molded all at once. A plurality of substrates to be used for producing semiconductor packages are formed in the substrate sheet material. An outer configuration of the substrate sheet material is made into a circular shape.

公开(公告)号：US08900993B2

公开(公告)日：2014-12-02

申请号：US13052865

申请日：2011-03-21

申请人： Kouichi Meguro

发明人： Kouichi Meguro

IPC分类号： H01L21/48 ,  H01L21/44 ,  H01L21/50 ,  H01L23/00 ,  H01L21/768 ,  H01L25/065 ,  H01L25/10 ,  H01L23/48 ,  H01L21/683 ,  H01L21/56 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L21/304 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/481 ,  H01L24/11 ,  H01L24/16 ,  H01L24/17 ,  H01L24/18 ,  H01L24/19 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/82 ,  H01L24/85 ,  H01L24/91 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/13147 ,  H01L2224/16054 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1713 ,  H01L2224/18 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48096 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/49112 ,  H01L2224/49173 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/18165 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A semiconductor device includes a first semiconductor chip having a pad electrode formed on an upper surface thereof; a resin section sealing the first semiconductor chip with the upper surface and a side surface of the first semiconductor chip being covered and a lower surface of die first semiconductor chip being exposed; a columnar electrode communicating between the upper surface and the lower surface of the resin section with the upper surface and the lower surface of the columnar electrode being exposed on the resin section and at least a part of the side surface of the columnar electrode being covered; and a bonding wire connecting the pad electrode and the columnar electrode with a part of the bonding wire being embedded in the columnar electrode as one end of the bonding wire being exposed on the lower surface of the columnar electrode and the remaining part of the bonding wire being covered with the resin section, and a method for manufacturing the same.

摘要翻译： 半导体器件包括：第一半导体芯片，其具有形成在其上表面上的焊盘电极; 密封第一半导体芯片与上表面和第一半导体芯片的侧表面被覆盖并且裸片第一半导体芯片的下表面被暴露的树脂部分; 柱状电极在树脂部分的上表面和下表面之间连通，柱状电极的上表面和下表面暴露在树脂部分上，并且柱状电极的侧表面的至少一部分被覆盖; 以及连接焊盘电极和柱状电极的接合线，一部分接合线被埋入柱状电极中，一方的接合线的一端露出在柱状电极的下表面上，接合线的其余部分 被树脂部覆盖的方法及其制造方法。

公开(公告)号：US07939925B2

公开(公告)日：2011-05-10

申请号：US12258067

申请日：2008-10-24

申请人： Yuki Koide ,  Kouichi Meguro

发明人： Yuki Koide ,  Kouichi Meguro

IPC分类号： H01L23/52

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/854 ,  H01L2224/85951 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06596 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19107 ,  H01L2924/351 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/4554

摘要： A semiconductor package having a molding unit that seals bonding wires connected to electrode pads of a semiconductor chip is provided with through electrode units comprising bonding wires embedded therein and penetrating the molding unit. A leading end of the respective through electrode units is exposed from an upper surface of the molding unit and a lower surface of the molding unit.

摘要翻译： 具有密封与半导体芯片的电极焊盘连接的接合线的成型单元的半导体封装设置有贯通电极单元，该电极单元包括嵌入其中并穿透成型单元的接合线。 各贯通电极单元的前端从模制单元的上表面和模制单元的下表面露出。

公开(公告)号：US07932616B2

公开(公告)日：2011-04-26

申请号：US12098248

申请日：2008-04-04

申请人： Kouichi Meguro

发明人： Kouichi Meguro

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L21/304 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/481 ,  H01L24/11 ,  H01L24/16 ,  H01L24/17 ,  H01L24/18 ,  H01L24/19 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/82 ,  H01L24/85 ,  H01L24/91 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/13147 ,  H01L2224/16054 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1713 ,  H01L2224/18 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48096 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/49112 ,  H01L2224/49173 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/18165 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A semiconductor device includes a first semiconductor chip having a pad electrode formed on an upper surface thereof; a resin section sealing the first semiconductor chip with the upper surface and a side surface of the first semiconductor chip being covered and a lower surface of the first semiconductor chip being exposed; a columnar electrode communicating between the upper surface and the lower surface of the resin section with the upper surface and the lower surface of the columnar electrode being exposed on the resin section and at least a part of the side surface of the columnar electrode being covered; and a bonding wire connecting the pad electrode and the columnar electrode with a part of the bonding wire being embedded in the columnar electrode as one end of the bonding wire being exposed on the lower surface of the columnar electrode and the remaining part of the bonding wire being covered with the resin section, and a method for manufacturing the same.

摘要翻译： 半导体器件包括：第一半导体芯片，其具有形成在其上表面上的焊盘电极; 将所述第一半导体芯片与所述第一半导体芯片的上表面和所述第一半导体芯片的侧面进行封装而使所述第一半导体芯片的下表面露出的树脂部， 柱状电极在树脂部分的上表面和下表面之间连通，柱状电极的上表面和下表面暴露在树脂部分上，并且柱状电极的侧表面的至少一部分被覆盖; 以及连接焊盘电极和柱状电极的接合线，一部分接合线被埋入柱状电极中，一方的接合线的一端露出在柱状电极的下表面上，接合线的其余部分 被树脂部覆盖的方法及其制造方法。

公开(公告)号：US20090267207A1

公开(公告)日：2009-10-29

申请号：US12258067

申请日：2008-10-24

申请人： Yuki Koide ,  Kouichi Meguro

发明人： Yuki Koide ,  Kouichi Meguro

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L21/56 ,  H01L21/768

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/854 ,  H01L2224/85951 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06596 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19107 ,  H01L2924/351 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/4554

摘要： A semiconductor package having a molding unit that seals bonding wires connected to electrode pads of a semiconductor chip is provided with through electrode units comprising bonding wires embedded therein and penetrating the molding unit. A leading end of the respective through electrode units is exposed from an upper surface of the molding unit and a lower surface of the molding unit.

摘要翻译： 具有密封与半导体芯片的电极焊盘连接的接合线的成型单元的半导体封装设置有贯通电极单元，该电极单元包括嵌入其中并穿透成型单元的接合线。 各贯通电极单元的前端从模制单元的上表面和模制单元的下表面露出。

公开(公告)号：US07157311B2

公开(公告)日：2007-01-02

申请号：US10718677

申请日：2003-11-24

申请人： Kouichi Meguro ,  Toru Nishino ,  Noboru Hayasaka

发明人： Kouichi Meguro ,  Toru Nishino ,  Noboru Hayasaka

IPC分类号： H01L21/50

CPC分类号： H01L21/4846 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  Y10T428/21 ,  Y10T428/249953 ,  Y10T428/249971 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A substrate sheet material for semiconductor device and manufacturing method thereof and a manufacturing method of a semiconductor device using the substrate sheet material can suppress and reduce a warp which may occur in the substrate sheet material even when a plurality of semiconductor chips formed in the substrate sheet material are molded all at once. A plurality of substrates to be used for producing semiconductor packages are formed in the substrate sheet material. An outer configuration of the substrate sheet material is made into a circular shape.

摘要翻译： 半导体装置用基板材料及其制造方法以及使用该基板片材的半导体装置的制造方法，即使在形成于基板片材中的多个半导体芯片也能够抑制和减少基板片材中可能发生的翘曲 材料一次成型。 在基板片材中形成用于制造半导体封装的多个基板。 将基材片材的外部构造制成圆形。

公开(公告)号：US08481366B2

公开(公告)日：2013-07-09

申请号：US13094668

申请日：2011-04-26

申请人： Masahiko Harayama ,  Kouichi Meguro ,  Junichi Kasai

发明人： Masahiko Harayama ,  Kouichi Meguro ,  Junichi Kasai

IPC分类号： H01L21/00

CPC分类号： G06F21/34 ,  H01L21/4842 ,  H01L21/566 ,  H01L23/3121 ,  H01L23/49551 ,  H01L23/49811 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/85

摘要： A semiconductor device is provided that includes a semiconductor chip and a resin section that molds the semiconductor chip and has a first through-hole. A through electrode that is electrically coupled to the semiconductor chip, extends through the resin section, and extends between a top edge and a bottom edge of an inner surface of the first through-hole. A cavity which extends between planes corresponding to an upper surface and a lower surface of the resin section is formed inside the first through-hole.

摘要翻译： 提供了一种半导体器件，其包括半导体芯片和模制半导体芯片并具有第一通孔的树脂部分。 电耦合到半导体芯片的通孔延伸穿过树脂部分，并且在第一通孔的内表面的顶边缘和底边之间延伸。 在第一通孔的内部形成有在与树脂部的上表面和下表面对应的面之间延伸的空腔。