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143 条记录 (耗时 0.029 秒)

    Leadframe for semiconductor chips and semiconductor module having the lead frame
    52.
    发明授权
    Leadframe for semiconductor chips and semiconductor module having the lead frame 失效
    具有半导体芯片的引线框架和具有引线框架的半导体模块

    公开(公告)号：US6144088A

    公开(公告)日：2000-11-07

    申请号：US898734

    申请日：1997-07-23

    申请人： Jens Pohl ,  Michael Blumenauer ,  Ulrich Vidal

    发明人： Jens Pohl ,  Michael Blumenauer ,  Ulrich Vidal

    IPC分类号： H01L23/495 ,  H01L23/50 ,  H01L23/28 ,  H01L23/48 ,  H01L29/44

    CPC分类号： H01L23/4951 ,  H01L2924/0002

    摘要： A leadframe for connection to a semiconductor chip, in particular a metal leadframe, includes a plurality of lead prongs and at least two raised lead surfaces. When a semiconductor module that includes the leadframe and a semiconductor chip is sheathed with plastic, the raised lead surfaces assure a uniform flow of a plastic composition in a mold cavity and thus prevent air from becoming trapped in a plastic package. The lead surfaces are preferably created by folding over tabs in the leadframe. The invention also relates to preliminary stages of the leadframe and to semiconductor components that contain the leadframe of the invention.

    摘要翻译： 用于连接到半导体芯片，特别是金属引线框架的引线框架包括多个引线插脚和至少两个凸起引线表面。 当包括引线框和半导体芯片的半导体模块被塑料覆盖时，升高的引线表面确保塑料组合物在模腔中的均匀流动，从而防止空气被捕获在塑料封装中。 引线表面优选通过折叠引线框架中的突出部而形成。 本发明还涉及引线框架和包含本发明引线框架的半导体部件的初步阶段。

    On-chip RF shields with backside redistribution lines
    56.
    发明授权
    On-chip RF shields with backside redistribution lines 有权
    具有背面再分配线的片上RF屏蔽

    公开(公告)号：US07936052B2

    公开(公告)日：2011-05-03

    申请号：US12242487

    申请日：2008-09-30

    申请人： Hans-Joachim Barth ,  Jens Pohl ,  Gottfried Beer ,  Heinrich Koerner

    发明人： Hans-Joachim Barth ,  Jens Pohl ,  Gottfried Beer ,  Heinrich Koerner

    IPC分类号： H01L29/72

    CPC分类号： H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/552 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05569 ,  H01L2924/0002 ,  H01L2224/05552

    摘要： Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, a method of fabricating the system on chip includes forming a through substrate opening from a back surface of a substrate, the through substrate opening disposed between a first and a second region, the first region comprising devices for RF circuitry and the second region comprising devices for other circuitry. The method further includes forming patterns for redistribution lines on a photo resist layer, the photo resist layer disposed under the back surface, and filling the through substrate opening and the patterns for redistribution lines with a conductive material.

    摘要翻译： 公开了一种片上系统的结构以及片上系统的形成方法。 在一个实施例中，一种制造片上系统的方法包括从衬底的背面形成穿透衬底开口，穿过衬底开口设置在第一和第二区域之间，第一区域包括用于RF电路的装置，第二区域包括第二 区域包括用于其他电路的装置。 该方法还包括在光致抗蚀剂层上形成用于再分配线的图案，设置在背面下方的光致抗蚀剂层，以及用导电材料填充贯通基板开口和再分配线图案。

    Through substrate via semiconductor components
    59.
    发明授权
    Through substrate via semiconductor components 有权
    通过半导体元件的基板

    公开(公告)号：US07786584B2

    公开(公告)日：2010-08-31

    申请号：US11944846

    申请日：2007-11-26

    申请人： Hans-Joachim Barth ,  Jens Pohl

    发明人： Hans-Joachim Barth ,  Jens Pohl

    IPC分类号： H01L23/48 ,  H01L21/44

    CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2924/0002 ,  H01L2924/014 ,  H01L2224/05552

    摘要： A structure and method of forming landing pads for through substrate vias in forming stacked semiconductor components are described. In various embodiments, the current invention describes landing pad structures that includes multiple levels of conductive plates connected by vias such that the electrical connection between a through substrate etch and landing pad is independent of the location of the bottom of the through substrate trench.

    摘要翻译： 描述了在形成堆叠的半导体部件中形成通过衬底通孔的着陆焊盘的结构和方法。 在各种实施例中，本发明描述着陆焊盘结构，其包括通过通孔连接的多层导电板，使得贯穿衬底蚀刻和着陆焊盘之间的电连接独立于贯穿衬底沟槽的底部的位置。