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    High performance package on package
    63.
    发明授权
    High performance package on package 有权
    高性能封装封装

    公开(公告)号：US09165906B2

    公开(公告)日：2015-10-20

    申请号：US13709723

    申请日：2012-12-10

    Applicant: Invensas Corporation

    Inventor： Ilyas Mohammed ,  Belgacem Haba

    IPC: H01L23/48 ,  H01L23/52 ,  H01L25/065 ,  H01L25/10 ,  H01L25/18 ,  H01L23/31 ,  H01L23/538 ,  H01L23/13

    CPC classification number: H01L25/0652 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/5389 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/00

    Abstract: A microelectronic assembly can include a first package comprising a processor and a second package electrically connected to the first package. The second package can include two or more microelectronic elements each having memory storage array function and contacts at a respective element face, upper and lower opposite package faces, upper and lower terminals at the respective upper and lower package faces, and electrically conductive structure extending through the second package. At least portions of edges of respective microelectronic elements of the two or more microelectronic elements can be spaced apart from one another, so as to define a central region between the edges that does not overlie any of the element faces of the microelectronic elements of the second package. The electrically conductive structure can be aligned with the central region and can electrically connect the lower terminals with at least one of: the upper terminals or the contacts.

    Abstract translation: 微电子组件可以包括包括处理器的第一封装和电连接到第一封装的第二封装。 第二封装可以包括两个或更多个微电子元件，每个微电子元件具有存储器阵列功能，并且在相应的元件面，上下相对的封装面，相应的上封装面和下封装面的上端和下端接触，并且导电结构延伸穿过 第二包。 两个或多个微电子元件的相应微电子元件的边缘的至少部分可以彼此间隔开，以便限定边缘之间的中心区域，该中心区域不覆盖第二个微电子元件的微电子元件的任何元件面 包。 导电结构可以与中心区域对准，并且可以将下端子与上端子或触头中的至少一个电连接。

    Microelectronic assemblies having reinforcing collars on connectors extending through encapsulation
    65.
    发明授权
    Microelectronic assemblies having reinforcing collars on connectors extending through encapsulation 有权
    微电子组件在通过封装延伸的连接器上具有加强套环

    公开(公告)号：US09034696B2

    公开(公告)日：2015-05-19

    申请号：US13942602

    申请日：2013-07-15

    Applicant: Invensas Corporation

    Inventor： Ilyas Mohammed ,  Belgacem Haba

    IPC: H01L21/00 ,  H01L23/28 ,  H01L21/56

    CPC classification number: H01L23/28 ,  H01L21/56 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/5389 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00

    Abstract: A microelectronic assembly or package can include first and second support elements and a microelectronic element between inwardly facing surfaces of the support elements. First connectors and second connectors such as solder balls, metal posts, stud bumps, or the like face inwardly from the respective support elements and are aligned with and electrically coupled with one another in columns. Dielectric reinforcing collars are provided on outer surfaces of the first connectors, second connectors or both, and an encapsulation separates pairs of coupled connectors from one another and may fill spaces between support elements.

    Abstract translation: 微电子组件或封装可以包括第一和第二支撑元件以及在支撑元件的向内表面之间的微电子元件。 第一连接器和第二连接器，例如焊球，金属柱，螺柱凸起等从相应的支撑元件向内表面并且彼此对齐并且彼此电连接。 电介质增强套环设置在第一连接器，第二连接器或两者的外表面上，并且封装将成对的耦合连接器彼此分开并且可以填充支撑元件之间的空间。

    CAVITIES CONTAINING MULTI-WIRING STRUCTURES AND DEVICES
    66.
    发明申请
    CAVITIES CONTAINING MULTI-WIRING STRUCTURES AND DEVICES 有权
    包含多层结构和设备的CAVITIES

    公开(公告)号：US20150101858A1

    公开(公告)日：2015-04-16

    申请号：US14573461

    申请日：2014-12-17

    Applicant: Invensas Corporation

    Inventor： Cyprian Emeka Uzoh ,  Craig Mitchell ,  Belgacem Haba ,  Ilyas Mohammed

    IPC: H05K1/02 ,  H05K1/11 ,  H01R12/71

    CPC classification number: H05K1/0271 ,  H01L23/49827 ,  H01L2924/0002 ,  H01R12/714 ,  H05K1/114 ,  H05K1/115 ,  H05K3/42 ,  H05K2201/09645 ,  H05K2201/10378 ,  H05K2203/0242 ,  H05K2203/025 ,  Y10T29/49165 ,  H01L2924/00

    Abstract: A method is disclosed for making an interconnection component. The steps include forming a mask layer covering a first opening in a sheet-like element that has first and second opposed surfaces; forming a plurality of mask openings in the mask layer, wherein the first opening and a portion of the first surface are partly aligned with each mask opening; and forming electrical conductors on spaced apart portions of the first surface and on spaced apart portions of the interior surface within the first opening which are exposed by the mask openings. The element may consist essentially of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius. Each conductor may extend along an axial direction of the first opening and the first conductors may be fully separated from one another within the first opening.

    Abstract translation: 公开了一种制造互连部件的方法。 所述步骤包括在具有第一和第二相对表面的片状元件中形成覆盖第一开口的掩模层; 在所述掩模层中形成多个掩模开口，其中所述第一开口和所述第一表面的一部分与每个掩模开口部分对准; 以及在所述第一开口中的所述第一表面的间隔开的部分和所述第一开口内的所述内表面的间隔开的部分上形成电导体，所述部分被所述掩模开口暴露。 元件可以基本上由热膨胀系数小于10ppm /℃的材料组成。 每个导体可以沿着第一开口的轴向方向延伸，并且第一导体可以在第一开口内彼此完全分离。

    EMBEDDED PACKAGING WITH PREFORMED VIAS
    67.
    发明申请
    EMBEDDED PACKAGING WITH PREFORMED VIAS 有权
    嵌入式包装与预制VIAS

    公开(公告)号：US20150043190A1

    公开(公告)日：2015-02-12

    申请号：US13961344

    申请日：2013-08-07

    Applicant: Invensas Corporation

    Inventor： Ilyas Mohammed ,  Belgacem Haba

    IPC: H05K7/00 ,  H01L21/48

    CPC classification number: H01L21/565 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01L24/96 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/18162 ,  H05K1/185 ,  H05K7/00 ,  Y10T29/49147 ,  H01L2924/00

    Abstract: Microelectronic assemblies and methods of making the same are disclosed. In some embodiments, a microelectronic assembly includes a microelectronic element having edge surfaces bounding a front surface and contacts at the front surface; rigid metal posts disposed between at least one edge surface and a corresponding edge of the assembly, each metal post having a sidewall separating first and second end surfaces, the sidewalls have a root mean square (rms) surface roughness of less than about 1 micron; a encapsulation contacting at least the edge surfaces and the sidewalls; an insulation layer overlying the encapsulation; connection elements extending through the insulation layer, wherein at least some connection elements have cross sections smaller than those of the metal posts; a redistribution structure deposited on the insulation layer and electrically connecting first terminals with corresponding metal posts through the first connection elements, some metal posts electrically coupled with contacts of microelectronic element.

    Abstract translation: 公开了微电子组件及其制造方法。 在一些实施例中，微电子组件包括微电子元件，其具有界定前表面的边缘表面并在前表面处接触; 刚性金属柱设置在组件的至少一个边缘表面和相应边缘之间，每个金属柱具有分隔第一和第二端面的侧壁，所述侧壁具有小于约1微米的均方根（rms）表面粗糙度; 至少所述边缘表面和所述侧壁的封装; 覆盖封装的绝缘层; 连接元件延伸穿过绝缘层，其中至少一些连接元件的横截面小于金属柱的横截面; 沉积在绝缘层上的再分布结构，并且通过第一连接元件将第一端子与相应的金属柱电连接，一些金属柱与微电子元件的触点电耦合。

    Chips with high fracture toughness through a metal ring
    70.
    发明授权
    Chips with high fracture toughness through a metal ring 有权
    通过金属环具有高断裂韧性的芯片

    公开(公告)号：US08865570B2

    公开(公告)日：2014-10-21

    申请号：US14146080

    申请日：2014-01-02

    Applicant: Invensas Corporation

    Inventor： Ilyas Mohammed

    IPC: H01L21/00 ,  H01L29/66

    CPC classification number: H01L21/78 ,  H01L23/3107 ,  H01L23/562 ,  H01L23/585 ,  H01L29/0657 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A method of making an edge-reinforced microelectronic element is disclosed. The steps include mechanically cutting along dicing lanes of a substrate at least partially through a thickness thereof to form a plurality of edge surfaces extending away from a front surface thereof and forming a continuous monolithic metallic edge-reinforcement ring that covers each of the plurality of edge surfaces and extends onto the front surface. The front surface may have a plurality of contacts thereat and the substrate may embody a plurality of microelectronic elements.

    Abstract translation: 公开了制造边缘增强微电子元件的方法。 这些步骤包括至少部分地通过其厚度机械地切割衬底的切割通道，以形成远离其前表面延伸的多个边缘表面，并形成连续的整体金属边缘加强环，其覆盖多个边缘 表面并延伸到前表面。 前表面可以具有多个触点，并且衬底可以实现多个微电子元件。

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