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    TECHNIQUES FOR DIRECT ENCASEMENT OF CIRCUIT BOARD STRUCTURES
    62.
    发明申请
    TECHNIQUES FOR DIRECT ENCASEMENT OF CIRCUIT BOARD STRUCTURES 失效
    直接加强电路板结构的技术

    公开(公告)号：US20090035890A1

    公开(公告)日：2009-02-05

    申请号：US12123733

    申请日：2008-05-20

    Applicant: Louis H. Feinstein

    Inventor： Louis H. Feinstein

    IPC: B23P19/00

    CPC classification number: H05K3/284 ,  H05K2201/068 ,  H05K2201/0769 ,  H05K2201/09909 ,  H05K2201/10636 ,  H05K2201/10977 ,  H05K2203/0126 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49171 ,  Y10T29/49227 ,  Y10T29/52 ,  Y10T29/53087 ,  Y10T29/53174 ,  Y10T29/53178

    Abstract: A technique for processing an electronic apparatus (e.g., manufacturing an assembled circuit board, treating an assembled circuit board, etc.) involves applying encasement material to an area of the circuit board assembly while leaving at least a portion of the circuit board assembly exposed. The technique further involves causing the applied encasement material to harden (e.g., heating the encasement material in a curing oven, applying radiation, providing a chemical catalyst, etc.). Application and hardening of the encasement material may take place shortly after circuit board assembly (e.g., by automated equipment at a manufacturing facility in order to treat newly assembled boards) or at some later time in the field (e.g., by a technician servicing a legacy board).

    Abstract translation: 一种用于处理电子设备（例如，制造组装电路板，处理组装电路板等）的技术涉及将外壳材料施加到电路板组件的区域，同时使电路板组件的至少一部分露出。 该技术还包括使所施加的包装材料硬化（例如，在固化炉中加热包装材料，施加辐射，提供化学催化剂等）。 封装材料的应用和硬化可能在电路板组装之后不久（例如，通过制造设施处的自动化设备来处理新组装的板）或在现场的某个稍后的时间（例如，由维护遗留物的技术人员） 板）。

    Wired circuit board
    68.
    发明申请
    Wired circuit board 有权
    有线电路板

    公开(公告)号：US20060042823A1

    公开(公告)日：2006-03-02

    申请号：US11213901

    申请日：2005-08-30

    Applicant: Takashi Oda ,  Yasufumi Miyake ,  Tadao Ohkawa

    Inventor： Takashi Oda ,  Yasufumi Miyake ,  Tadao Ohkawa

    IPC: H05K1/00

    CPC classification number: H05K3/107 ,  H05K1/117 ,  H05K3/22 ,  H05K3/244 ,  H05K2201/0769 ,  H05K2203/0278 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

    Abstract: A wired circuit board which even when a conductive pattern is formed in the form of fine pitch can provide improved adhesion between the conductive pattern and an insulating layer to prevent a plating solution from remaining between a metal plating layer and the insulating layer, so as to prevent ionic impurities in the plating solution from remaining as residual or ionic contamination, whereby even when electric current flows through the circuit under a high temperature and high humidity environment over a long term, a short circuit from ionic migration can be prevented to suppress insulating failure. Lower end portions of terminal portions 5 formed on an insulating base layer 2 and lower end portions of side surfaces and metal plating layers 6 covering over the terminal portions 5 are embedded in the insulating base layer 2 in a flexible wired circuit board 1 at one longitudinal end portion thereof exposed from an insulating cover layer 4. This can provide the result of preventing infiltration of the plating solution in between the metal plating layers 6 and the insulating base layer 2 when the metal plating layer 6 is formed.

    Abstract translation: 即使导电图形以细间距的形式形成的布线电路板也能够提高导电图案与绝缘层之间的粘附性，防止电镀液残留在金属镀层与绝缘层之间， 防止电镀溶液中的离子杂质残留或残留或离子污染，由此即使长期在高温高湿环境下电流流过电路，也可以防止离子迁移的短路，从而抑制绝缘破坏 。 形成在绝缘基底层2上的端子部分5的下端部分和覆盖在端子部分5上的侧面的下端部分和金属电镀层6的下端部分在柔性布线电路板1的一个纵向上嵌入绝缘基底层2中 其端部从绝缘覆盖层4露出。 这可以提供当形成金属镀层6时防止电镀液浸入金属镀层6和绝缘基层2之间的结果。

    Porous power and ground planes for reduced PCB delamination and better reliability
    70.
    发明授权
    Porous power and ground planes for reduced PCB delamination and better reliability 失效
    多功能电源和接地平面可降低PCB分层和更好的可靠性

    公开(公告)号：US06944946B2

    公开(公告)日：2005-09-20

    申请号：US10430989

    申请日：2003-05-06

    Applicant: Robert M. Japp ,  Mark D. Poliks

    Inventor： Robert M. Japp ,  Mark D. Poliks

    IPC: H05K1/02 ,  H05K3/38 ,  H05K3/42 ,  H05K3/46 ,  H01K3/10

    CPC classification number: H05K3/38 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/0116 ,  H05K2201/0281 ,  H05K2201/029 ,  H05K2201/0769 ,  H05K2201/09309 ,  H05K2201/09681 ,  H05K2203/1131 ,  Y10S428/901 ,  Y10T29/49002 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1052 ,  Y10T428/24273 ,  Y10T428/24917

    Abstract: Power and ground planes that are used in Printed Circuit Boards (PCBs) and that comprise porous, conductive materials are disclosed. Using porous power and ground plane materials in PCBs allows liquids (e.g., water and/or other solvents) to pass through the power and ground planes, thus decreasing failures in PCBs (or PCBs used as laminate chip carriers) caused by cathodic/anodic filament growth and delamination of insulators. Porous conductive materials suitable for use in PCBs may be formed by using metal-coated organic cloths (such as polyester or liquid crystal polymers) or fabrics (such as those made from carbon/graphite or glass fibers), using metal wire mesh instead of metal sheets, using sintered metal, or making metal sheets porous by forming an array of holes in the metal sheets. Fabrics and mesh may be woven or random. If an array of holes is formed in a metal sheet, such an array may be formed with no additional processing steps than are performed using conventional PCB assembly methods.

    Abstract translation: 公开了在印刷电路板（PCB）中使用并且包含多孔导电材料的电源和接地层。 在PCB中使用多孔电源和接地平面材料可以使液体（例如水和/或其他溶剂）通过电源和接地层，从而减少由阴极/阳极细丝引起的PCB（或PCBs用作层压芯片载体）的故障 绝缘子的生长和分层。 适用于PCB的多孔导电材料可以通过使用金属涂布的有机布（例如聚酯或液晶聚合物）或织物（例如由碳/石墨或玻璃纤维制成的那些）形成，使用金属丝网代替金属 使用烧结金属，或者通过在金属板中形成孔阵列来制造多孔的金属片。 织物和网可以编织或随机。 如果在金属板中形成孔阵列，则可以形成这样的阵列，而不需要使用常规PCB组装方法执行的附加处理步骤。

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