公开(公告)号：US06841859B1

公开(公告)日：2005-01-11

申请号：US10800973

申请日：2004-03-16

申请人： Labeeb Sadak Thamby ,  Neil McLellan ,  Hugo Chi Wai Wong ,  William Lap Keung Chow

发明人： Labeeb Sadak Thamby ,  Neil McLellan ,  Hugo Chi Wai Wong ,  William Lap Keung Chow

IPC分类号： H01L23/10 ,  H01L23/24 ,  H01L23/495

CPC分类号： H01L23/49575 ,  H01L23/10 ,  H01L23/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A process for fabricating a cavity-type integrated circuit package. The process includes: supporting an interior portion of each of a plurality of leads, in a mold; supporting a die attach pad in said mold; molding a package body in said mold such that said leads extend from an interior cavity of said package body to an exterior thereof; mounting a semiconductor die to said die attach pad; wire bonding various ones of said leads to said semiconductor die; adding a fill material for covering at least a surface of said interior portion of said leads; and mounting a lid on said package body for enclosing said die in said cavity of said package body.

摘要翻译： 一种用于制造腔型集成电路封装的工艺。 该方法包括：在模具中支撑多个引线中的每一个的内部; 将模具附接垫支撑在所述模具中; 在所述模具中模制包装体，使得所述引线从所述包装体的内部空腔延伸到其外部; 将半导体管芯安装到所述管芯附接焊盘; 将所述引线中的各种引线接合到所述半导体管芯; 添加用于覆盖所述引线的所述内部的至少一个表面的填充材料; 以及将盖子安装在所述包装体上，用于将所述模具封闭在所述包装体的所述空腔中。

公开(公告)号：US06021046A

公开(公告)日：2000-02-01

申请号：US573600

申请日：1995-12-15

申请人： Neil McLellan ,  Mike Strittmatter

发明人： Neil McLellan ,  Mike Strittmatter

IPC分类号： H05K1/02 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36 ,  H05K5/02 ,  H05K7/20

CPC分类号： H05K3/341 ,  H05K5/0213 ,  H05K7/2039 ,  H05K1/0203 ,  H05K1/141 ,  H05K2201/066 ,  H05K2201/10946 ,  H05K2203/304 ,  H05K3/368 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49149

摘要： A thermal protection system that comprises an assembly of at least one electrical component and a heat shield surrounding the electrical component, wherein the heat shield forms a pocket between the electrical element and the heat shield and associated methods. The electrical element has at least one electrical lead. The system permits the electrical lead(s) to increase in temperature sufficient to permit soldering of the electrical lead(s) to a second electrical element. The thermal protection system also comprises a heat sink to protect the electrical element, which comprises a heat capacity material. The system also comprises electrical lead(s) with a low-cross sectional area.

摘要翻译： 一种热保护系统，其包括至少一个电气部件和围绕电气部件的热屏蔽的组件，其中，所述热屏蔽件在所述电气元件和所述热屏蔽件之间形成一个凹穴以及相关联的方法。 电气元件具有至少一个电引线。 该系统允许电引线增加足以允许电引线焊接到第二电气元件的温度。 热保护系统还包括用于保护电气元件的散热器，其包括热容材料。 该系统还包括具有低横截面面积的电引线。

公开(公告)号：US09607935B2

公开(公告)日：2017-03-28

申请号：US12427133

申请日：2009-04-21

申请人： Liane Martinez ,  Neil McLellan ,  Silqun Leung ,  Gabriel Wong

发明人： Liane Martinez ,  Neil McLellan ,  Silqun Leung ,  Gabriel Wong

IPC分类号： H05K7/00 ,  H01L23/498 ,  H01L23/50 ,  H05K1/02 ,  H05K1/14 ,  H05K3/34

CPC分类号： H01L23/49816 ,  H01L23/50 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05169 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/0562 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01019 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K1/0231 ,  H05K1/145 ,  H05K3/3442 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2924/00014

摘要： Various semiconductor chip packages with undermounted passive devices and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip to a first side of a carrier substrate where the carrier substrate includes a second side opposite the first side. At least one passive device is coupled to the second side of the carrier substrate. The at least one passive device includes at least one first terminal electrically coupled to the semiconductor chip and at least one second terminal adapted to couple to a printed circuit board.

公开(公告)号：US08647974B2

公开(公告)日：2014-02-11

申请号：US13072554

申请日：2011-03-25

申请人： Roden R. Topacio ,  Michael Z. Su ,  Neil McLellan

发明人： Roden R. Topacio ,  Michael Z. Su ,  Neil McLellan

IPC分类号： H01L21/44 ,  H01L23/48

CPC分类号： H01L24/05 ,  H01L23/3192 ,  H01L23/562 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/02233 ,  H01L2224/02235 ,  H01L2224/02255 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/1146 ,  H01L2224/13111 ,  H01L2224/73204 ,  H01L2924/01322 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/01029

摘要： Various semiconductor chip input/output structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor chip that has a first conductor pad and a passivation structure. A second conductor pad is fabricated around but not in physical contact with the first conductor pad to leave a gap. The second conductor pad is adapted to protect a portion of the passivation structure.

摘要翻译： 公开了各种半导体芯片输入/输出结构及其制造方法。 一方面，提供一种制造方法，其包括提供具有第一导体焊盘和钝化结构的半导体芯片。 围绕第二导体焊盘制造第二导体焊盘而不与第一导体焊盘物理接触以留下间隙。 第二导体焊盘适于保护钝化结构的一部分。

公开(公告)号：US08314474B2

公开(公告)日：2012-11-20

申请号：US12180042

申请日：2008-07-25

申请人： Neil McLellan ,  Fei Guo ,  Daniel Chung ,  Terence Cheung

发明人： Neil McLellan ,  Fei Guo ,  Daniel Chung ,  Terence Cheung

IPC分类号： H01L29/00 ,  H01L21/20

CPC分类号： H01L23/5223 ,  H01G4/008 ,  H01G4/01 ,  H01G4/33 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3192 ,  H01L23/642 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0657 ,  H01L2224/02375 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/05093 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05576 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/1133 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/14133 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/00012 ,  H01L2924/00014

摘要： Various on-chip capacitors and methods of making the same are disclosed. In one aspect, a method of manufacturing a capacitor is provided that includes forming a first conductor structure on a semiconductor chip and forming a passivation structure on the first conductor structure. An under bump metallization structure is formed on the passivation structure. The under bump metallization structure overlaps at least a portion of the first conductor structure to provide a capacitor.

摘要翻译： 公开了各种片上电容器及其制造方法。 一方面，提供一种制造电容器的方法，包括在半导体芯片上形成第一导体结构，并在第一导体结构上形成钝化结构。 在钝化结构上形成凹凸金属化结构。 凸起下金属化结构与第一导体结构的至少一部分重叠以提供电容器。

公开(公告)号：US08294266B2

公开(公告)日：2012-10-23

申请号：US13027076

申请日：2011-02-14

申请人： Roden R. Topacio ,  Neil McLellan ,  Yip Seng Low ,  Andrew K W Leung

发明人： Roden R. Topacio ,  Neil McLellan ,  Yip Seng Low ,  Andrew K W Leung

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L24/11 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/10126 ,  H01L2224/1132 ,  H01L2224/1147 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/1411 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01059 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00

摘要： Various semiconductor die conductor structures and methods of fabricating the same are provided. In one aspect, a method of manufacturing is provided that includes forming a conductor structure on a conductor pad of a semiconductor die. The conductor layer has a surface. A polymeric layer is formed on the surface of the conductor layer while a portion of the surface is left exposed. A solder structure is formed on the exposed portion of the surface and a portion of the polymeric layer.

摘要翻译： 提供各种半导体管芯导体结构及其制造方法。 一方面，提供一种制造方法，其包括在半导体管芯的导体焊盘上形成导体结构。 导体层具有表面。 在导体层的表面上形成聚合物层，同时使表面的一部分露出。 在表面的暴露部分和聚合物层的一部分上形成焊料结构。

公开(公告)号：US20120012987A1

公开(公告)日：2012-01-19

申请号：US13247145

申请日：2011-09-28

申请人： Roden R. Topacio ,  Neil McLellan

发明人： Roden R. Topacio ,  Neil McLellan

IPC分类号： H01L21/311 ,  H01L29/06 ,  H01L21/28

CPC分类号： H01L23/49811 ,  H01L21/563 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/1132 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00 ,  H01L2224/05552

摘要： Various semiconductor chips and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first opening in an insulating layer applied to a side of a semiconductor chip. The first opening does not extend through to the side. A second opening is formed in the insulating layer that exposes a portion of the side.

摘要翻译： 公开了各种半导体芯片及其制造方法。 一方面，提供一种制造方法，其包括在施加到半导体芯片侧的绝缘层中形成第一开口。 第一个开口没有延伸到侧面。 在暴露一部分侧面的绝缘层中形成第二开口。

公开(公告)号：US07994044B2

公开(公告)日：2011-08-09

申请号：US12553336

申请日：2009-09-03

申请人： Roden R. Topacio ,  Neil McLellan

发明人： Roden R. Topacio ,  Neil McLellan

IPC分类号： H01L21/44 ,  H01L23/12

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05599 ,  H01L2224/13012 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00012 ,  H01L2924/00

摘要： Methods and apparatus to inhibit cracks and delaminations in a semiconductor chip solder bump are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first dielectric layer over a first conductor structure of a semiconductor chip and forming a first opening in the first dielectric layer to expose at least a portion of the conductor structure. The first opening defines an interior wall that includes plural protrusions. A solder structure is coupled to the first conductor structure such that a portion of the solder structure is positioned in the first opening.

摘要翻译： 公开了抑制半导体芯片焊料凸块中的裂纹和分层的方法和装置。 一方面，提供了一种制造方法，其包括在半导体芯片的第一导体结构上方形成第一电介质层，并在第一电介质层中形成第一开口以露出至少一部分导体结构。 第一开口限定包括多个突起的内壁。 焊料结构耦合到第一导体结构，使得焊料结构的一部分位于第一开口中。

公开(公告)号：US07906424B2

公开(公告)日：2011-03-15

申请号：US11832486

申请日：2007-08-01

申请人： Roden R. Topacio ,  Neil McLellan ,  Yip Seng Low ,  Andrew K W Leung

发明人： Roden R. Topacio ,  Neil McLellan ,  Yip Seng Low ,  Andrew K W Leung

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L24/11 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/10126 ,  H01L2224/1132 ,  H01L2224/1147 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/1411 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01059 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00

摘要： Various semiconductor die conductor structures and methods of fabricating the same are provided. In one aspect, a method of manufacturing is provided that includes forming a conductor structure on a conductor pad of a semiconductor die. The conductor layer has a surface. A polymeric layer is formed on the surface of the conductor layer while a portion of the surface is left exposed. A solder structure is formed on the exposed portion of the surface and a portion of the polymeric layer.

摘要翻译： 提供各种半导体管芯导体结构及其制造方法。 一方面，提供一种制造方法，其包括在半导体管芯的导体焊盘上形成导体结构。 导体层具有表面。 在导体层的表面上形成聚合物层，同时使表面的一部分露出。 在表面的暴露部分和聚合物层的一部分上形成焊料结构。

公开(公告)号：US20100320599A1

公开(公告)日：2010-12-23

申请号：US12868339

申请日：2010-08-25

申请人： Vincent Chan ,  Neil McLellan ,  Kevin O'Neil

发明人： Vincent Chan ,  Neil McLellan ,  Kevin O'Neil

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05571 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/16145 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/30107 ,  H01L2924/00014

摘要： Various stacked semiconductor devices and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a first semiconductor die that has a first bulk semiconductor side and a first opposite side. A second semiconductor die is provided that has a second bulk semiconductor side and a second opposite side. The second opposite side of the second semiconductor die is coupled to the first opposite side of the first semiconductor die. Electrical connections are formed between the first semiconductor die and the second semiconductor die.

摘要翻译： 提供各种叠层半导体器件及其制造方法。 一方面，提供一种制造方法，其包括提供具有第一体半导体侧和第一相对侧的第一半导体管芯。 提供了具有第二体半导体侧和第二相对侧的第二半导体管芯。 第二半导体管芯的第二相对侧耦合到第一半导体管芯的第一相对侧。 在第一半导体管芯和第二半导体管芯之间形成电连接。