公开(公告)号：US20160126214A1

公开(公告)日：2016-05-05

申请号：US14526518

申请日：2014-10-29

申请人： Xiaotian Zhang ,  Jun Lu ,  Kai Liu

发明人： Xiaotian Zhang ,  Jun Lu ,  Kai Liu

IPC分类号： H01L23/00

CPC分类号： H01L24/83 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/2732 ,  H01L2224/27848 ,  H01L2224/29012 ,  H01L2224/29013 ,  H01L2224/29015 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32013 ,  H01L2224/32014 ,  H01L2224/32055 ,  H01L2224/32245 ,  H01L2224/40499 ,  H01L2224/45144 ,  H01L2224/48106 ,  H01L2224/48108 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83048 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/84203 ,  H01L2224/84862 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/06 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

摘要： This invention discloses a semiconductor package with adhesive material pre-printed on the lead frame and chip, and the manufacturing method. The adhesive material is applied onto the chip carrier and the pin of the lead frame and also on the front electrode of the semiconductor chip via pre-printing. The back of the semiconductor chip is adhered on the chip carrier, and the front electrode of the semiconductor chip and the pin are connected respectively with a metal connector. The size, shape and thickness of the adhesive material are applied according to different application requirements according to size and shapes of the contact zone of the semiconductor chip and the metal connector. Particularly, the adhesive zones are formed by pre-printing the adhesive material thus significantly enhance the quality and performance of semiconductor products, and improves the productivity.

摘要翻译： 本发明公开了一种半导体封装，其具有预先印刷在引线框架和芯片上的粘合剂材料及其制造方法。 粘合剂材料通过预打印被施加到芯片载体和引线框架的引脚以及半导体芯片的前电极上。 半导体芯片的背面粘附在芯片载体上，并且半导体芯片的前电极和引脚分别与金属连接器连接。 根据不同的应用要求，根据半导体芯片和金属连接器的接触区域的尺寸和形状来施加粘合材料的尺寸，形状和厚度。 特别地，通过预先印刷粘合剂材料形成粘合剂区域，从而显着提高半导体产品的质量和性能，并提高生产率。

公开(公告)号：US09184117B2

公开(公告)日：2015-11-10

申请号：US13663694

申请日：2012-10-30

申请人： Yueh-Se Ho ,  Yan Xun Xue ,  Hamza Yilmaz ,  Jun Lu

发明人： Yueh-Se Ho ,  Yan Xun Xue ,  Hamza Yilmaz ,  Jun Lu

IPC分类号： H01L29/40 ,  H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/683

CPC分类号： H01L23/4952 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/49562 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/81 ,  H01L24/83 ,  H01L24/84 ,  H01L2221/68327 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/136 ,  H01L2224/13794 ,  H01L2224/13839 ,  H01L2224/1403 ,  H01L2224/16245 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/371 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40248 ,  H01L2224/40499 ,  H01L2224/405 ,  H01L2224/73253 ,  H01L2224/73255 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/8185 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2224/84385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/92225 ,  H01L2224/92226 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01082 ,  H01L2924/07811 ,  H01L2924/00012

摘要： The invention relates to a power semiconductor device and a preparation method, particularly relates to preparation of stacked dual-chip packaging structure of MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) using flip chip technology with two interconnecting plates. The first chip is flipped and attached on the base such that the first chip is overlapped with the third pin; the back metal layer of the first chip is connected to the bonding strip of the first pin through a first interconnecting plate; the second chip is flipped and attached on a main plate portion of the first interconnecting plate such that the second chip is overlapped with the fourth pin; and the back metal layer of the second chip is connected to the bonding strip of the second pin through the second interconnecting plate.

摘要翻译： 本发明涉及一种功率半导体器件及其制备方法，特别涉及使用具有两个互连板的倒装芯片技术来制备MOSFET（金属氧化物半导体场效应晶体管）的层叠双芯片封装结构。 第一芯片被翻转并附接在基座上，使得第一芯片与第三引脚重叠; 第一芯片的背金属层通过第一互连板连接到第一引脚的接合条; 第二芯片被翻转并附接在第一互连板的主板部分上，使得第二芯片与第四引脚重叠; 并且第二芯片的背金属层通过第二互连板连接到第二引脚的接合条。

公开(公告)号：US09084888B2

公开(公告)日：2015-07-21

申请号：US13294038

申请日：2011-11-10

申请人： Per Rugaard Poulsen ,  Walther Fledelius ,  Paul Keall ,  Elisabeth Weiss ,  Jun Lu ,  Emily Brackbill ,  Geoffrey Hugo

发明人： Per Rugaard Poulsen ,  Walther Fledelius ,  Paul Keall ,  Elisabeth Weiss ,  Jun Lu ,  Emily Brackbill ,  Geoffrey Hugo

IPC分类号： G06K9/00 ,  A61N5/10 ,  G06T17/00

CPC分类号： G06T11/008 ,  A61N5/1049 ,  A61N2005/1061 ,  G06T17/00 ,  G06T2210/41

摘要： A method of determining a model of a marker includes obtaining projection images, each of the projection images having an image of a marker that indicates a shape of the marker, determining binary images of the marker for respective ones of the projection images, and constructing a three-dimensional model of the marker using the binary images, the three-dimensional model comprising a set of voxels in a three-dimensional space that collectively indicates a three-dimensional shape of the marker, wherein the act of constructing the three-dimensional model is performed using a processing unit.

摘要翻译： 确定标记的模型的方法包括获得投影图像，每个投影图像具有指示标记的形状的标记的图像，确定各个投影图像的标记的二值图像，并且构建一个 使用二值图像的标记的三维模型，三维模型包括三维空间中的一组体素，其共同表示标记的三维形状，其中构建三维模型的动作 使用处理单元执行。

公开(公告)号：US09054091B2

公开(公告)日：2015-06-09

申请号：US13913770

申请日：2013-06-10

申请人： Hamza Yilmaz ,  Yan Xun Xue ,  Jun Lu ,  Peter Wilson ,  Yan Huo ,  Zhiqiang Niu ,  Ming-Chen Lu

发明人： Hamza Yilmaz ,  Yan Xun Xue ,  Jun Lu ,  Peter Wilson ,  Yan Huo ,  Zhiqiang Niu ,  Ming-Chen Lu

IPC分类号： H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L23/02 ,  H01L23/34 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

CPC分类号： H01L23/49568 ,  H01L21/4825 ,  H01L21/561 ,  H01L21/565 ,  H01L21/768 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49555 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/544 ,  H01L24/40 ,  H01L24/41 ,  H01L24/83 ,  H01L25/0655 ,  H01L25/50 ,  H01L2223/5446 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/06181 ,  H01L2224/32245 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/40245 ,  H01L2224/4103 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/73104 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/84801 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/27 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A hybrid packaging multi-chip semiconductor device comprises a lead frame unit, a first semiconductor chip, a second semiconductor chip, a first interconnecting structure and a second interconnecting structure, wherein the first semiconductor chip is attached on a first die paddle and the second semiconductor chip is flipped and attached on a third pin and a second die paddle, the first interconnecting structure electrically connecting a first electrode at a front surface of the first semiconductor chip and a third electrode at a back surface of the second semiconductor chip and a second electrode at the front surface of the first semiconductor chip is electrically connected by second interconnecting structure.

摘要翻译： 一种混合封装多芯片半导体器件，包括引线框单元，第一半导体芯片，第二半导体芯片，第一互连结构和第二互连结构，其中第一半导体芯片附接在第一裸片上，第二半导体 芯片被翻转并附接在第三引脚和第二管芯焊盘上，第一互连结构电连接第一半导体芯片的前表面处的第一电极和第二半导体芯片的后表面处的第三电极和第二电极 在第一半导体芯片的前表面通过第二互连结构电连接。

公开(公告)号：US20150021780A1

公开(公告)日：2015-01-22

申请号：US13946949

申请日：2013-07-19

申请人： Yuping Gong ,  Yan Xun Xue ,  Ming-Chen Lu ,  Ping Huang ,  Jun Lu ,  Hamza Yilmaz

发明人： Yuping Gong ,  Yan Xun Xue ,  Ming-Chen Lu ,  Ping Huang ,  Jun Lu ,  Hamza Yilmaz

IPC分类号： H01L23/13 ,  H01L23/00

CPC分类号： H05K3/306 ,  H01L23/13 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49844 ,  H01L23/49861 ,  H01L24/06 ,  H01L24/24 ,  H01L24/25 ,  H01L24/29 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/82 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/89 ,  H01L24/92 ,  H01L2224/04042 ,  H01L2224/0603 ,  H01L2224/24101 ,  H01L2224/24147 ,  H01L2224/29101 ,  H01L2224/32225 ,  H01L2224/371 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/40245 ,  H01L2224/4103 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/73267 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/85 ,  H01L2224/92224 ,  H01L2924/00014 ,  H01L2924/0781 ,  H01L2924/13091 ,  H01L2924/15153 ,  H05K3/32 ,  H05K3/4697 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49165 ,  Y10T29/49169 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/8384 ,  H01L2224/8485 ,  H01L2224/8385

摘要： A thin power device comprises a substrate having a first set of first contact pads at a front surface of the substrate electrically connecting to a second set of second contact pads at a back surface of the substrate, a through opening opened from the front surface and through the substrate exposing a third contact pad at the back surface of the substrate, a semiconductor chip embedded into the through opening with a back metal layer at a back surface of the semiconductor chip attached on the third contact pad, and a plurality of conductive structures electrically connecting electrodes at a front surface of the semiconductor chip with the corresponding first contact pads in the first sets of first contact pads.

摘要翻译： 薄功率器件包括衬底，衬底在衬底的前表面处具有第一组第一接触焊盘，电连接到衬底的背面处的第二组第二接触焊盘，从前表面开口并穿过 所述基板在所述基板的背面暴露第三接触焊盘，在所述第三接触焊盘的所述半导体芯片的后表面处嵌入所述通孔中的背面金属层的半导体芯片，以及多个导电结构， 将所述半导体芯片的前表面处的电极与所述第一组第一接触焊盘中的对应的第一接触焊盘连接。

公开(公告)号：US08933550B2

公开(公告)日：2015-01-13

申请号：US13442757

申请日：2012-04-09

申请人： Yan Xun Xue ,  Anup Bhalla ,  Jun Lu

发明人： Yan Xun Xue ,  Anup Bhalla ,  Jun Lu

IPC分类号： H01L23/22 ,  H01L29/40 ,  H01L23/495 ,  H01L23/00

CPC分类号： H01L23/49575 ,  H01L23/49562 ,  H01L23/49589 ,  H01L24/37 ,  H01L24/39 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/40245 ,  H01L2224/45014 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49177 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/84

摘要： A semiconductor package for power converter application comprises a low-side MOSFET chip and a high-side MOSFET chip stacking one over the other. The semiconductor package may further enclose a capacitor whereas the capacitor may be a discrete component or an integrated component on chip level with the low-side MOSFET. The semiconductor package may further comprise a PIC chip to provide a complete power converter on semiconductor chip assembly package level.

摘要翻译： 用于功率转换器应用的半导体封装包括低边MOSFET芯片和高边MOSFET芯片。 半导体封装可以进一步包围电容器，而电容器可以是分立元件或芯片级与低边MOSFET的集成元件。 半导体封装还可以包括PIC芯片，以在半导体芯片组件封装级别上提供完整的功率转换器。

公开(公告)号：US08782064B2

公开(公告)日：2014-07-15

申请号：US13538290

申请日：2012-06-29

申请人： Rajiv Kottomtharayil ,  Parag Gokhale ,  Jun Lu

发明人： Rajiv Kottomtharayil ,  Parag Gokhale ,  Jun Lu

IPC分类号： G06F17/30

CPC分类号： G06F17/30094 ,  G06F11/1448 ,  G06F11/1453 ,  Y10S707/99934 ,  Y10S707/99955

摘要： A method in a computer system for retrieving data from one of multiple copies of the data is provided, referred to as the data management system. The data management system receives a request identifying a data object to be accessed. Then, the data management system queries a metabase to locate data copies that contain the identified data object, wherein the data copies are created from similar source data, and wherein for each data copy the metabase contains an indication of the availability of the copy relative to other copies. Next, the data management system determines one of the located data copies to use to access the identified data object, wherein the determination is made based on the indicated availability contained in the metabase for each of the located data copies. Then, the data management system accesses the identified data object using the determined one of the located data copies.

摘要翻译： 提供了一种用于从数据的多个副本之一检索数据的计算机系统中的方法，称为数据管理系统。 数据管理系统接收标识要访问的数据对象的请求。 然后，数据管理系统查询元数据库以定位包含所识别的数据对象的数据副本，其中从相似的源数据创建数据副本，并且其中对于每个数据拷贝，元数据库包含相对于 其他副本。 接下来，数据管理系统确定用于访问所识别的数据对象的所定位的数据副本之一，其中基于针对每个所定位的数据副本的元数据库中包含的指示的可用性进行确定。 然后，数据管理系统使用所确定的一个定位的数据副本来访问所识别的数据对象。

公开(公告)号：US20140191334A1

公开(公告)日：2014-07-10

申请号：US13734201

申请日：2013-01-04

申请人： Yan Xun Xue ,  Yueh-Se Ho ,  Lei Shi ,  Jun Lu ,  Liang Zhao

发明人： Yan Xun Xue ,  Yueh-Se Ho ,  Lei Shi ,  Jun Lu ,  Liang Zhao

IPC分类号： H01L23/495 ,  H01L27/088

CPC分类号： H01L23/49575 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49562 ,  H01L24/34 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L27/088 ,  H01L2224/37011 ,  H01L2224/371 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/01322 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stacked power semiconductor device includes vertical metal oxide semiconductor field-effect transistors and dual lead frames packaged with flip-chip technology. In the method of manufacturing the stacked power semiconductor device, a first semiconductor chip is flip chip mounted on the first lead frame. A mounting clips is connected to the electrode at back side of the first semiconductor chip. A second semiconductor chip is mounted on the second lead frame, which is then flipped and stacked on the mounting clip.

摘要翻译： 叠层功率半导体器件包括垂直金属氧化物半导体场效应晶体管和采用倒装芯片技术封装的双引线框架。 在制造堆叠式功率半导体器件的方法中，第一半导体芯片是安装在第一引线框上的倒装芯片。 安装夹在第一半导体芯片的背面连接到电极。 第二半导体芯片安装在第二引线框架上，然后翻转并堆叠在安装夹上。

公开(公告)号：US08722466B2

公开(公告)日：2014-05-13

申请号：US12722528

申请日：2010-03-12

申请人： Jun Lu ,  Kai Liu ,  Yan Xun Xue

发明人： Jun Lu ,  Kai Liu ,  Yan Xun Xue

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/565 ,  H01L23/3107 ,  H01L23/49517 ,  H01L23/49524 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/34 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L25/07 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/37147 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package with connecting plate for internal connection comprise: a plurality of chips each having a plurality of contact areas on a top surface; one or more connecting plates having a plurality of electrically isolated connecting plate portions each connecting a contact area of the semiconductor chips. The method of making the semiconductor package includes the steps of connecting one or more connecting plates to a plurality of semiconductor chips, applying a molding material to encapsulate the chips and the connecting plates, separating a plurality of connecting plate portions of the connecting plates by shallow cutting through or by grinding.

摘要翻译： 具有用于内部连接的连接板的半导体封装包括：多个芯片，每个芯片在顶表面上具有多个接触区域; 一个或多个连接板具有多个电隔离的连接板部分，每个连接板部分连接半导体芯片的接触区域。 制造半导体封装的方法包括将一个或多个连接板连接到多个半导体芯片的步骤，施加模制材料以封装芯片和连接板，将连接板的多个连接板部分分开浅 切割或磨削。

公开(公告)号：US20140114089A1

公开(公告)日：2014-04-24

申请号：US14055054

申请日：2013-10-16

申请人： Weitong DONG ,  Christian Wolfgang Hemp ,  Xiangle Jin ,  Jun Lu ,  Ulrich Scholz ,  Shengmin Su ,  Wei Xu ,  Jinsong Yang

发明人： Weitong DONG ,  Christian Wolfgang Hemp ,  Xiangle Jin ,  Jun Lu ,  Ulrich Scholz ,  Shengmin Su ,  Wei Xu ,  Jinsong Yang

IPC分类号： C07C249/02

CPC分类号： C07C213/00 ,  C07C217/76 ,  C07C249/02 ,  C07C257/08 ,  C07C257/18

摘要： The present invention relates to a process for the preparation of 4-aminobenzoamidine (4-AMBA) salts of general formula (I) preferably the salts thereof with hydrochloric or hydrobromic acid, particularly preferred the dichloride salt.

摘要翻译： 本发明涉及制备通式（I）的4-氨基苯甲脒（4-AMBA）盐的方法，优选其盐与盐酸或氢溴酸，特别优选二氯化物盐。