公开(公告)号：US07799671B1

公开(公告)日：2010-09-21

申请号：US12630457

申请日：2009-12-03

申请人： Ananda Banerji ,  George Andrew Antonelli ,  Jennifer O'Ioughlin ,  Mandyam Sriram ,  Bart van Schravendijk ,  Seshasayee Varadarajan

发明人： Ananda Banerji ,  George Andrew Antonelli ,  Jennifer O'Ioughlin ,  Mandyam Sriram ,  Bart van Schravendijk ,  Seshasayee Varadarajan

IPC分类号： H01L21/44

CPC分类号： H01L21/02074 ,  C23C16/0227 ,  C23C16/0272 ,  C23C16/36 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76883 ,  H01L21/76886 ,  H01L21/76888 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： Protective caps residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Protective caps are formed by depositing a source layer of dopant-generating material (e.g., material generating B, Al, Ti, etc.) over an exposed copper line, converting the upper portion of the source layer to a passivated layer (e.g., nitride or oxide) while allowing an unmodified portion of a dopant-generating source layer to remain in contact with copper, and, subsequently, allowing the dopant from the unmodified portion of source layer to controllably diffuse into and/or react with copper, thereby forming a thin protective cap within copper line. The cap may contain a solid solution or an alloy of copper with the dopant.

摘要翻译： 使用驻留在金属线和电介质扩散阻挡层（或蚀刻停止）层之间的界面处的保护盖来改善互连的电迁移性能。 通过在暴露的铜线上沉积产生掺杂剂的材料的源层（例如，产生B，Al，Ti等的材料）形成保护盖，将源极的上部转化为钝化层（例如，氮化物 或氧化物），同时允许掺杂剂发生源层的未修饰部分与铜保持接触，并且随后允许来自源层的未修饰部分的掺杂剂可控地扩散到铜中和/或与铜反应，从而形成 铜线内薄保护帽。 盖可以包含铜与掺杂剂的固溶体或合金。

公开(公告)号：US07858510B1

公开(公告)日：2010-12-28

申请号：US12689803

申请日：2010-01-19

申请人： Ananda Banerji ,  George Andrew Antonelli ,  Jennifer O'loughlin ,  Mandyam Sriram ,  Bart van Schravendijk ,  Seshasayee Varadarajan

发明人： Ananda Banerji ,  George Andrew Antonelli ,  Jennifer O'loughlin ,  Mandyam Sriram ,  Bart van Schravendijk ,  Seshasayee Varadarajan

IPC分类号： H01L21/44 ,  B05D5/12

CPC分类号： C23C16/0227 ,  C23C16/0272 ,  C23C16/36 ,  H01L21/02074 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76883 ,  H01L21/76886 ,  H01L21/76888 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： Protective caps residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Protective caps are formed by depositing a first layer of aluminum-containing material over an exposed copper line by treating an oxide-free copper surface with an organoaluminum compound in an absence of plasma at a substrate temperature of at least about 350° C. The formed aluminum-containing layer is passivated either partially or completely in a chemical conversion which forms Al—N, Al—O or both Al—O and Al—N bonds in the layer. Passivation is performed in some embodiments by contacting the substrate having an exposed first layer with an oxygen-containing reactant and/or nitrogen-containing reactant in the absence of plasma. Protective caps can be formed on substrates comprising exposed ULK dielectric. The aluminum-containing layer residing on the dielectric portion will typically spontaneously form non-conductive layer comprising Al—O bonds.

摘要翻译： 使用驻留在金属线和电介质扩散阻挡层（或蚀刻停止）层之间的界面处的保护盖来改善互连的电迁移性能。 通过在不存在等离子体的条件下，在至少约350℃的衬底温度下，通过用有机铝化合物处理无氧化物的铜表面，在暴露的铜线上沉积第一层含铝材料形成保护帽。形成 含铝层在化学转化中被部分或完全钝化，该化学转化在层中形成Al-N，Al-O或Al-O和Al-N键。 在一些实施方案中，通过在不存在等离子体的情况下将具有暴露的第一层的衬底与含氧反应物和/或含氮反应物接触来进行钝化。 可以在包括暴露的ULK电介质的基板上形成保护盖。 驻留在电介质部分上的含铝层通常会自发形成包含Al-O键的非导电层。

公开(公告)号：US08217513B2

公开(公告)日：2012-07-10

申请号：US13019854

申请日：2011-02-02

申请人： George Andrew Antonelli ,  Jennifer O'Loughlin ,  Tony Xavier ,  Mandyam Sriram ,  Bart van Schravendijk ,  Vishwanathan Rangarajan ,  Seshasayee Varadarajan ,  Bryan L. Buckalew

发明人： George Andrew Antonelli ,  Jennifer O'Loughlin ,  Tony Xavier ,  Mandyam Sriram ,  Bart van Schravendijk ,  Vishwanathan Rangarajan ,  Seshasayee Varadarajan ,  Bryan L. Buckalew

IPC分类号： H01L23/34

CPC分类号： H01L21/02068 ,  C23C16/0245 ,  C23C16/54 ,  C23C16/56 ,  H01L21/0206 ,  H01L21/02074 ,  H01L21/02315 ,  H01L21/3105 ,  H01L21/67201 ,  H01L21/76826 ,  H01L21/76862 ,  H01L21/76883 ,  H01L2924/0002 ,  H01L2924/00

摘要： Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus includes a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, a remote plasma source configured to provide a remote plasma to the load lock, and an ion filter disposed between the remote plasma source and the wafer pedestal.

摘要翻译： 本文公开了通过远程等离子体处理在半导体晶片制造工艺中清洁界面的实施例。 例如，在一个所公开的实施例中，半导体处理装置包括处理室，经由传送端口与处理室耦合的负载锁定，设置在负载锁中并被配置为支撑加载锁中的晶片的晶片基座， 远程等离子体源，被配置为将远程等离子体提供给负载锁定;以及离子过滤器，其布置在远程等离子体源和晶片基座之间。

公开(公告)号：US20100317198A1

公开(公告)日：2010-12-16

申请号：US12533960

申请日：2009-07-31

申请人： George Andrew Antonelli ,  Jennifer O' Loughlin ,  Tony Xavier ,  Mandyam Sriram ,  Bart van Schravendijk ,  Vishwanathan Rangarajan ,  Seshasayee Varadarajan ,  Bryan L. Buckalew

发明人： George Andrew Antonelli ,  Jennifer O' Loughlin ,  Tony Xavier ,  Mandyam Sriram ,  Bart van Schravendijk ,  Vishwanathan Rangarajan ,  Seshasayee Varadarajan ,  Bryan L. Buckalew

IPC分类号： H01L21/465 ,  C23C16/50

CPC分类号： H01L21/02074 ,  C23C16/0245 ,  C23C16/54 ,  H01L21/0206 ,  H01L21/28185 ,  H01L21/3105 ,  H01L21/67201 ,  H01L21/76814 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76886 ,  H01L28/60

摘要： Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus comprises a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, and a remote plasma source configured to provide a remote plasma to the load lock.

摘要翻译： 本文公开了通过远程等离子体处理在半导体晶片制造工艺中清洁界面的实施例。 例如，在一个所公开的实施例中，半导体处理装置包括处理室，经由传送端口耦合到处理室的负载锁定，设置在负载锁中并被配置为支撑加载锁中的晶片的晶片基座，以及 远程等离子体源，被配置为向负载锁提供远程等离子体。

公开(公告)号：US08247332B2

公开(公告)日：2012-08-21

申请号：US12631691

申请日：2009-12-04

申请人： Vishwanathan Rangarajan ,  George Andrew Antonelli ,  Ananda Banerji ,  Bart van Schravendijk

发明人： Vishwanathan Rangarajan ,  George Andrew Antonelli ,  Ananda Banerji ,  Bart van Schravendijk

IPC分类号： H01L21/311 ,  H01L21/461 ,  H01L21/469

CPC分类号： H01L21/02274 ,  C23C16/30 ,  C23C16/325 ,  C23C16/34 ,  C23C16/505 ,  C23C16/56 ,  H01J37/32091 ,  H01J37/32165 ,  H01L21/02112 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/0332 ,  H01L21/31144 ,  H01L21/3148 ,  H01L21/318 ,  H01L21/32139 ,  H01L21/67017 ,  H01L21/76813 ,  Y10S438/932 ,  Y10S438/942

摘要： Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about −600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of SixByCz, SixByNz, SixByCzNw, BxCy, and BxNy. In some embodiments, a hardmask film includes a germanium-rich GeNx material comprising at least about 60 atomic % of germanium. These hardmasks can be used in a number of back-end and front-end processing schemes in integrated circuit fabrication.

公开(公告)号：US20110135557A1

公开(公告)日：2011-06-09

申请号：US12631691

申请日：2009-12-04

申请人： Vishwanathan Rangarajan ,  George Andrew Antonelli ,  Ananda Banerji ,  Bart van Schravendijk

发明人： Vishwanathan Rangarajan ,  George Andrew Antonelli ,  Ananda Banerji ,  Bart van Schravendijk

IPC分类号： H01L21/31 ,  C01B31/36

CPC分类号： H01L21/02274 ,  C23C16/30 ,  C23C16/325 ,  C23C16/34 ,  C23C16/505 ,  C23C16/56 ,  H01J37/32091 ,  H01J37/32165 ,  H01L21/02112 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/0332 ,  H01L21/31144 ,  H01L21/3148 ,  H01L21/318 ,  H01L21/32139 ,  H01L21/67017 ,  H01L21/76813 ,  Y10S438/932 ,  Y10S438/942

摘要： Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about −600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of SixByCz, SixByNz, SixByCzNw, BxCy, and BxNy. In some embodiments, a hardmask film includes a germanium-rich GeNx material comprising at least about 60 atomic % of germanium. These hardmasks can be used in a number of back-end and front-end processing schemes in integrated circuit fabrication.

公开(公告)号：US08741394B2

公开(公告)日：2014-06-03

申请号：US12970846

申请日：2010-12-16

申请人： Jason Haverkamp ,  Pramod Subramonium ,  Joe Womack ,  Dong Niu ,  Keith Fox ,  John Alexy ,  Patrick Breiling ,  Jennifer O'Loughlin ,  Mandyam Sriram ,  George Andrew Antonelli ,  Bart van Schravendijk

发明人： Jason Haverkamp ,  Pramod Subramonium ,  Joe Womack ,  Dong Niu ,  Keith Fox ,  John Alexy ,  Patrick Breiling ,  Jennifer O'Loughlin ,  Mandyam Sriram ,  George Andrew Antonelli ,  Bart van Schravendijk

IPC分类号： H05H1/24

CPC分类号： C23C16/50 ,  C23C16/24 ,  C23C16/345 ,  C23C16/402 ,  C23C16/4401 ,  C23C16/45512 ,  C23C16/45523 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/509 ,  C23C16/52 ,  C23C16/54 ,  H01L21/02123 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/6719 ,  H01L21/67201 ,  H01L21/67207

摘要： Methods for depositing film stacks by plasma enhanced chemical vapor deposition are described. In one example, a method for depositing a film stack on a substrate, wherein the film stack includes films of different compositions and the deposition is performed in a process station in-situ, is provided. The method includes, in a first plasma-activated film deposition phase, depositing a first layer of film having a first film composition on the substrate; in a second plasma-activated deposition phase, depositing a second layer of film having a second film composition on the first layer of film; and sustaining the plasma while transitioning a composition of the plasma from the first plasma-activated film deposition phase to the second plasma-activated film deposition phase.

摘要翻译： 描述了通过等离子体增强化学气相沉积沉积膜堆叠的方法。 在一个实例中，提供了一种用于在基底上沉积薄膜叠层的方法，其中薄膜叠层包括不同组成的薄膜，并且沉淀是在原位进行的。 该方法包括在第一等离子体活化膜沉积阶段中，在衬底上沉积具有第一膜组成的第一层膜; 在第二等离子体激活沉积阶段中，在第一层膜上沉积具有第二膜组成的第二层膜; 以及在将等离子体的组成从第一等离子体激活膜沉积阶段转移到第二等离子体激活膜沉积阶段期间维持等离子体。

公开(公告)号：US20110236600A1

公开(公告)日：2011-09-29

申请号：US12970853

申请日：2010-12-16

申请人： Keith Fox ,  Dong Niu ,  Joe Womack ,  Mandyam Sriram ,  George Andrew Antonelli ,  Bart van Schravendijk ,  Jennifer O'Loughlin

发明人： Keith Fox ,  Dong Niu ,  Joe Womack ,  Mandyam Sriram ,  George Andrew Antonelli ,  Bart van Schravendijk ,  Jennifer O'Loughlin

IPC分类号： H05H1/24

CPC分类号： C23C16/505 ,  C23C16/24 ,  C23C16/345 ,  C23C16/402 ,  C23C16/4401 ,  C23C16/45523 ,  C23C16/509 ,  C23C16/54 ,  H01L21/02104 ,  H01L21/02123 ,  H01L21/02129 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02263 ,  H01L21/02274 ,  H01L21/0245 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/0254 ,  H01L21/6719 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/8229

摘要： Methods and hardware for depositing ultra-smooth silicon-containing films and film stacks are described. In one example, an embodiment of a method for forming a silicon-containing film on a substrate in a plasma-enhanced chemical vapor deposition apparatus is disclosed, the method including supplying a silicon-containing reactant to the plasma-enhanced chemical vapor deposition apparatus; supplying a co-reactant to the plasma-enhanced chemical vapor deposition apparatus; supplying a capacitively-coupled plasma to a process station of the plasma-enhanced chemical vapor deposition apparatus, the plasma including silicon radicals generated from the silicon-containing reactant and co-reactant radicals generated from the co-reactant; and depositing the silicon-containing film on the substrate, the silicon-containing film having a refractive index of between 1.4 and 2.1, the silicon-containing film further having an absolute roughness of less than or equal to 4.5 Å as measured on a silicon substrate.

摘要翻译： 描述了用于沉积超光滑含硅膜和膜堆的方法和硬件。 在一个实例中，公开了在等离子体增强化学气相沉积设备中在衬底上形成含硅膜的方法的实施例，该方法包括向等离子体增强化学气相沉积设备供应含硅反应物; 向等离子体增强化学气相沉积设备供应共反应物; 向等离子体增强化学气相沉积设备的处理站提供电容耦合等离子体，所述等离子体包括由含硅反应物产生的硅自由基和由共反应物产生的共反应物基团; 以及将所述含硅膜沉积在所述基底上，所述含硅膜的折射率在1.4和2.1之间，所述含硅膜还具有在硅衬底上测得的绝对粗糙度小于或等于4.5的值 。

公开(公告)号：US20110236594A1

公开(公告)日：2011-09-29

申请号：US12970846

申请日：2010-12-16

申请人： Jason Haverkamp ,  Pramod Subramonium ,  Joe Womack ,  Dong Niu ,  Keith Fox ,  John Alexy ,  Patrick Breiling ,  Jennifer O'Loughlin ,  Mandyam Sriram ,  George Andrew Antonelli ,  Bart van Schravendijk

发明人： Jason Haverkamp ,  Pramod Subramonium ,  Joe Womack ,  Dong Niu ,  Keith Fox ,  John Alexy ,  Patrick Breiling ,  Jennifer O'Loughlin ,  Mandyam Sriram ,  George Andrew Antonelli ,  Bart van Schravendijk

IPC分类号： C23C16/56 ,  H05H1/24 ,  C23C16/04 ,  B05D3/06

CPC分类号： C23C16/50 ,  C23C16/24 ,  C23C16/345 ,  C23C16/402 ,  C23C16/4401 ,  C23C16/45512 ,  C23C16/45523 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/509 ,  C23C16/52 ,  C23C16/54 ,  H01L21/02123 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/6719 ,  H01L21/67201 ,  H01L21/67207

摘要： Methods and hardware for depositing film stacks in a process tool in-situ (i.e., without a vacuum break or air exposure) are described. In one example, a method for depositing, on a substrate, a film stack including films of different compositions in-situ in a process station using a plasma is described, the method including, in a first plasma-activated film deposition phase, depositing a first layer of film having a first film composition on the substrate; in a second plasma-activated deposition phase, depositing a second layer of film having a second film composition on the first layer of film; and sustaining the plasma while transitioning a composition of the plasma from the first plasma-activated film deposition phase to the second plasma-activated film deposition phase.

摘要翻译： 描述了用于在原位（即，没有真空断裂或空气曝光）在工艺工具中沉积薄膜叠层的方法和硬件。 在一个实例中，描述了一种在基板上使用等离子体在处理站中原位沉积包括不同组成的膜的膜堆叠的方法，所述方法包括在第一等离子体激活膜沉积阶段中沉积 在所述基板上具有第一膜组成的第一层膜; 在第二等离子体激活沉积阶段中，在第一层膜上沉积具有第二膜组成的第二层膜; 以及在将等离子体的组成从第一等离子体激活膜沉积阶段转移到第二等离子体激活膜沉积阶段期间维持等离子体。

公开(公告)号：US08709551B2

公开(公告)日：2014-04-29

申请号：US12970853

申请日：2010-12-16

申请人： Keith Fox ,  Dong Niu ,  Joe Womack ,  Mandyam Sriram ,  George Andrew Antonelli ,  Bart van Schravendijk ,  Jennifer O'Loughlin

发明人： Keith Fox ,  Dong Niu ,  Joe Womack ,  Mandyam Sriram ,  George Andrew Antonelli ,  Bart van Schravendijk ,  Jennifer O'Loughlin

IPC分类号： C23C16/509 ,  C23C16/505 ,  C23C16/455 ,  C23C16/34 ,  C23C16/40 ,  C23C16/24 ,  H01L21/02 ,  H01L21/8229

CPC分类号： C23C16/505 ,  C23C16/24 ,  C23C16/345 ,  C23C16/402 ,  C23C16/4401 ,  C23C16/45523 ,  C23C16/509 ,  C23C16/54 ,  H01L21/02104 ,  H01L21/02123 ,  H01L21/02129 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02263 ,  H01L21/02274 ,  H01L21/0245 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/0254 ,  H01L21/6719 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/8229

摘要： Methods and hardware for depositing ultra-smooth silicon-containing films and film stacks are described. In one example, an embodiment of a method for forming a silicon-containing film on a substrate in a plasma-enhanced chemical vapor deposition apparatus is disclosed, the method including supplying a silicon-containing reactant to the plasma-enhanced chemical vapor deposition apparatus; supplying a co-reactant to the plasma-enhanced chemical vapor deposition apparatus; supplying a capacitively-coupled plasma to a process station of the plasma-enhanced chemical vapor deposition apparatus, the plasma including silicon radicals generated from the silicon-containing reactant and co-reactant radicals generated from the co-reactant; and depositing the silicon-containing film on the substrate, the silicon-containing film having a refractive index of between 1.4 and 2.1, the silicon-containing film further having an absolute roughness of less than or equal to 4.5 Å as measured on a silicon substrate.

摘要翻译： 描述了用于沉积超光滑含硅膜和膜堆的方法和硬件。 在一个实例中，公开了在等离子体增强化学气相沉积设备中在衬底上形成含硅膜的方法的实施例，该方法包括向等离子体增强化学气相沉积设备供应含硅反应物; 向等离子体增强化学气相沉积设备供应共反应物; 向等离子体增强化学气相沉积设备的处理站提供电容耦合等离子体，所述等离子体包括由含硅反应物产生的硅自由基和由共反应物产生的共反应物基团; 以及将所述含硅膜沉积在所述基底上，所述含硅膜的折射率在1.4和2.1之间，所述含硅膜还具有在硅衬底上测得的绝对粗糙度小于或等于4.5的值 。