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91 条记录 (耗时 0.036 秒)

    Non-volatile memories and methods of fabrication thereof
    1.
    发明授权
    Non-volatile memories and methods of fabrication thereof 有权
    非易失性存储器及其制造方法

    公开(公告)号：US08501610B2

    公开(公告)日：2013-08-06

    申请号：US12714194

    申请日：2010-02-26

    申请人： Chih-Wei Lin ,  Yi-Fang Lee ,  Cheng-Ta Wu ,  Cheng-Yuan Tsai

    发明人： Chih-Wei Lin ,  Yi-Fang Lee ,  Cheng-Ta Wu ,  Cheng-Yuan Tsai

    IPC分类号： H01L21/3205

    CPC分类号： H01L29/788 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513 ,  H01L29/7881

    摘要： Non-volatile memories and methods of fabrication thereof are described. In one embodiment, a method of fabricating a semiconductor device includes forming an oxide layer over a semiconductor substrate, and exposing the oxide layer to a first nitridation step to form a first nitrogen rich region. The first nitrogen rich region is disposed adjacent an interface between the oxide layer and the semiconductor substrate. After the first nitridation step, the oxide layer is exposed to a second nitridation step to form a second nitrogen rich region. A first gate electrode is formed on the oxide layer, wherein the second nitrogen rich region is disposed adjacent an interface between the oxide layer and the first gate electrode.

    摘要翻译： 描述了非易失性存储器及其制造方法。 在一个实施例中，制造半导体器件的方法包括在半导体衬底上形成氧化物层，并将氧化物层暴露于第一氮化步骤以形成第一富氮区域。 第一富氮区域设置在氧化物层和半导体衬底之间的界面附近。 在第一次氮化步骤之后，将氧化物层暴露于第二氮化步骤以形成第二富氮区域。 第一栅电极形成在氧化物层上，其中第二富氮区邻近氧化物层和第一栅电极之间的界面设置。

    Non-Volatile Memories and Methods of Fabrication Thereof
    2.
    发明申请
    Non-Volatile Memories and Methods of Fabrication Thereof 有权
    非易失性记忆及其制作方法

    公开(公告)号：US20100270604A1

    公开(公告)日：2010-10-28

    申请号：US12714194

    申请日：2010-02-26

    申请人： Chih-Wei Lin ,  Yi-Fang Lee ,  Cheng-Ta Wu ,  Cheng-Yuan Tsai

    发明人： Chih-Wei Lin ,  Yi-Fang Lee ,  Cheng-Ta Wu ,  Cheng-Yuan Tsai

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： H01L29/788 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513 ,  H01L29/7881

    摘要： Non-volatile memories and methods of fabrication thereof are described. In one embodiment, a method of fabricating a semiconductor device includes forming an oxide layer over a semiconductor substrate, and exposing the oxide layer to a first nitridation step to form a first nitrogen rich region. The first nitrogen rich region is disposed adjacent an interface between the oxide layer and the semiconductor substrate. After the first nitridation step, the oxide layer is exposed to a second nitridation step to form a second nitrogen rich region. A first gate electrode is formed on the oxide layer, wherein the second nitrogen rich region is disposed adjacent an interface between the oxide layer and the first gate electrode.

    摘要翻译： 描述了非易失性存储器及其制造方法。 在一个实施例中，制造半导体器件的方法包括在半导体衬底上形成氧化物层，并将氧化物层暴露于第一氮化步骤以形成第一富氮区域。 第一富氮区域设置在氧化物层和半导体衬底之间的界面附近。 在第一次氮化步骤之后，将氧化物层暴露于第二氮化步骤以形成第二富氮区域。 第一栅电极形成在氧化物层上，其中第二富氮区邻近氧化物层和第一栅电极之间的界面设置。

    Frame cell for shot layout flexibility
    6.
    发明授权
    Frame cell for shot layout flexibility 有权
    帧单元，用于拍摄布局灵活性

    公开(公告)号：US08843860B2

    公开(公告)日：2014-09-23

    申请号：US13409517

    申请日：2012-03-01

    申请人： Chin-Ming Lin ,  Chia-hung Huang ,  Chi-Ming Yang ,  Chin-Hsiang Lin ,  Yung-Cheng Chen ,  Chih-Wei Lin

    发明人： Chin-Ming Lin ,  Chia-hung Huang ,  Chi-Ming Yang ,  Chin-Hsiang Lin ,  Yung-Cheng Chen ,  Chih-Wei Lin

    IPC分类号： G06F17/50 ,  G03F7/20

    CPC分类号： G03F7/70433

    摘要： A method includes establishing an initial shot layout in which a number of shots are arranged in vertically aligned columns and horizontally aligned rows to cover a semiconductor wafer. At least one of a row of shots or a column of shots is shifted relative to an adjacent row or column of shots to establish at least one additional shot layout that differs from the initial shot layout in that shots in the at least one shifted row or column of shots are not aligned with the shots in the adjacent row or column of shots with which they were aligned in the initial shot layout. One of the initial shot layout and the at least one additional shot layout is selected as a final shot layout. The wafer is exposed to light using the final shot layout.

    摘要翻译： 一种方法包括建立初始照片布局，其中多个照片布置在垂直排列的列和水平排列的行中以覆盖半导体晶片。 一排照片或一列照片中的至少一列相对于相邻的行或列发射位移，以建立与至少一个移位行中的拍摄中的初始镜头布局不同的至少一个附加镜头布局，或 一列照片不与在初始镜头布局中对齐的相邻行或照片列中的镜头对齐。 选择初始镜头布局和至少一个附加镜头布局之一作为最终镜头布局。 使用最终镜头布局将晶片曝光。

    Multiphase power supply device and current adjusting method thereof
    8.
    发明授权
    Multiphase power supply device and current adjusting method thereof 有权
    多相电源装置及其电流调节方法

    公开(公告)号：US08570010B2

    公开(公告)日：2013-10-29

    申请号：US12913779

    申请日：2010-10-28

    申请人： Chih-Wei Lin ,  Nung-Te Huang ,  Chih-Wan Hsu

    发明人： Chih-Wei Lin ,  Nung-Te Huang ,  Chih-Wan Hsu

    IPC分类号： G05F1/00 ,  G05F1/565

    CPC分类号： H02M3/1584

    摘要： A multiphase power supply device and a current adjusting method thereof are provided in the application. The multiphase power supply device outputs power sources and currents with different phases to a microprocessor, and a detection module detects present temperature values of each phase power source to adjust currents of each phase power source to achieve thermal balance. The multiphase power supply device further can automatically measure the power efficiency and display results including the detected temperature values of each phase power source and the power efficiency on a screen, and thus the user can know the operation efficiency of the power supply device conveniently.

    摘要翻译： 本申请中提供了多相电源装置及其电流调节方法。 多相电源装置向微处理器输出具有不同相位的电源和电流，并且检测模块检测每相电源的当前温度值，以调节每相电源的电流以实现热平衡。 多相电源装置还可以自动测量功率效率和显示结果，包括各相电源的检测温度值和屏幕上的电源效率，从而使用户可以方便地了解电源设备的运行效率。