公开(公告)号：US09385100B1

公开(公告)日：2016-07-05

申请号：US14659905

申请日：2015-03-17

申请人： Hun Teak Lee ,  YoungChul Kim ,  Hyunll Bae ,  HeeSoo Lee ,  HeeJo Chi

发明人： Hun Teak Lee ,  YoungChul Kim ,  Hyunll Bae ,  HeeSoo Lee ,  HeeJo Chi

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L21/56

CPC分类号： H01L24/81 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/10175 ,  H01L2224/131 ,  H01L2224/16113 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/81385 ,  H01L2224/81395 ,  H01L2224/81411 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/8149 ,  H01L2224/81801 ,  H01L2224/83104 ,  H01L2224/92125 ,  H01L2924/14 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/014 ,  H01L2924/00014

摘要： An integrated circuit packaging system, and a method of manufacture thereof, includes: an embedded trace substrate having bonding sites and traces embedded in a base material, an insulation layer on the traces, the insulation layer having a top surface coplanar with the top surface of the base material; and an integrated circuit die connected to the bonding sites.

摘要翻译： 一种集成电路封装系统及其制造方法，包括：嵌入迹线基板，其具有嵌入基材中的接合位置和迹线，迹线上的绝缘层，绝缘层具有与顶表面共面的顶表面 基材; 以及连接到接合位置的集成电路管芯。

公开(公告)号：US09693455B1

公开(公告)日：2017-06-27

申请号：US14227346

申请日：2014-03-27

申请人： Seong Won Park ,  Hun Teak Lee ,  WoonJae Beak ,  MinJung Kim ,  ChangHwan Kim ,  ByungHyun Kwak ,  GwangTae Kim ,  HeeSoo Lee

发明人： Seong Won Park ,  Hun Teak Lee ,  WoonJae Beak ,  MinJung Kim ,  ChangHwan Kim ,  ByungHyun Kwak ,  GwangTae Kim ,  HeeSoo Lee

IPC分类号： H05K1/11 ,  H05K3/36 ,  H05K3/40 ,  H05K1/09 ,  H05K1/18 ,  H05K1/14 ,  H05K3/32 ,  H05K3/46

CPC分类号： H05K1/112 ,  H01L2224/16225 ,  H01L2224/73204 ,  H05K1/09 ,  H05K1/113 ,  H05K1/14 ,  H05K1/18 ,  H05K1/186 ,  H05K3/32 ,  H05K3/36 ,  H05K3/4007 ,  H05K3/4038 ,  H05K3/46 ,  H05K3/4614 ,  H05K3/4623 ,  H05K2201/04 ,  H05K2203/061 ,  H05K2203/0733

摘要： A system and method of manufacture of an integrated circuit packaging system includes: a copper film; a first metal layer directly on the copper film; an insulation layer directly on and over the first metal layer, the insulation layer having a via hole through the insulation layer; a conductive via within the via hole and directly on the first metal layer; a second metal layer directly on the conductive via and the insulation layer; a copper post directly on the copper film; a solder pad over the copper post; and an interposer coupled to the copper post and the solder pad.

公开(公告)号：US20160190054A1

公开(公告)日：2016-06-30

申请号：US14792447

申请日：2015-07-06

申请人： SooSan Park ,  KyuSang Kim ,  YeoChan Ko ,  KeoChang Lee ,  HeeJo Chi ,  HeeSoo Lee

发明人： SooSan Park ,  KyuSang Kim ,  YeoChan Ko ,  KeoChang Lee ,  HeeJo Chi ,  HeeSoo Lee

IPC分类号： H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L23/538

CPC分类号： H01L23/49833 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/4828 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83104 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15331 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/05442 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A system and method of manufacture of an integrated circuit packaging system includes: a base substrate, the base substrate includes a base terminal; an integrated circuit device on the base substrate; a bottom conductive joint on the base terminal; a conductive ball on the bottom conductive joint, the conductive ball includes a core body; and an interposer over the conductive ball.

摘要翻译： 一种集成电路封装系统的制造方法和制造方法，其特征在于，包括：基底基板，所述基底基板包括基底; 在基底基板上的集成电路器件; 基端子上的底部导电接头; 底部导电接头上的导电球，导电球包括芯体; 以及导电球上的插入件。

公开(公告)号：US09673171B1

公开(公告)日：2017-06-06

申请号：US14226711

申请日：2014-03-26

申请人： HeeJo Chi ,  HeeSoo Lee ,  Omin Kwon

发明人： HeeJo Chi ,  HeeSoo Lee ,  Omin Kwon

IPC分类号： H01L23/02 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L25/0652 ,  H01L23/16 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/19 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/83005 ,  H01L2924/00

摘要： An integrated circuit packaging system and method of manufacture thereof includes: providing a semiconductor die having semiconductor die contacts; depositing an insulation layer on the semiconductor die including the semiconductor die contacts exposed; applying a conductive layer on the semiconductor die contacts and the insulation layer; and coupling system interconnects to the conductive layer for electrically connecting the semiconductor die to the system interconnects.

公开(公告)号：US09093415B2

公开(公告)日：2015-07-28

申请号：US14037110

申请日：2013-09-25

申请人： Oh Han Kim ,  Sell Jung ,  HeeSoo Lee ,  Jae Han Chung ,  YoungChul Kim

发明人： Oh Han Kim ,  Sell Jung ,  HeeSoo Lee ,  Jae Han Chung ,  YoungChul Kim

IPC分类号： H01L23/36 ,  H01L25/065

CPC分类号： H01L23/36 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/544 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L25/065 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/29012 ,  H01L2224/29013 ,  H01L2224/29014 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

摘要： An integrated circuit packaging system, and method of manufacture therefor, includes: a substrate; a mold cap formed on the substrate; fiducial mark inscribed in the mold cap; a thermal interface material applied over the substrate and referenced by the fiducial mark; and a heat spreader, mounted on the thermal interface material, precisely positioned by a position notch aligned relative to the fiducial mark.

摘要翻译： 集成电路封装系统及其制造方法包括：基板; 形成在所述基板上的模具帽; 基准标记刻在模具盖上; 涂覆在基板上并由基准标记引用的热界面材料; 以及安装在热界面材料上的散热器，通过相对于基准标记对齐的位置凹槽精确定位。

公开(公告)号：US20150084178A1

公开(公告)日：2015-03-26

申请号：US14037110

申请日：2013-09-25

申请人： Oh Han Kim ,  SeIl Jung ,  HeeSoo Lee ,  Jae Han Chung ,  YoungChul Kim

发明人： Oh Han Kim ,  SeIl Jung ,  HeeSoo Lee ,  Jae Han Chung ,  YoungChul Kim

IPC分类号： H01L23/36 ,  H01L25/065

CPC分类号： H01L23/36 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/544 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L25/065 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/29012 ,  H01L2224/29013 ,  H01L2224/29014 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

摘要： An integrated circuit packaging system, and method of manufacture therefor, includes: a substrate; a mold cap formed on the substrate; fiducial mark inscribed in the mold cap; a thermal interface material applied over the substrate and referenced by the fiducial mark; and a heat spreader, mounted on the thermal interface material, precisely positioned by a position notch aligned relative to the fiducial mark.

摘要翻译： 一种集成电路封装系统及其制造方法，包括：基板; 形成在所述基板上的模具帽; 基准标记刻在模具盖上; 涂覆在基板上并由基准标记引用的热界面材料; 以及安装在热界面材料上的散热器，通过相对于基准标记对齐的位置凹槽精确定位。

公开(公告)号：US09171739B1

公开(公告)日：2015-10-27

申请号：US14313452

申请日：2014-06-24

申请人： YoungDal Roh ,  DeokKyung Yang ,  HeeSoo Lee

发明人： YoungDal Roh ,  DeokKyung Yang ,  HeeSoo Lee

IPC分类号： H01L23/28 ,  H01L21/44 ,  H01L21/48 ,  H01L23/495 ,  H01L23/00

CPC分类号： H01L21/486 ,  H01L23/145 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/16 ,  H01L2224/16014 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2924/14 ,  H01L2924/15311

摘要： An integrated circuit packaging system, and a method of manufacture thereof, including: a patterned first conductive plating; a molding on the patterned first conductive plating; a through via through the molding; a second conductive plating on the molding and the through via; a protection layer partially covering the first conductive plating, the second conductive plating and the molding; a device on the first conductive plating; and an external connector being attached to the second conductive plating.

摘要翻译： 一种集成电路封装系统及其制造方法，包括：图案化的第一导电电镀; 在图案化的第一导电电镀上的模制品; 通过成型的通孔; 在模制件和通孔上的第二导电电镀; 部分地覆盖第一导电镀层，第二导电镀层和模制件的保护层; 第一导电电镀装置; 以及连接到第二导电电镀层的外部连接器。