公开(公告)号：US5898226A

公开(公告)日：1999-04-27

申请号：US770248

申请日：1996-12-20

申请人： Ki-Kwon Jeong ,  Hyeong-Seob Kim

发明人： Ki-Kwon Jeong ,  Hyeong-Seob Kim

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L21/316 ,  H01L21/321

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/48 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/02126 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/78301 ,  H01L2224/8503 ,  H01L2224/85181 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L24/45 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753

摘要： A semiconductor chip is provided comprising a semiconductor substrate having determined circuit elements on it, a surface-smoothing layer deposited on the substrate, a bonding pad formed on the smoothing layer and connected electrically to the circuit elements, a passivation layer formed on the surface-smoothing layer, the passivation layer having a window for exposing a part of the bonding pad, and a second metal layer having a same height as the passivation layer and occupying peripheral parts of the window to form a reduced bonding windows for the bonding pad.

摘要翻译： 提供一种半导体芯片，包括其上具有确定的电路元件的半导体衬底，沉积在衬底上的表面平滑层，形成在平滑层上并与电路元件电连接的焊盘，形成在表面平滑层上的钝化层， 所述钝化层具有用于暴露所述焊盘的一部分的窗口，以及与所述钝化层具有相同高度的第二金属层，并占据所述窗口的周边部分以形成所述接合焊盘的减小的接合窗口。

公开(公告)号：US20060033212A1

公开(公告)日：2006-02-16

申请号：US11253755

申请日：2005-10-20

申请人： Hyeong-Seob Kim ,  Tae-Gyeong Chung

发明人： Hyeong-Seob Kim ,  Tae-Gyeong Chung

IPC分类号： H01L23/48

CPC分类号： H01L24/10 ,  H01L23/481 ,  H01L23/49816 ,  H01L24/13 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06593 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/05124

摘要： A semiconductor chip package includes a semiconductor chip having a through hole extending there through from an active first surface to an inactive second surface. A first conductive pad at least partially surrounds the through hole on the active first surface of the semiconductor chip. The package also includes a printed circuit board having a first surface attached to the inactive second surface of the semiconductor chip, and a second conductive pad aligned with the through hole of the semiconductor chip. A conductive material fills the through hole and contacts the first and second conductive pads.

摘要翻译： 半导体芯片封装包括半导体芯片，该半导体芯片具有从活性第一表面延伸到非活性第二表面的通孔。 第一导电焊盘至少部分地围绕半导体芯片的有源第一表面上的通孔。 封装还包括具有附接到半导体芯片的非活性第二表面的第一表面的印刷电路板和与半导体芯片的通孔对准的第二导电焊盘。 导电材料填充通孔并接触第一和第二导电焊盘。

公开(公告)号：US20050098879A1

公开(公告)日：2005-05-12

申请号：US10982361

申请日：2004-11-03

申请人： Hyeong-Seob Kim

发明人： Hyeong-Seob Kim

IPC分类号： H01L23/12 ,  H01L23/02 ,  H01L23/13 ,  H01L23/14 ,  H01L23/31 ,  H01L23/36 ,  H01L25/10 ,  H01L23/48

CPC分类号： H01L23/36 ,  H01L23/13 ,  H01L23/145 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package having an ultra thin thickness and a method of manufacturing the same are provided. The ultra thin semiconductor package comprises a circuit board in which a through hole is formed. A semiconductor chip is located in the through hole and a connecting element electrically connects the circuit board and the semiconductor chip. An epoxy molding compound (EMC) covers the semiconductor chip and the connecting element and a supporter having a thermal expansion coefficient similar to the EMC is attached inside the through hole on a lower surface of the semiconductor chip. An external connecting terminal is attached to at least one side of the circuit board. Because of the inclusion of the supporter, warpage of the semiconductor package resulting from the curing of the EMC is prevented.

摘要翻译： 提供了具有超薄厚度的半导体封装及其制造方法。 超薄半导体封装包括其中形成有通孔的电路板。 半导体芯片位于通孔中，并且连接元件电连接电路板和半导体芯片。 环氧树脂模塑料（EMC）覆盖半导体芯片，并且连接元件和具有类似于EMC的热膨胀系数的支撑件被安装在半导体芯片的下表面上的通孔的内部。 外部连接端子连接到电路板的至少一侧。 由于包含支撑体，防止了由固化EMC引起的半导体封装的翘曲。

公开(公告)号：US07335592B2

公开(公告)日：2008-02-26

申请号：US11253755

申请日：2005-10-20

申请人： Hyeong-Seob Kim ,  Tae-Gyeong Chung

发明人： Hyeong-Seob Kim ,  Tae-Gyeong Chung

IPC分类号： H01L21/44

CPC分类号： H01L24/10 ,  H01L23/481 ,  H01L23/49816 ,  H01L24/13 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06593 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/05124

摘要： A semiconductor chip package includes a semiconductor chip having a through hole extending there through from an active first surface to an inactive second surface. A first conductive pad at least partially surrounds the through hole on the active first surface of the semiconductor chip. The package also includes a printed circuit board having a first surface attached to the inactive second surface of the semiconductor chip, and a second conductive pad aligned with the through hole of the semiconductor chip. A conductive material fills the through hole and contacts the first and second conductive pads.

摘要翻译： 半导体芯片封装包括半导体芯片，该半导体芯片具有从活性第一表面延伸到非活性第二表面的通孔。 第一导电焊盘至少部分地围绕半导体芯片的有源第一表面上的通孔。 封装还包括具有附接到半导体芯片的非活性第二表面的第一表面的印刷电路板和与半导体芯片的通孔对准的第二导电焊盘。 导电材料填充通孔并接触第一和第二导电焊盘。

公开(公告)号：US06982487B2

公开(公告)日：2006-01-03

申请号：US10665630

申请日：2003-09-22

申请人： Hyeong-Seob Kim ,  Tae-Gyeong Chung

发明人： Hyeong-Seob Kim ,  Tae-Gyeong Chung

IPC分类号： H01L23/48

CPC分类号： H01L24/10 ,  H01L23/481 ,  H01L23/49816 ,  H01L24/13 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06593 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/05124

摘要： A semiconductor chip package includes a semiconductor chip having a through hole extending there through from an active first surface to an inactive second surface. A first conductive pad at least partially surrounds the through hole on the active first surface of the semiconductor chip. The package also includes a printed circuit board having a first surface attached to the inactive second surface of the semiconductor chip, and a second conductive pad aligned with the through hole of the semiconductor chip. A conductive material fills the through hole and contacts the first and second conductive pads.

摘要翻译： 半导体芯片封装包括半导体芯片，该半导体芯片具有从活性第一表面延伸到非活性第二表面的通孔。 第一导电焊盘至少部分地围绕半导体芯片的有源第一表面上的通孔。 封装还包括具有附接到半导体芯片的非活性第二表面的第一表面的印刷电路板和与半导体芯片的通孔对准的第二导电焊盘。 导电材料填充通孔并接触第一和第二导电焊盘。

公开(公告)号：US08129826B2

公开(公告)日：2012-03-06

申请号：US12355587

申请日：2009-01-16

申请人： Sang-Wook Park ,  Min-Young Son ,  Hyeong-Seob Kim

发明人： Sang-Wook Park ,  Min-Young Son ,  Hyeong-Seob Kim

IPC分类号： H01L23/495 ,  H01L23/48

CPC分类号： H01L25/0657 ,  H01L23/49531 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05553 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/10161 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： Provided is a semiconductor package apparatus having a redistribution layer. The apparatus includes at least one or more semiconductor chips, a packing part protecting the semiconductor chips, and a support part supporting the semiconductor chips. The apparatus also includes external terminals extending outside the packing part, redistribution layers installed between the semiconductor chips and the support part and including redistribution paths, first signal transmitting units, and second signal transmitting units. The first signal transmitting units transmitting electrical signals generated from the semiconductor chips to the redistribution paths of the redistribution layers, and the second signal transmitting units transmit the electrical signals from the redistribution paths to the external terminals. Therefore, a size and a thickness of the semiconductor package apparatus can be reduced, and processes can be simplified to improve productivity.

摘要翻译： 提供了具有再分配层的半导体封装装置。 该装置包括至少一个或多个半导体芯片，保护半导体芯片的封装部分和支撑半导体芯片的支撑部件。 该设备还包括延伸到包装部分外部的外部端子，重新分配层安装在半导体芯片和支撑部分之间，并且包括再分配路径，第一信号发送单元和第二信号发送单元。 所述第一信号发送单元将从所述半导体芯片生成的电信号发送到所述再分配层的再分配路径，并且所述第二信号发送单元将所述电信号从所述再分配路径发送到所述外部终端。 因此，可以减小半导体封装装置的尺寸和厚度，并且可以简化工艺以提高生产率。

公开(公告)号：US07420129B2

公开(公告)日：2008-09-02

申请号：US11048870

申请日：2005-02-03

申请人： Hyeong-Seob Kim

发明人： Hyeong-Seob Kim

IPC分类号： H01R12/04

CPC分类号： H01L23/49822 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/484 ,  H01L2224/83951 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85611 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01016 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K3/28 ,  H05K3/385 ,  H05K2203/0315 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method and apparatus of manufacturing a semiconductor device and the semiconductor device used in a semiconductor package are disclosed. The semiconductor device may include a main body having one or more supporting layers, a plurality of metal wires that may be formed as a plurality of inner connection pads and a plurality of outer connection pads, an outermost resin layer pattern formed on the surface of the main body, and including a plurality of openings exposing the plurality of outer connection pads, and a metal oxide layer disposed between the plurality of metal wires and the outermost resin layer pattern. The plurality of inner and outer connection pads may be formed on a surface of the main body.

摘要翻译： 公开了半导体封装中使用的半导体器件和半导体器件的制造方法和装置。 半导体器件可以包括具有一个或多个支撑层的主体，可以形成为多个内部连接焊盘的多个金属线和多个外部连接焊盘，最外面的树脂层图案形成在 主体，并且包括暴露多个外连接焊盘的多个开口，以及设置在多个金属线和最外层树脂层图案之间的金属氧化物层。 多个内外连接垫可以形成在主体的表面上。

公开(公告)号：US07105919B2

公开(公告)日：2006-09-12

申请号：US10982361

申请日：2004-11-03

申请人： Hyeong-Seob Kim

发明人： Hyeong-Seob Kim

IPC分类号： H01L23/48 ,  H01L23/12 ,  H01L23/053

CPC分类号： H01L23/36 ,  H01L23/13 ,  H01L23/145 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package having an ultra thin thickness and a method of manufacturing the same are provided. The ultra thin semiconductor package comprises a circuit board in which a through hole is formed. A semiconductor chip is located in the through hole and a connecting element electrically connects the circuit board and the semiconductor chip. An epoxy molding compound (EMC) covers the semiconductor chip and the connecting element and a supporter having a thermal expansion coefficient similar to the EMC is attached inside the through hole on a lower surface of the semiconductor chip. An external connecting terminal is attached to at least one side of the circuit board. Because of the inclusion of the supporter, warpage of the semiconductor package resulting from the curing of the EMC is prevented.

摘要翻译： 提供了具有超薄厚度的半导体封装及其制造方法。 超薄半导体封装包括其中形成有通孔的电路板。 半导体芯片位于通孔中，并且连接元件电连接电路板和半导体芯片。 环氧树脂模塑料（EMC）覆盖半导体芯片，并且连接元件和具有类似于EMC的热膨胀系数的支撑件被安装在半导体芯片的下表面上的通孔的内部。 外部连接端子连接到电路板的至少一侧。 由于包含支撑体，防止了由固化EMC引起的半导体封装的翘曲。

公开(公告)号：US20050285230A1

公开(公告)日：2005-12-29

申请号：US11048870

申请日：2005-02-03

申请人： Hyeong-Seob Kim

发明人： Hyeong-Seob Kim

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L23/58 ,  H05K3/28 ,  H05K3/38

CPC分类号： H01L23/49822 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/484 ,  H01L2224/83951 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85611 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01016 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K3/28 ,  H05K3/385 ,  H05K2203/0315 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method and apparatus of manufacturing a semiconductor device and the semiconductor device used in a semiconductor package are disclosed. The semiconductor device may include a main body having one or more supporting layers, a plurality of metal wires that may be formed as a plurality of inner connection pads and a plurality of outer connection pads, an outermost resin layer pattern formed on the surface of the main body, and including a plurality of openings exposing the plurality of outer connection pads, and a metal oxide layer disposed between the plurality of metal wires and the outermost resin layer pattern. The plurality of inner and outer connection pads may be formed on a surface of the main body.

摘要翻译： 公开了半导体封装中使用的半导体器件和半导体器件的制造方法和装置。 半导体器件可以包括具有一个或多个支撑层的主体，可以形成为多个内部连接焊盘的多个金属线和多个外部连接焊盘，最外面的树脂层图案形成在 主体，并且包括暴露多个外连接焊盘的多个开口，以及设置在多个金属线和最外层树脂层图案之间的金属氧化物层。 多个内外连接垫可以形成在主体的表面上。

公开(公告)号：US06448661B1

公开(公告)日：2002-09-10

申请号：US10059932

申请日：2002-01-28

申请人： Hyeong-Seob Kim ,  Sa-Yoon Kang ,  Myung-Kee Chung ,  In-Ku Kang ,  Kwan-Jai Lee

发明人： Hyeong-Seob Kim ,  Sa-Yoon Kang ,  Myung-Kee Chung ,  In-Ku Kang ,  Kwan-Jai Lee

IPC分类号： H01L2348

CPC分类号： H01L24/83 ,  H01L23/481 ,  H01L24/29 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

摘要： A three-dimensional, multi-chip package with chip selection pads formed at the chip-level and a manufacturing method thereof are provided. The three-dimensional, multi-chip package is formed by stacking a number (N) of semiconductor integrated circuit chips. Each chip comprises an integrated circuit die, a chip selection terminal, (N−1) chip selection pads, an insulation layer, (N−1) metal wirings, upper connection terminals, lower connection terminals, and trench wirings. The chip selection terminal of each chip is separated from the chip selection of the other chips by the chip selection pads formed at the chip-level.

摘要翻译： 提供了一种具有在芯片级形成的芯片选择焊盘的三维多芯片封装及其制造方法。 通过堆叠多个（N）个半导体集成电路芯片来形成三维多芯片封装。 每个芯片包括集成电路管芯，芯片选择端子（N-1）芯片选择焊盘，绝缘层，（N-1）金属布线，上连接端子，下连接端子和沟槽布线。 每个芯片的芯片选择端通过在芯片级形成的芯片选择焊盘与其他芯片的芯片选择分离。