公开(公告)号：US20120199991A1

公开(公告)日：2012-08-09

申请号：US13331090

申请日：2011-12-20

申请人： Keishiro OKAMOTO ,  Tadahiro Imada ,  Nobuhiro Imaizumi ,  Keiji Watanabe

发明人： Keishiro OKAMOTO ,  Tadahiro Imada ,  Nobuhiro Imaizumi ,  Keiji Watanabe

IPC分类号： H01L23/29 ,  H01L21/56

CPC分类号： H01L23/3135 ,  H01L23/3121 ,  H01L23/3142 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48472 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/13064 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device includes: a semiconductor chip including a nitride semiconductor layered structure including a carrier transit layer and a carrier supply layer; a first resin layer on the semiconductor chip, the first resin layer including a coupling agent; a second resin layer on the first resin layer, the second resin layer including a surfactant; and a sealing resin layer to seal the semiconductor chip with the first resin layer and the second resin layer.

摘要翻译： 半导体器件包括：半导体芯片，其包括具有载流子迁移层和载流子供给层的氮化物半导体层叠结构; 在所述半导体芯片上的第一树脂层，所述第一树脂层包含偶联剂; 在第一树脂层上的第二树脂层，第二树脂层包括表面活性剂; 以及用第一树脂层和第二树脂层密封半导体芯片的密封树脂层。

公开(公告)号：US20120211901A1

公开(公告)日：2012-08-23

申请号：US13355792

申请日：2012-01-23

申请人： Kozo SHIMIZU ,  Keishiro Okamoto ,  Nobuhiro Imaizumi ,  Tadahiro Imada ,  Keiji Watanabe

发明人： Kozo SHIMIZU ,  Keishiro Okamoto ,  Nobuhiro Imaizumi ,  Tadahiro Imada ,  Keiji Watanabe

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L23/48 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/05005 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05541 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/26175 ,  H01L2224/2745 ,  H01L2224/2746 ,  H01L2224/29019 ,  H01L2224/29036 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/2912 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/325 ,  H01L2224/32502 ,  H01L2224/32506 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48644 ,  H01L2224/48744 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2224/83193 ,  H01L2224/83194 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/13064 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83439 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0132 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/0665 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： A manufacturing of a semiconductor device includes forming one of a layer with a first metal and the layer with a second metal on one of a semiconductor chip mounting area of a support plate and a back surface of the semiconductor chip; forming the other of the layer with the first metal and the layer with the second metal on an area corresponding to a part of the area, in which one of the layer with the first metal and the layer with the second metal, of the other one of the semiconductor chip mounting area and the back surface of the semiconductor chip; and forming a layer which includes an alloy with the first metal and the second metal after positioning the semiconductor chip in the semiconductor chip mounting area to bond the semiconductor chip with the semiconductor chip mounting area.

摘要翻译： 半导体器件的制造包括在支撑板的半导体芯片安装区域和半导体芯片的后表面中的一个上形成具有第一金属的层和具有第二金属的层; 在第一金属层和第二金属层之间形成与第一金属层和第二金属层之间的一个区域对应的区域的另一层 的半导体芯片安装区域和半导体芯片的背面; 以及在将所述半导体芯片定位在所述半导体芯片安装区域中之后，形成与所述第一金属和所述第二金属合金的层，以将半导体芯片与半导体芯片安装区域接合。

公开(公告)号：US08728867B2

公开(公告)日：2014-05-20

申请号：US13355792

申请日：2012-01-23

申请人： Kozo Shimizu ,  Keishiro Okamoto ,  Nobuhiro Imaizumi ,  Tadahiro Imada ,  Keiji Watanabe

发明人： Kozo Shimizu ,  Keishiro Okamoto ,  Nobuhiro Imaizumi ,  Tadahiro Imada ,  Keiji Watanabe

IPC分类号： H01L21/44

CPC分类号： H01L23/48 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/05005 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05541 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/26175 ,  H01L2224/2745 ,  H01L2224/2746 ,  H01L2224/29019 ,  H01L2224/29036 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/2912 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/325 ,  H01L2224/32502 ,  H01L2224/32506 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48644 ,  H01L2224/48744 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2224/83193 ,  H01L2224/83194 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/13064 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83439 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0132 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/0665 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： A manufacturing of a semiconductor device includes forming one of a layer with a first metal and the layer with a second metal on one of a semiconductor chip mounting area of a support plate and a back surface of the semiconductor chip; forming the other of the layer with the first metal and the layer with the second metal on an area corresponding to a part of the area, in which one of the layer with the first metal and the layer with the second metal, of the other one of the semiconductor chip mounting area and the back surface of the semiconductor chip; and forming a layer which includes an alloy with the first metal and the second metal after positioning the semiconductor chip in the semiconductor chip mounting area to bond the semiconductor chip with the semiconductor chip mounting area.

摘要翻译： 半导体器件的制造包括在支撑板的半导体芯片安装区域和半导体芯片的后表面中的一个上形成具有第一金属的层和具有第二金属的层; 在第一金属层和第二金属层之间形成与第一金属层和第二金属层之间的一个区域对应的区域的另一层 的半导体芯片安装区域和半导体芯片的背面; 以及在将所述半导体芯片定位在所述半导体芯片安装区域中之后，形成与所述第一金属和所述第二金属合金的层，以将半导体芯片与半导体芯片安装区域接合。

公开(公告)号：US08492784B2

公开(公告)日：2013-07-23

申请号：US13331090

申请日：2011-12-20

申请人： Keishiro Okamoto ,  Tadahiro Imada ,  Nobuhiro Imaizumi ,  Keiji Watanabe

发明人： Keishiro Okamoto ,  Tadahiro Imada ,  Nobuhiro Imaizumi ,  Keiji Watanabe

IPC分类号： H01L33/00

CPC分类号： H01L23/3135 ,  H01L23/3121 ,  H01L23/3142 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48472 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/13064 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device includes: a semiconductor chip including a nitride semiconductor layered structure including a carrier transit layer and a carrier supply layer; a first resin layer on the semiconductor chip, the first resin layer including a coupling agent; a second resin layer on the first resin layer, the second resin layer including a surfactant; and a sealing resin layer to seal the semiconductor chip with the first resin layer and the second resin layer.

摘要翻译： 半导体器件包括：半导体芯片，其包括具有载流子迁移层和载流子供给层的氮化物半导体层叠结构; 在所述半导体芯片上的第一树脂层，所述第一树脂层包含偶联剂; 在第一树脂层上的第二树脂层，第二树脂层包括表面活性剂; 以及用第一树脂层和第二树脂层密封半导体芯片的密封树脂层。

公开(公告)号：US20120211899A1

公开(公告)日：2012-08-23

申请号：US13355805

申请日：2012-01-23

申请人： Nobuhiro IMAIZUMI ,  Keishiro Okamoto ,  Keiji Watanabe

发明人： Nobuhiro IMAIZUMI ,  Keishiro Okamoto ,  Keiji Watanabe

IPC分类号： H01L23/52 ,  H01L21/50

CPC分类号： H01L23/49513 ,  H01L23/3107 ,  H01L23/49562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/29 ,  H01L2224/29076 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/92247 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10329 ,  H01L2924/13064 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/15763 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/3512

摘要： A method for manufacturing a semiconductor device includes placing a sheet containing a fibrous material having at least one outer surface having a metal on a semiconductor chip-mounting region of a substrate; forming a bonding layer containing a fusible metal on the semiconductor chip-mounting region; placing a semiconductor chip on the semiconductor chip-mounting region; and bonding the semiconductor chip to the semiconductor chip-mounting region with the fusible metal-containing bonding layer by heating.

摘要翻译： 一种半导体器件的制造方法，其特征在于，在衬底的半导体芯片安装区域上放置含有具有至少一个具有金属的外表面的纤维材料的片材; 在半导体芯片安装区域上形成含有可熔金属的接合层; 将半导体芯片放置在半导体芯片安装区域上; 并且通过加热将半导体芯片与可熔融金属键合层接合到半导体芯片安装区域。

公开(公告)号：US08674520B2

公开(公告)日：2014-03-18

申请号：US13355805

申请日：2012-01-23

申请人： Nobuhiro Imaizumi ,  Keishiro Okamoto ,  Keiji Watanabe

发明人： Nobuhiro Imaizumi ,  Keishiro Okamoto ,  Keiji Watanabe

IPC分类号： H01L29/40

CPC分类号： H01L23/49513 ,  H01L23/3107 ,  H01L23/49562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/29 ,  H01L2224/29076 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/92247 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10329 ,  H01L2924/13064 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/15763 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/3512

摘要： A method for manufacturing a semiconductor device includes placing a sheet containing a fibrous material having at least one outer surface having a metal on a semiconductor chip-mounting region of a substrate; forming a bonding layer containing a fusible metal on the semiconductor chip-mounting region; placing a semiconductor chip on the semiconductor chip-mounting region; and bonding the semiconductor chip to the semiconductor chip-mounting region with the fusible metal-containing bonding layer by heating.

摘要翻译： 一种半导体器件的制造方法，其特征在于，在衬底的半导体芯片安装区域上放置含有具有至少一个具有金属的外表面的纤维材料的片材; 在半导体芯片安装区域上形成含有可熔金属的接合层; 将半导体芯片放置在半导体芯片安装区域上; 并且通过加热将半导体芯片与可熔融金属键合层接合到半导体芯片安装区域。

公开(公告)号：US20120091522A1

公开(公告)日：2012-04-19

申请号：US13276521

申请日：2011-10-19

申请人： Shirou OZAKI ,  Masahito Kanamura ,  Norikazu Nakamura ,  Toyoo Miyajima ,  Masayuki Takeda ,  Keiji Watanabe ,  Toshihide Kikkawa ,  Kenji Imanishi ,  Toshihiro Ohki ,  Tadahiro Imada

发明人： Shirou OZAKI ,  Masahito Kanamura ,  Norikazu Nakamura ,  Toyoo Miyajima ,  Masayuki Takeda ,  Keiji Watanabe ,  Toshihide Kikkawa ,  Kenji Imanishi ,  Toshihiro Ohki ,  Tadahiro Imada

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L29/772

CPC分类号： H01L29/517 ,  H01L21/0228 ,  H01L23/291 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/518 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a first semiconductor layer formed over a substrate, a second semiconductor layer formed over the first semiconductor layer, a source electrode and a drain electrode formed over the second semiconductor layer, an insulating film formed over the second semiconductor layer, a gate electrode formed over the insulating film, and a protection film covering the insulating film, the protection film being formed by thermal CVD, thermal ALD, or vacuum vapor deposition.

摘要翻译： 半导体器件包括形成在衬底上的第一半导体层，形成在第一半导体层上的第二半导体层，形成在第二半导体层上的源电极和漏电极，形成在第二半导体层上的绝缘膜，栅极 形成在绝缘膜上的电极，以及覆盖绝缘膜的保护膜，保护膜通过热CVD，热ALD或真空气相沉积形成。

公开(公告)号：US09257583B2

公开(公告)日：2016-02-09

申请号：US14119195

申请日：2011-05-25

申请人： Keiji Watanabe ,  Ryuta Tsuchiya ,  Takashi Hattori ,  Mieko Matsumura

发明人： Keiji Watanabe ,  Ryuta Tsuchiya ,  Takashi Hattori ,  Mieko Matsumura

IPC分类号： H01L31/00 ,  H01L31/0352 ,  H01L31/0236

CPC分类号： H01L31/035281 ,  H01L31/02366 ,  H01L31/03529 ,  Y02E10/50

摘要： A solar cell including a substrate 1, a nanopillar 11 having diameter D1 connected to the substrate 1, and a nanopillar 12 having diameter D2 connected to the substrate 1 is characterized in that D2 is greater than D1 in order to realize a solar cell having, as the surface structure, a nanopillar array structure with which it is possible to prevent reflection within the broad wavelength region of solar light. A nanopillar array structure 21 formed from two types of nanopillars having different diameters has a point of minimum reflectivity of a nanopillar array structure formed from the nanopillar 11 having diameter D1 and a point of minimum reflectivity of a nanopillar array structure formed from the nanopillar 12 having diameter D2 and therefore, is capable of preventing reflection within the broad wavelength region of solar light.

摘要翻译： 包括基板1，具有与基板1连接的直径D1的纳米柱11和具有连接到基板1的直径D2的纳米柱12的太阳能电池的特征在于，D2大于D1，以实现太阳能电池， 作为表面结构，可以防止在太阳光的宽波长范围内的反射的纳米柱阵列结构。 由具有不同直径的两种类型的纳米柱形成的纳米柱阵列结构21具有由具有直径D1的纳米柱11形成的纳米柱阵列结构的最小反射率点和由纳米柱12形成的纳米柱阵列结构的最小反射率点， 因此，能够防止太阳光的宽波长范围内的反射。

公开(公告)号：US08449783B2

公开(公告)日：2013-05-28

申请号：US13545370

申请日：2012-07-10

申请人： Keiji Watanabe

发明人： Keiji Watanabe

IPC分类号： H01B13/00

CPC分类号： B41J2/1603 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1632 ,  B41J2/1634 ,  B41J2/1635 ,  B41J2/1639 ,  B41J2/1645

摘要： A liquid ejection head substrate is manufactured by forming a wiring pattern on one surface of a substrate, forming an etching mask layer on the other surface of the substrate, forming a positioning reference mark on the etching mask layer by means of a laser, forming an opening pattern groove running through the etching mask layer and having a bottom in the inside of the silicon substrate, using the positioning reference mark, and forming a liquid supply port running through the silicon substrate by etching the silicon substrate from the opening pattern groove to the one surface by means of crystal anisotropic etching.

摘要翻译： 通过在基板的一个表面上形成布线图案，在基板的另一个表面上形成蚀刻掩模层，通过激光在蚀刻掩模层上形成定位参考标记来制造液体喷射头基板，形成 通过蚀刻掩模层延伸的开口图案凹槽，并且使用定位参考标记在硅衬底的内部具有底部，并且通过从开口图案凹槽蚀刻硅衬底而形成穿过硅衬底的液体供给口， 一个表面借助于晶体各向异性蚀刻。

公开(公告)号：US20110151598A1

公开(公告)日：2011-06-23

申请号：US12973708

申请日：2010-12-20

申请人： Hiroyuki Abo ,  Keiji Watanabe ,  Keiji Matsumoto

发明人： Hiroyuki Abo ,  Keiji Watanabe ,  Keiji Matsumoto

IPC分类号： H01L21/302

CPC分类号： B41J2/1603 ,  B41J2/1629

摘要： A method for manufacturing a substrate for liquid-ejecting heads includes etching a surface of a silicon substrate using a first etchant, with a silicon oxide layer as a mask, to form a depression as a part of a liquid supply port, and subsequently etching at least the silicon oxide layer and the thickness sandwiched between the depression and the etched surface of the silicon substrate with a second etchant to form the liquid supply port.

摘要翻译： 一种液体喷射头用基板的制造方法，其特征在于，使用第一蚀刻剂，以氧化硅层作为掩模蚀刻硅基板的表面，形成作为液体供给口的一部分的凹部， 用第二蚀刻剂将硅氧化物层和夹在硅衬底的蚀刻表面之间的厚度最小化，以形成液体供应​​端口。