公开(公告)号：US20050006242A1

公开(公告)日：2005-01-13

申请号：US10615794

申请日：2003-07-10

申请人： Panayotis Andricacos ,  Dean Chung ,  Hariklia Deligianni ,  James Fluegel ,  Keith Kwietniak ,  Peter Locke ,  Darryl Restaino ,  Soon-Cheon Seo ,  Philippe Vereecken ,  Erick Walton

发明人： Panayotis Andricacos ,  Dean Chung ,  Hariklia Deligianni ,  James Fluegel ,  Keith Kwietniak ,  Peter Locke ,  Darryl Restaino ,  Soon-Cheon Seo ,  Philippe Vereecken ,  Erick Walton

IPC分类号： C23C18/16 ,  C25D21/12 ,  C25D21/18

CPC分类号： C23C18/1617 ,  C23C18/1683 ,  C25D21/12 ,  C25D21/18

摘要： An improved method of stabilizing wet chemical baths is disclosed. Typically such baths are used in processes for treating workpieces, for example, plating processes for plating metal onto substrates. In particular, the present invention relates to copper plating baths. More particularly, the present invention relates to the stability of copper plating baths. More particularly, the present invention relates to prevention of void formation by monitoring the accumulation of deleterious by-products in copper plating baths.

摘要翻译： 公开了一种稳定湿化学浴的改进方法。 通常，这种浴用于处理工件的工艺中，例如用于将金属电镀到基底上的电镀工艺。 特别地，本发明涉及镀铜浴。 更具体地说，本发明涉及镀铜浴的稳定性。 更具体地，本发明涉及通过监测铜电镀浴中有害副产物的积累来防止空隙形成。

公开(公告)号：US20060163083A1

公开(公告)日：2006-07-27

申请号：US11038236

申请日：2005-01-21

申请人： Panayotis Andricacos ,  Donald Canaperi ,  Emanuel Cooper ,  John Cotte ,  Hariklia Deligianni ,  Laertis Economikos ,  Daniel Edelstein ,  Silvia Franz ,  Balasubramanian Pranatharthiharan ,  Mahadevaiyer Krishnan ,  Andrew Mansson ,  Erick Walton ,  Alan West ,  Caliopi Andricacos

发明人： Panayotis Andricacos ,  Donald Canaperi ,  Emanuel Cooper ,  John Cotte ,  Hariklia Deligianni ,  Laertis Economikos ,  Daniel Edelstein ,  Silvia Franz ,  Balasubramanian Pranatharthiharan ,  Mahadevaiyer Krishnan ,  Andrew Mansson ,  Erick Walton ,  Alan West ,  Caliopi Andricacos

IPC分类号： B23H3/00

CPC分类号： C25F3/02 ,  B23H5/08 ,  C09G1/04 ,  H01L21/32125

摘要： Methods and compositions for electro-chemical-mechanical polishing (e-CMP) of silicon chip interconnect materials, such as copper, are provided. The methods include the use of compositions according to the invention in combination with pads having various configurations.

摘要翻译： 提供了诸如铜之类的硅芯片互连材料的电化学机械抛光（e-CMP）的方法和组合物。 所述方法包括使用根据本发明的组合物与具有各种构型的垫组合。

公开(公告)号：US20050160575A1

公开(公告)日：2005-07-28

申请号：US10707896

申请日：2004-01-22

申请人： Jeffrey Gambino ,  William Motsiff ,  Erick Walton

发明人： Jeffrey Gambino ,  William Motsiff ,  Erick Walton

IPC分类号： H01F41/04 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/822 ,  H01L23/31 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532 ,  H01L27/04 ,  H01F7/06 ,  H05K3/02

CPC分类号： H01L28/10 ,  H01F41/041 ,  H01L21/76852 ,  H01L21/76885 ,  H01L23/3192 ,  H01L23/5227 ,  H01L23/53238 ,  H01L24/02 ,  H01L2224/0401 ,  H01L2224/13022 ,  H01L2224/13147 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/0105 ,  H01L2924/01055 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  Y10T29/4902 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

摘要： Integration of high performance copper inductors are provided wherein a tall, Cu laminate spiral inductor is formed at the last metal level, and at the last metal+1 level, with the metal levels being interconnected by a bar via having the same spiral shape as the spiral metal inductors at the last metal level and the last metal+1 level. The invention provides methods for integrating the formation of thick inductors with the formation of bond pads, terminals and interconnect wiring with the last metal+1 wiring. The subject invention uses dielectric deposition, spacer formation, and/or selective deposition of a passivating metal such as CoWP, to passivate a Cu inductor that is formed after the last metal layer.

摘要翻译： 提供了高性能铜电感器的集成，其中在最后的金属水平上形成高的Cu层叠螺旋电感器，并且在最后的金属+ 1级上，金属层通过与所述金属层相同的螺旋形状与棒相互连接 螺旋金属电感在最后一个金属水平和最后一个金属+ 1水平。 本发明提供了将厚电感器的形成与最后的金属+ 1布线形成接合焊盘，端子和互连布线的方法。 本发明使用诸如CoWP的钝化金属的电介质沉积，间隔物形成和/或选择性沉积来钝化在最后一个金属层之后形成的Cu电感器。

公开(公告)号：US20050227449A1

公开(公告)日：2005-10-13

申请号：US10709039

申请日：2004-04-08

申请人： William Murphy ,  Edmund Sprogis ,  Anthony Stamper ,  Erick Walton

发明人： William Murphy ,  Edmund Sprogis ,  Anthony Stamper ,  Erick Walton

IPC分类号： H01L21/02 ,  H01L27/08 ,  H01L29/76

CPC分类号： H01L28/20 ,  H01L27/0802 ,  Y10T29/49082 ,  Y10T29/49085

摘要： A method for manufacturing a self-compensating resistor within an integrated circuit is disclosed. The self-compensating resistor includes a first resistor and a second resistor. The first resistor having a first resistance value is initially formed, and then the second resistor having a second resistance value is subsequently formed. The second resistor is connected in series with the first resistor. The second resistance value is less than the first resistance value, but the total resistance value of the first and second resistors lies beyond a desired target resistance range. Finally, an electric current is sent to the second resistor to change the dimension of the second resistor such that the total resistance value of the first and second resistors falls within the desired target resistance range.

摘要翻译： 公开了一种在集成电路内制造自补偿电阻器的方法。 自补偿电阻器包括第一电阻器和第二电阻器。 初始形成具有第一电阻值的第一电阻器，然后形成具有第二电阻值的第二电阻器。 第二个电阻与第一个电阻串联。 第二电阻值小于第一电阻值，但是第一和第二电阻器的总电阻值超过期望的目标电阻范围。 最后，向第二电阻器发送电流以改变第二电阻器的尺寸，使得第一和第二电阻器的总电阻值落在期望的目标电阻范围内。

公开(公告)号：US20050112861A1

公开(公告)日：2005-05-26

申请号：US10722704

申请日：2003-11-25

申请人： John Fitzsimmons ,  Jeffrey Gambino ,  Erick Walton

发明人： John Fitzsimmons ,  Jeffrey Gambino ,  Erick Walton

IPC分类号： H01L21/00 ,  H01L21/44 ,  H01L21/60 ,  H01L23/485

CPC分类号： H01L24/85 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85345 ,  H01L2224/85365 ,  H01L2224/85385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00015

摘要： An intermediate semiconductor structure and method for low-pressure wire bonding that reduces the propensity of dielectric material to mechanical failure due to any wire bonding stresses. Roughened surfaces such as metal pillars or metal dendrites are provided on a bonding pad, bonding wire or both. These roughened surfaces increase reactivity between the bond wire and the bond pad to form strong bonds. This increased activity as a result of the roughened bonding pad and/or wire surfaces reduce the amount of pressure, temperature and energy required for wire bonding, which in turn, avoids damage to the bonding pad as well as the semiconductor substrate.

摘要翻译： 用于低压引线接合的中间半导体结构和方法，其降低由于任何引线键合应力引起的介电材料对机械故障的倾向。 在焊盘，接合线或两者上设置诸如金属柱或金属枝晶的粗化表面。 这些粗糙表面增加了接合线和接合焊盘之间的反应性，以形成强键。 由于粗糙的焊盘和/或线表面的结果，这种增加的活性减少了引线接合所需的压力，温度和能量的量，这进而避免了对焊盘以及半导体衬底的损坏。