公开(公告)号：US09515189B2

公开(公告)日：2016-12-06

申请号：US14879423

申请日：2015-10-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Xianyu Wenxu ,  Woo-young Yang ,  Chang-youl Moon ,  Yong-young Park ,  Jeong-yub Lee

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/16 ,  H01L29/161 ,  H01L29/45 ,  H01L21/02 ,  H01L29/66 ,  H01L29/868

CPC classification number: H01L29/78603 ,  H01L21/02381 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/02672 ,  H01L29/04 ,  H01L29/045 ,  H01L29/16 ,  H01L29/161 ,  H01L29/45 ,  H01L29/458 ,  H01L29/66136 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78672 ,  H01L29/78675 ,  H01L29/78678 ,  H01L29/78684 ,  H01L29/868

Abstract: A method of manufacturing a semiconductor device using a metal oxide includes forming a metal oxide layer on a substrate, forming an amorphous semiconductor layer on the metal oxide layer, and forming a polycrystalline semiconductor layer by crystallizing the amorphous semiconductor layer using the metal oxide layer.

公开(公告)号：US09773802B2

公开(公告)日：2017-09-26

申请号：US15209371

申请日：2016-07-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Xianyu Wenxu ,  Inkyeong Yoo ,  Hojung Kim ,  Seong ho Cho

IPC: H01L29/792 ,  H01L27/1157 ,  H01L21/28 ,  H01L21/02 ,  H01L21/762 ,  H01L21/308 ,  H01L29/08 ,  H01L29/06 ,  G11C11/54 ,  H01L29/68 ,  H01L45/00 ,  H01L29/66 ,  H01L27/105

CPC classification number: H01L27/1157 ,  G11C11/54 ,  G11C11/5685 ,  G11C13/0007 ,  G11C2213/53 ,  G11C2213/79 ,  H01L21/0217 ,  H01L21/02175 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/28282 ,  H01L21/308 ,  H01L21/762 ,  H01L21/76202 ,  H01L21/76224 ,  H01L27/1052 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/66833 ,  H01L29/685 ,  H01L45/00

Abstract: Example embodiments relate to a method of fabricating a synapse memory device capable of being driven at a low voltage and realizing a multi-level memory. The synapse memory device includes a two-transistor structure in which a drain region of a first transistor including a memory layer and a first source region of a second transistor share a source-drain shared area. The synapse memory device is controlled by applying a voltage through the source-drain shared area. The memory layer includes a charge trap layer and a threshold switching layer, and may realize a non-volatile multi-level memory function.

公开(公告)号：US09722068B2

公开(公告)日：2017-08-01

申请号：US15026681

申请日：2014-09-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Xianyu Wenxu ,  Yongsung Kim ,  Changyoul Moon ,  Yongyoung Park ,  Wooyoung Yang ,  Jeongyub Lee ,  Jooho Lee

IPC: H01L29/78 ,  H01L29/45 ,  H01L29/66 ,  H01L29/778 ,  H01L29/06 ,  H01L29/16 ,  H01L21/306 ,  H01L21/3105 ,  H01L29/08 ,  H01L29/10 ,  H01L29/24 ,  H01L29/423 ,  H01L29/47

CPC classification number: H01L29/78 ,  H01L21/30625 ,  H01L21/31051 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/4238 ,  H01L29/45 ,  H01L29/47 ,  H01L29/66045 ,  H01L29/7781

Abstract: Provided are semiconductor devices and methods of manufacturing the same. A semiconductor device may include a source, a drain, a semiconductor element between the source and the drain, and a graphene layer that is provided on the source and the semiconductor element and is spaced apart from the drain. Surfaces of the source and the drain are substantially co-planar with a surface of the semiconductor element. The semiconductor element may be spaced apart from the source and may contact the drain. The graphene layer may have a planar structure. A gate insulating layer and a gate may be provided on the graphene layer. The semiconductor device may be a transistor. The semiconductor device may have a barristor structure. The semiconductor device may be a planar type graphene barristor.

公开(公告)号：US09029860B2

公开(公告)日：2015-05-12

申请号：US13848281

申请日：2013-03-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Xianyu Wenxu ,  Yeon-hee Kim ,  Chang-youl Moon ,  Yong-young Park

IPC: H01L29/00 ,  H01L21/02 ,  H01L29/20

CPC classification number: H01L21/0254 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/02658 ,  H01L21/02667 ,  H01L21/30604 ,  H01L21/3081 ,  H01L29/2003

Abstract: A structure includes a silicon substrate, a plurality of silicon rods on the silicon substrate, a silicon layer on the plurality of silicon rods, and a GaN substrate on the silicon layer.

Abstract translation: 一种结构包括硅衬底，硅衬底上的多个硅棒，多个硅棒上的硅层，以及硅层上的GaN衬底。

公开(公告)号：US09337029B2

公开(公告)日：2016-05-10

申请号：US14682820

申请日：2015-04-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Xianyu Wenxu ,  Yeon-hee Kim ,  Chang-youl Moon ,  Yong-young Park

IPC: H01L21/302 ,  H01L21/02 ,  H01L29/20 ,  H01L21/306 ,  H01L21/308

CPC classification number: H01L21/0254 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/02658 ,  H01L21/02667 ,  H01L21/30604 ,  H01L21/3081 ,  H01L29/2003

Abstract: A structure includes a silicon substrate, a plurality of silicon rods on the silicon substrate, a silicon layer on the plurality of silicon rods, and a GaN substrate on the silicon layer.

公开(公告)号：US10815569B2

公开(公告)日：2020-10-27

申请号：US15014568

申请日：2016-02-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Xianyu Wenxu ,  Yongsung Kim ,  Jaikwang Shin ,  Wooyoung Yang

IPC: C23C16/455 ,  C23C16/44 ,  C40B60/00

Abstract: A shower head of a combinatorial spatial atomic layer deposition (CS-ALD) apparatus may be provided. The shower head of the CS-ALD apparatus may include a plurality of shower blocks. Each of shower blocks may include a plurality of unit modules. Each of the shower blocks and each of the unit modules may be controlled independently from each other. Each of the plurality of unit modules may include a source gas injection nozzle, a purge gas injection nozzle, a reactant gas injection nozzle, and exhaust areas between the injection nozzles. The plurality of shower blocks may be separated from each other. Gas injection areas of the injection nozzles may be separated from the exhaust area.

公开(公告)号：US10541178B2

公开(公告)日：2020-01-21

申请号：US15635990

申请日：2017-06-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Xianyu Wenxu ,  Yongyoung Park ,  Kideok Bae ,  Wooyoung Yang ,  Changseung Lee

IPC: H01L21/66 ,  H01L51/00 ,  H01L51/52 ,  H01L21/67

Abstract: A method of evaluating the quality of a thin film layer may include: forming the thin film layer on a substrate; applying a stress to the thin film layer; and evaluating the quality of the thin film layer. A device for evaluating the quality of the thin film layer may include a stress chamber for applying a stress to the thin film layer and a refractive index measuring unit for evaluating the quality of the thin film layer based on a rate of change of a refractive index.

公开(公告)号：US09184052B2

公开(公告)日：2015-11-10

申请号：US13949588

申请日：2013-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Xianyu Wenxu ,  Woo-young Yang ,  Chang-youl Moon ,  Yong-young Park ,  Jeong-yub Lee

IPC: H01L21/02 ,  H01L29/04 ,  H01L29/45 ,  H01L29/66 ,  H01L29/786 ,  H01L29/868

CPC classification number: H01L29/78603 ,  H01L21/02381 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/02672 ,  H01L29/04 ,  H01L29/045 ,  H01L29/16 ,  H01L29/161 ,  H01L29/45 ,  H01L29/458 ,  H01L29/66136 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78672 ,  H01L29/78675 ,  H01L29/78678 ,  H01L29/78684 ,  H01L29/868

Abstract: A method of manufacturing a semiconductor device using a metal oxide includes forming a metal oxide layer on a substrate, forming an amorphous semiconductor layer on the metal oxide layer, and forming a polycrystalline semiconductor layer by crystallizing the amorphous semiconductor layer using the metal oxide layer.

Abstract translation: 使用金属氧化物的半导体器件的制造方法包括在基板上形成金属氧化物层，在金属氧化物层上形成非晶质半导体层，通过使用金属氧化物层使非晶半导体层结晶而形成多晶半导体层。

公开(公告)号：US09056424B2

公开(公告)日：2015-06-16

申请号：US13918066

申请日：2013-06-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Xianyu Wenxu ,  Jeong-yub Lee ,  Chang-youl Moon ,  Yong-young Park ,  Woo-young Yang ,  Yong-sung Kim ,  Joo-ho Lee

IPC: B44C1/17 ,  B29C65/16 ,  B32B37/26 ,  B32B38/10 ,  B32B43/00 ,  B29C67/24 ,  H01L51/00 ,  H01L51/10 ,  H01L51/44

CPC classification number: B29C67/24 ,  H01L51/0023 ,  H01L51/0045 ,  H01L51/102 ,  H01L51/442 ,  Y02E10/549 ,  Y02P70/521

Abstract: A method of transferring graphene includes forming a sacrificial layer and a graphene layer sequentially on a first substrate, bonding the graphene layer to a target layer, and removing the sacrificial layer using a laser and separating the first substrate from the graphene layer.

Abstract translation: 转移石墨烯的方法包括在第一基板上顺序地形成牺牲层和石墨烯层，将石墨烯层粘合到目标层，以及使用激光去除牺牲层并将第一基板与石墨烯层分离。