Three layer aluminum deposition process for high aspect ratio CL contacts
    1.
    发明授权
    Three layer aluminum deposition process for high aspect ratio CL contacts 失效
    三层铝沉积工艺,用于高纵横比CL接触

    公开(公告)号:US06794282B2

    公开(公告)日:2004-09-21

    申请号:US10305063

    申请日:2002-11-27

    IPC分类号: H01L2144

    CPC分类号: H01L27/10888 H01L21/76882

    摘要: A method of forming a semiconductor device includes providing a semiconductor device including a conductor formed thereon. A dielectric layer is formed over the conductor and a recess is formed in the dielectric layer by removing a portion of the dielectric layer to expose at least a portion of the conductor. A first layer of aluminum is deposited over the top surface of the dielectric, along the sidewalls of the dielectric layer and over the exposed portion of the conductor without altering the temperature of the semiconductor device. A second layer of aluminum is deposited over the first layer of aluminum at a temperature greater than about 300° C. A third layer of aluminum is deposited over the second layer of aluminum so as to completely fill the recess in the dielectric layer. The third layer of aluminum is slow deposited at a temperature greater than about 300° C.

    摘要翻译: 形成半导体器件的方法包括提供包括形成在其上的导体的半导体器件。 在导体上形成电介质层,并且通过去除电介质层的一部分以露出导体的至少一部分,在电介质层中形成凹陷。 沿着电介质层的侧壁并在导体的暴露部分之上沉积在电介质的顶表面上的第一层铝,而不改变半导体器件的温度。 在大于约300℃的温度下,在第一层铝上沉积第二层铝。第三层铝沉积在第二层铝上,以便完全填充介电层中的凹槽。 第三层铝在大于约300℃的温度下缓慢沉积

    Integration scheme for metal gap fill, with fixed abrasive CMP
    4.
    发明授权
    Integration scheme for metal gap fill, with fixed abrasive CMP 有权
    金属间隙填充的集成方案,固定磨料CMP

    公开(公告)号:US06943114B2

    公开(公告)日:2005-09-13

    申请号:US10084194

    申请日:2002-02-28

    CPC分类号: H01L21/31053 Y10S438/959

    摘要: In a method of planarizing a semiconductor wafer, the improvement comprising polishing above metal interconnect lines to uniformly polish the topography of the wafer to a predetermined endpoint on the wafer sufficiently close above the metal interconnect lines, yet far enough away from the lines to prevent damage to the lines, comprising:a) filling gaps between metal interconnect lines of an inter metal dielectric in a wafer being formed, by depositing HDP fill on top of the metal interconnects, between the metal interconnects, and on the surface of a dielectric layer between the metal interconnects to create an HDP overfill;b) contacting the surface of HDP overfill of the processed semiconductor wafer from step a) with a fixed abrasive polishing pad; andc) relatively moving the wafer and the fixed abrasive polishing pad to affect a polishing rate sufficient to reach a predetermined endpoint and uniformly planar surface on the wafer sufficiently close above the metal interconnect lines and yet far enough away from the lines to prevent damage to the lines.

    摘要翻译: 在平坦化半导体晶片的方法中,改进包括在金属互连线上方抛光,以将晶片的形貌均匀地抛光到晶片上的预定端点上,该晶圆足够靠近金属互连线上方,远离线路远离线以防止损坏 包括:a)通过在金属互连件的顶部,金属互连件之间以及电介质层的表面上沉积HDP填充物,填充在形成的晶片之间的金属互连线之间的间隙, 金属互连以产生HDP溢出; b)使来自步骤a)的经处理的半导体晶片的HDP的填充表面与固定的研磨抛光垫接触; 以及c)相对移动所述晶片和所述固定研磨抛光垫以影响足以达到所述晶片上的预定端点和所述晶片上的均匀平坦表面的抛光速率,所述平坦表面足够靠近所述金属互连线,并且远离所述线远离所述线,以防止损坏 线条。

    Semiconductor Component with Coreless Transformer
    7.
    发明申请
    Semiconductor Component with Coreless Transformer 有权
    无芯变压器半导体元件

    公开(公告)号:US20130278372A1

    公开(公告)日:2013-10-24

    申请号:US13452075

    申请日:2012-04-20

    IPC分类号: H01F5/00

    摘要: A semiconductor component has integrated a coreless transformer with a first connection contact, a second connection contact, an electrically conductive spiral first coil, an electrically conductive first ring, and an electrically conductive second ring. The electrically conductive spiral first coil is electrically connected between the first connection contact and the second connection contact. The electrically conductive first ring surrounds the first coil and one or both of the first connection contact and the second connection contact. The electrically conductive second ring is arranged between the first coil and the first ring, electrically connected to the first coil, and surrounds the first coil and one or both of the first connection contact and the second connection contact.

    摘要翻译: 半导体部件集成了无芯变压器与第一连接触点,第二连接触点,导电螺旋第一线圈,导电第一环和导电第二环。 导电螺旋第一线圈电连接在第一连接触点和第二连接触点之间。 导电的第一环围绕第一线圈和第一连接触点和第二连接触点中的一个或两个。 导电的第二环被布置在第一线圈和第一环之间,电连接到第一线圈,并且包围第一线圈以及第一连接触点和第二连接触点中的一个或两者。

    Semiconductor component with coreless transformer
    10.
    发明授权
    Semiconductor component with coreless transformer 有权
    具有无芯变压器的半导体元件

    公开(公告)号:US08665054B2

    公开(公告)日:2014-03-04

    申请号:US13452075

    申请日:2012-04-20

    IPC分类号: H01F5/00 H01L27/08

    摘要: A semiconductor component has integrated a coreless transformer with a first connection contact, a second connection contact, an electrically conductive spiral first coil, an electrically conductive first ring, and an electrically conductive second ring. The electrically conductive spiral first coil is electrically connected between the first connection contact and the second connection contact. The electrically conductive first ring surrounds the first coil and one or both of the first connection contact and the second connection contact. The electrically conductive second ring is arranged between the first coil and the first ring, electrically connected to the first coil, and surrounds the first coil and one or both of the first connection contact and the second connection contact.

    摘要翻译: 半导体部件集成了无芯变压器与第一连接触点,第二连接触点,导电螺旋第一线圈,导电第一环和导电第二环。 导电螺旋第一线圈电连接在第一连接触点和第二连接触点之间。 导电的第一环围绕第一线圈和第一连接触点和第二连接触点中的一个或两个。 导电的第二环被布置在第一线圈和第一环之间,电连接到第一线圈,并且包围第一线圈以及第一连接触点和第二连接触点中的一个或两者。