公开(公告)号：US09666573B1

公开(公告)日：2017-05-30

申请号：US15335259

申请日：2016-10-26

申请人： Micron Technology, Inc.

发明人： Mitsunari Sukekawa

IPC分类号： H01L21/00 ,  H01L25/00 ,  H01L23/00 ,  H01L21/768 ,  H01L25/065

CPC分类号： H01L25/50 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/13 ,  H01L24/73 ,  H01L24/80 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0231 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/04 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05176 ,  H01L2224/05184 ,  H01L2224/05546 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/05688 ,  H01L2224/08145 ,  H01L2224/13017 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/73251 ,  H01L2224/80013 ,  H01L2224/80203 ,  H01L2224/80801 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/80907 ,  H01L2224/92 ,  H01L2224/9211 ,  H01L2224/9222 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/05442 ,  H01L2924/00014 ,  H01L2224/08 ,  H01L2224/80 ,  H01L2924/00012 ,  H01L2924/047 ,  H01L2924/049 ,  H01L2924/045 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01078 ,  H01L2924/05042 ,  H01L2924/014 ,  H01L2224/03 ,  H01L21/304 ,  H01L2224/11 ,  H01L2224/13

摘要： Some embodiments include a method of forming integrated circuitry. A first assembly is formed to have a first dielectric material, a first conductive pad and a conductive structure. The first assembly has a first surface which includes a surface of the first dielectric material, a surface of the first conductive pad and a surface of the conductive structure. A second assembly is formed to have a second dielectric material and a second conductive pad. The second assembly has a second surface which includes a surface of the second dielectric material and a surface of the second conductive pad. The first surface is placed directly against the second surface. The surface of the first dielectric material is bonded with the surface of the second dielectric material, and the surface of the first conductive pad is bonded with the surface of the second conductive pad.

公开(公告)号：US20150171050A1

公开(公告)日：2015-06-18

申请号：US14133328

申请日：2013-12-18

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Sheng-Chau Chen ,  Shih Pei Chou ,  Yen-Chang Chu ,  Cheng-Hsien Chou ,  Chih-Hui Huang ,  Yeur-Luen Tu

IPC分类号： H01L23/00 ,  H01L27/146 ,  H01L21/48 ,  H01L21/324 ,  H01L21/02

CPC分类号： H01L24/08 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/324 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/80 ,  H01L25/0657 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/1469 ,  H01L2224/02321 ,  H01L2224/0235 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03614 ,  H01L2224/03845 ,  H01L2224/039 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08057 ,  H01L2224/08145 ,  H01L2224/08147 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80121 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/80948 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/04642

摘要： A method embodiment includes patterning an opening through a layer at a surface of a device die. The method further includes forming a liner on sidewalls of the opening, patterning the device die to extend the opening further into the device die. After patterning the device die, the liner is removed. A conductive pad is formed in the device die by filling the opening with a conductive material.

摘要翻译： 一种方法实施例包括通过在器件裸片表面的层图案化开口。 所述方法还包括在所述开口的侧壁上形成衬垫，使所述器件裸片图形化以将所述开口进一步延伸到所述器件裸片中。 在将器件模具图案化之后，将衬垫移除。 通过用导电材料填充开口，在器件裸片中形成导电焊盘。

公开(公告)号：US11810891B2

公开(公告)日：2023-11-07

申请号：US17189324

申请日：2021-03-02

申请人： ADVANCED MICRO DEVICES, INC.

发明人： Priyal Shah ,  Milind S. Bhagavat

IPC分类号： H01L23/00

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L2224/0384 ,  H01L2224/05082 ,  H01L2224/05118 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05557 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0603 ,  H01L2224/0614 ,  H01L2224/06515 ,  H01L2224/08146 ,  H01L2224/8034 ,  H01L2224/8089 ,  H01L2224/80801 ,  H01L2224/80906

摘要： Various chip stacks and methods and structures of interconnecting the same are disclosed. In one aspect, an apparatus is provided that includes a first semiconductor chip that has a first glass layer and plural first groups of plural conductor pads in the first glass layer. Each of the plural first groups of conductor pads is configured to bumplessly connect to a corresponding second group of plural conductor pads of a second semiconductor chip to make up a first interconnect of a plurality interconnects that connect the first semiconductor chip to the second semiconductor chip. The first glass layer is configured to bond to a second glass layer of the second semiconductor chip.

公开(公告)号：US09842816B2

公开(公告)日：2017-12-12

申请号：US15228947

申请日：2016-08-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sheng-Chau Chen ,  Shih Pei Chou ,  Yen-Chang Chu ,  Cheng-Hsien Chou ,  Chih-Hui Huang ,  Yeur-Luen Tu

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/00 ,  H01L21/324 ,  H01L27/146 ,  H01L21/311 ,  H01L21/321 ,  H01L25/065

CPC分类号： H01L24/08 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/324 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/80 ,  H01L25/0657 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/1469 ,  H01L2224/02321 ,  H01L2224/0235 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03614 ,  H01L2224/03845 ,  H01L2224/039 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08057 ,  H01L2224/08145 ,  H01L2224/08147 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80121 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/80948 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/04642

摘要： A representative device includes a patterned opening through a layer at a surface of a device die. A liner is disposed on sidewalls of the opening and the device die is patterned to extend the opening further into the device die. After patterning, the liner is removed. A conductive pad is formed in the device die by filling the opening with a conductive material.

公开(公告)号：US20160343679A1

公开(公告)日：2016-11-24

申请号：US15228947

申请日：2016-08-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sheng-Chau Chen ,  Shih Pei Chou ,  Yen-Chang Chu ,  Cheng-Hsien Chou ,  Chih-Hui Huang ,  Yeur-Luen Tu

IPC分类号： H01L23/00 ,  H01L25/065

CPC分类号： H01L24/08 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/324 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/80 ,  H01L25/0657 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/1469 ,  H01L2224/02321 ,  H01L2224/0235 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03614 ,  H01L2224/03845 ,  H01L2224/039 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08057 ,  H01L2224/08145 ,  H01L2224/08147 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80121 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/80948 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/04642

摘要： A representative device includes a patterned opening through a layer at a surface of a device die. A liner is disposed on sidewalls of the opening and the device die is patterned to extend the opening further into the device die. After patterning, the liner is removed. A conductive pad is formed in the device die by filling the opening with a conductive material.

摘要翻译： 代表性装置包括穿过器件裸片表面的层的图案化开口。 衬套设置在开口的侧壁上，并且将器件模具图案化以将开口进一步延伸到器件裸片中。 在图案化之后，衬里被去除。 通过用导电材料填充开口，在器件裸片中形成导电焊盘。

公开(公告)号：US09437572B2

公开(公告)日：2016-09-06

申请号：US14133328

申请日：2013-12-18

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sheng-Chau Chen ,  Shih Pei Chou ,  Yen-Chang Chu ,  Cheng-Hsien Chou ,  Chih-Hui Huang ,  Yeur-Luen Tu

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/00 ,  H01L21/324 ,  H01L27/146 ,  H01L21/311 ,  H01L21/321

CPC分类号： H01L24/08 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/324 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/80 ,  H01L25/0657 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/1469 ,  H01L2224/02321 ,  H01L2224/0235 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03614 ,  H01L2224/03845 ,  H01L2224/039 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08057 ,  H01L2224/08145 ,  H01L2224/08147 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80121 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/80948 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/04642

摘要： A method embodiment includes patterning an opening through a layer at a surface of a device die. The method further includes forming a liner on sidewalls of the opening, patterning the device die to extend the opening further into the device die. After patterning the device die, the liner is removed. A conductive pad is formed in the device die by filling the opening with a conductive material.

摘要翻译： 一种方法实施例包括通过在器件裸片表面的层图案化开口。 所述方法还包括在所述开口的侧壁上形成衬垫，使所述器件裸片图形化以将所述开口进一步延伸到所述器件裸片中。 在将器件模具图案化之后，将衬垫移除。 通过用导电材料填充开口，在器件裸片中形成导电焊盘。

公开(公告)号：US20150097022A1

公开(公告)日：2015-04-09

申请号：US14504701

申请日：2014-10-02

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

发明人： Lea DI CIOCCIO ,  Yann BEILLIARD

IPC分类号： B23K20/00 ,  H05K3/46 ,  H01L21/18 ,  B23K20/24 ,  B23K31/02

CPC分类号： B23K20/002 ,  B23K20/24 ,  B23K31/02 ,  B23K2101/36 ,  H01L21/187 ,  H01L24/05 ,  H01L24/06 ,  H01L24/74 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05009 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05693 ,  H01L2224/06505 ,  H01L2224/06517 ,  H01L2224/08145 ,  H01L2224/75754 ,  H01L2224/80035 ,  H01L2224/80097 ,  H01L2224/80136 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/80935 ,  H01L2224/80948 ,  H01L2224/80986 ,  H01L2224/95 ,  H01L2225/06513 ,  H05K3/4611 ,  H01L2924/00012 ,  H01L2924/05442 ,  H01L2924/00014 ,  H01L2224/80001

摘要： Method of assembly of a first element (I) and a second element (II) each having an assembly surface, at least one of the assembly surfaces comprising recessed metal portions (6, 106) surrounded by dielectric materials (4, 104) comprising: A) a step to bring the two assembly surfaces into contact without application of pressure such that direct bonding is obtained between the assembly surfaces, said first and second assemblies (I, II) forming a stack with a given thickness (e), B) a heat treatment step of said stack during which the back faces (10, 110) of the first (I) and the second (II) elements are held in position so that they are held at a fixed distance (E) between the given stack thickness+/−2 nm.

摘要翻译： 第一元件（I）和第二元件（II）的组装方法，每个元件（I）和第二元件（II）均具有组件表面，所述组装表面中的至少一个包括由电介质材料（4,104）包围的凹入的金属部分（6,106），包括： A）在不施加压力的情况下使两个组装表面接触的步骤，使得在组装表面之间获得直接接合，所述第一和第二组件（I，II）形成具有给定厚度（e）的叠层，B） 所述堆叠的热处理步骤，其中第一（I）和第二（II）元件的背面（10,110）保持在适当位置，使得它们被保持在给定叠层之间的固定距离（E） 厚度+/- 2nm。

公开(公告)号：US20240304593A1

公开(公告)日：2024-09-12

申请号：US18179126

申请日：2023-03-06

申请人： ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/80 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/08145 ,  H01L2224/80009 ,  H01L2224/80013 ,  H01L2224/80357 ,  H01L2224/80379 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06565 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/04642 ,  H01L2924/0504 ,  H01L2924/0544 ,  H01L2924/05494 ,  H01L2924/059

摘要： Disclosed herein are processes and methods for direct bonding. In some embodiments, the process includes providing an element having a dielectric bonding surface and one or more conductive features exposed at the dielectric bonding surface, where the dielectric bonding surface has a planarity suitable for direct bonding. The process also includes, after providing the element, exposing the dielectric bonding surface to the products of a water vapor plasma prior to direct bonding the element.

公开(公告)号：US20240222315A1

公开(公告)日：2024-07-04

申请号：US18148332

申请日：2022-12-29

申请人： ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/00

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/94 ,  H01L2224/0345 ,  H01L2224/03614 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/8002 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/94 ,  H01L2924/04941

摘要： An element, a bonded structure including the element, and a method of forming the same are disclosed. The bonded structure can include a first element having a first nonconductive field region and a first conductive feature. A surface of the first nonconductive field region and a surface of the first conductive feature at least partially defining a bonding surface of the first element. The first conductive feature includes a first portion and a second portion over the first portion and at least partially defines the surface of the first conductive feature. The first portion includes aluminum. The first conductive feature has a continuous sidewall along the first portion and the second portion. The second portion includes different metal composition from the first portion or comprising fluorine at the surface of the first conductive feature. The bonded structure can include a second element having a second nonconductive field region and a second conductive feature. A surface of the second nonconductive field region is directly bonded to the first nonconductive field region without an intervening adhesive along a bond interface and a surface of the second conductive feature is directly bonded to the second conductive feature without an intervening adhesive along the bond interface.

公开(公告)号：US20180068965A1

公开(公告)日：2018-03-08

申请号：US15800491

申请日：2017-11-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sheng-Chau Chen ,  Shih Pei Chou ,  Yen-Chang Chu ,  Cheng-Hsien Chou ,  Chih-Hui Huang ,  Yeur-Luen Tu

IPC分类号： H01L23/00 ,  H01L21/321 ,  H01L21/324 ,  H01L21/311 ,  H01L25/065 ,  H01L27/146

CPC分类号： H01L24/08 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/324 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/80 ,  H01L25/0657 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/1469 ,  H01L2224/02321 ,  H01L2224/0235 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03614 ,  H01L2224/03845 ,  H01L2224/039 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08057 ,  H01L2224/08145 ,  H01L2224/08147 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80121 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80906 ,  H01L2224/80948 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/04642

摘要： A representative device includes a patterned opening through a layer at a surface of a device die. A liner is disposed on sidewalls of the opening and the device die is patterned to extend the opening further into the device die. After patterning, the liner is removed. A conductive pad is formed in the device die by filling the opening with a conductive material.