公开(公告)号：EP2445000A2

公开(公告)日：2012-04-25

申请号：EP11290473.5

申请日：2011-10-13

申请人： Soitec

发明人： Landru, Didier

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L25/065

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/80 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0332 ,  H01L2224/034 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03616 ,  H01L2224/05006 ,  H01L2224/05082 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05187 ,  H01L2224/05546 ,  H01L2224/05547 ,  H01L2224/05576 ,  H01L2224/05578 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05681 ,  H01L2224/05687 ,  H01L2224/08121 ,  H01L2224/80203 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2225/06513 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/04941 ,  H01L2924/00

摘要： The present invention relates to a process for realizing a connecting structure (2200) in a semiconductor substrate (1000), and the semiconductor substrate realized accordingly. The process of the present invention, the semiconductor substrate (1000) having at least a first surface, and being foreseen for a 3D integration with a second substrate (1700) along the first surface, wherein the 3D integration is subject to a lateral misalignment in at least one dimension having a misalignment value, can include the step of growing a diffusion barrier structure (2211) for preventing diffusion of elements out of a conductive layer into the rest of the semiconductor substrate, is characterized in that a first end surface, being the most outward surface of the diffusion barrier structure (2211) being substantially parallel to the first surface, along a direction perpendicular to the first surface and going from the substrate toward the first surface, of the diffusion barrier structure (2211) can have a length, in the direction of the lateral misalignment, the length being dependent on the misalignment value, wherein the length of the diffusion barrier structure (2211) is chosen such that in a 3D integrated structure a diffusion of elements out of a conductive layer of the second substrate (1700) is prevented in the integrated state.

摘要翻译： 本发明涉及一种在半导体衬底（1000）中实现连接结构（2200）的方法，并且相应地实现了半导体衬底。 本发明的方法，半导体衬底（1000）具有至少第一表面，并且被预见用于沿着第一表面与第二衬底（3D）进行3D集成，其中3D集成受到横向错位 具有不对准值的至少一个维度可以包括生长用于防止元件从导电层扩散到半导体衬底的其余部分中的扩散阻挡结构（2211）的步骤，其特征在于，第一端面是 扩散阻挡结构（2211）的最外侧表面基本上平行于第一表面沿着垂直于第一表面的方向并且从衬底朝着第一表面延伸，扩散阻挡结构（2211）可以具有长度 在横向偏移的方向上，长度取决于不对准值，其中扩散阻挡结构（2211）i的长度 被选择为使得在3D集成结构中，在整合状态下防止元件从第二基板（1700）的导电层的扩散。

公开(公告)号：EP2414801A1

公开(公告)日：2012-02-08

申请号：EP10759186.9

申请日：2010-03-11

申请人： Megica Corporation

发明人： LIN, Mou-Shiung ,  LEE, Jin-Yuan ,  LO, Hsin-Jung ,  YANG, Ping-Jung ,  LIU, Te-Sheng

IPC分类号： G01L7/00 ,  G06F19/00

CPC分类号： G06F1/16 ,  G11C5/147 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/60 ,  H01L23/66 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/50 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6666 ,  H01L2224/02166 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02321 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/0237 ,  H01L2224/02371 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/0556 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/11 ,  H01L2224/11009 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/1191 ,  H01L2224/13 ,  H01L2224/13006 ,  H01L2224/1302 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13609 ,  H01L2224/1403 ,  H01L2224/1411 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/32105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48111 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48764 ,  H01L2224/48769 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/4911 ,  H01L2224/49175 ,  H01L2224/4918 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/81895 ,  H01L2224/81903 ,  H01L2224/83101 ,  H01L2224/83104 ,  H01L2224/83851 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/92125 ,  H01L2224/92127 ,  H01L2224/92147 ,  H01L2224/92225 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01059 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2224/48744 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/0361 ,  H01L2924/0665 ,  H01L2224/81 ,  H01L2224/83 ,  H01L24/78 ,  H01L2224/85 ,  H01L21/56 ,  H01L21/78 ,  H01L2924/0635 ,  H01L2924/07025 ,  H01L21/304 ,  H01L21/76898 ,  H01L2224/0231

摘要： Integrated circuit chips and chip packages are disclosed that include an over-passivation scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the integrated circuit chip using a top post-passivation technology and a bottom structure technology. The integrated circuit chips can be connected to an external circuit or structure, such as ball-grid-array (BGA) substrate, printed circuit board, semiconductor chip, metal substrate, glass substrate or ceramic substrate, through the over-passivation scheme or the bottom scheme. Related fabrication techniques are described.

公开(公告)号：EP1818987B1

公开(公告)日：2011-12-07

申请号：EP07102058.0

申请日：2007-02-09

申请人： ELMOS Semiconductor AG

发明人： Rost, Wolfgang

IPC分类号： H01L25/065 ,  H01L21/98 ,  H01L21/60 ,  H01L21/00

CPC分类号： H01L25/074 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L25/167 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/32057 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/12043 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/00

公开(公告)号：EP1022776B1

公开(公告)日：2008-08-13

申请号：EP00300208.6

申请日：2000-01-13

申请人： Lucent Technologies Inc.

发明人： Chittipeddi, Sailesh ,  Merchant, Sailesh Mansinh

IPC分类号： H01L21/603

CPC分类号： H01L24/85 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48699 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01043 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00015 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2924/01004

公开(公告)号：EP1920459A1

公开(公告)日：2008-05-14

申请号：EP06768415.9

申请日：2006-07-27

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： TAKAHASHI, Hidekazu c/o SEMICONDUCTOR ENERGY LABORATORY CO., LTD. ,  SUGIYAMA, Eiji c/oc/o SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

IPC分类号： H01L21/768 ,  G06K19/07 ,  G06K19/077 ,  H01L21/3205 ,  H01L21/60 ,  H01L23/12 ,  H01L23/52 ,  H01L27/12

CPC分类号： H01L21/84 ,  H01L21/6835 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/13 ,  H01L2221/6835 ,  H01L2221/68368 ,  H01L2221/68386 ,  H01L2223/6677 ,  H01L2224/0332 ,  H01L2224/0355 ,  H01L2224/0391 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05116 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/0517 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05173 ,  H01L2224/05178 ,  H01L2224/05179 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05188 ,  H01L2224/05339 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/32225 ,  H01L2224/83 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01054 ,  H01L2924/01058 ,  H01L2924/0106 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/07802 ,  H01L2924/12044 ,  H01L2924/13069 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device of the present invention is provided including the steps of forming a first conductive layer over a substrate; forming a second conductive layer containing a conductive particle and resin over the first conductive layer; and increasing an area where the first conductive layer and the second conductive layer are in contact with each other by irradiating the second conductive layer with a laser beam. By including the step of laser beam irradiation, the portion where the first conductive layer and the second conductive layer are in contact with each other can be increased and defective electrical connection between the first conductive layer and the second conductive layer can be improved.

公开(公告)号：EP1665359A2

公开(公告)日：2006-06-07

申请号：EP04757066.8

申请日：2004-07-16

申请人： Freescale Semiconductor, Inc.

发明人： ROCHE, Thomas, S. ,  ASCHIERI, Paule, C.

IPC分类号： H01L21/44

CPC分类号： H01L21/32139 ,  H01L21/32134 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2924/04953 ,  H01L2924/00014

摘要： A top-most layer (64) is formed over a bond pad layer (62) and under a passivation layer (68) and a polyimide layer (72). Openings (70 and 74) are formed within the passivation layer (68) and the polyimide layer (72) to expose the top-most layer (64), which protects the bond pad layer (62) during the formation of the openings (70 and 74). In one embodiment, the exposed top-most layer (64) is selectively etched using hydrogen peroxide and an amine, such as ammonium hydroxide. Because the chemistry does not attack the bond pad layer (62), the bond pad layer's thickness is not decreased and thus, reliability of the bond pad is maintained.

公开(公告)号：EP1500140A1

公开(公告)日：2005-01-26

申请号：EP03722222.1

申请日：2003-03-17

申请人： Infineon Technologies AG

发明人： BARTH, Hans-Joachim ,  HOLZ, Jürgen

IPC分类号： H01L23/522

CPC分类号： H01L24/05 ,  H01L23/5223 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/01327 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/0496 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00

摘要： The invention concerns an integrated circuit and methods for making same. The invention is characterized in that it consists in depositing an intermediate layer (16) of dielectric material between two metal layers (102, 104). Said intermediate layer (160) is formed such that the capacitance operating at the surface between the metal layers (102, 104) is greater than 0.5 fF/ν2, for instance the intermediate layer has a relative permittivity ranging between 4 and 30, and a thickness ranging between 200 nm and 100 nm.

公开(公告)号：EP1399966B1

公开(公告)日：2004-12-08

申请号：EP02744379.5

申请日：2002-06-17

申请人： Infineon Technologies AG

发明人： FRIESE, Gerald

IPC分类号： H01L23/58 ,  H01L23/485

CPC分类号： H01L24/05 ,  H01L22/32 ,  H01L24/11 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05558 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/85801 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/04941

摘要： A structure for a bond pad used on a semiconductor device, in accordance with the present invention, includes a metal layer, an interconnect formed through a dielectric layer connecting to the metal layer and a bond pad having a first portion disposed over the metal layer and the interconnect, and a second portion disposed over the dielectric layer. The first portion includes a bond area for providing an attachment point for a connection, and the second portion includes a probe area for providing contact with a probe.

公开(公告)号：EP1353377A2

公开(公告)日：2003-10-15

申请号：EP03008028.7

申请日：2003-04-11

申请人： NEC Compound Semiconductor Devices, Ltd.

发明人： Kurihara, Toshimichi ,  Kawabata, Takahiro ,  Tode, Tetsu ,  Tsubaki, Shigeki

IPC分类号： H01L23/485

CPC分类号： H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10253 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2224/45147 ,  H01L2924/00 ,  H01L2924/00015

摘要： In a semiconductor device having a semiconductor substrate, an internal electrode layer is formed on the semiconductor substrate. A barrier metal layer is formed on the internal electrode. An external electrode layer is formed on the barrier metal layer. A pad electrode is made of the internal electrode layer, the barrier metal layer, and the external electrode layer. A wire is electrically connected to the pad electrode. An area of the external electrode layer is set midway between an area of a polymerization portion of the wire on the pad electrode and a planar area of the barrier metal layer.

公开(公告)号：EP1281202A1

公开(公告)日：2003-02-05

申请号：EP01938190.4

申请日：2001-05-07

申请人： Infineon Technologies AG

发明人： HELNEDER, Johann ,  KOLLER, Klaus ,  SCHRENK, Michael ,  SEIDEL, Uwe ,  KOERNER, Heinrich ,  MITCHEL, Andrea, Maria ,  SCHWERD, Markus

IPC分类号： H01L23/485

CPC分类号： H01L24/05 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05093 ,  H01L2224/05095 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/0496 ,  H01L2924/05042 ,  H01L2924/01007 ,  H01L2224/45099

摘要： The invention relates to a contact connector which forms an electrical contact between the wiring and the connecting wires on the semiconductor component. According to the invention, the contact connector has the advantage that, even when the second electrical conducting element is damaged during the bonding or the application of measuring needles, this does not lead to damage to the first electrical conducting element, due to the fact that the vertical projection of the bonding surface on the first insulation, in which the first electrical conducting element is embedded, is arranged next to the first electrical conducting element and thus the first electrical conducting element is not cut as the pressure of the measuring needles or the pressure occurring during the bonding process is taken by the first insulation.