公开(公告)号：JPWO2010125818A1

公开(公告)日：2012-10-25

申请号：JP2011511320

申请日：2010-04-28

Applicant: 凸版印刷株式会社

Inventor： 寛佳 後藤 ,  寛佳 後藤

IPC: G06K19/077 ,  G06K19/07

CPC classification number: G06K19/07783 ,  G06K19/07754 ,  H05K3/4038 ,  H05K3/4084 ,  H05K2201/0129 ,  H05K2201/0355 ,  H05K2201/0379 ,  H05K2201/0382 ,  H05K2201/0394 ,  H05K2201/10098 ,  H05K2203/0195 ,  H05K2203/107 ,  Y10T29/49016 ,  Y10T29/49018

Abstract: アンテナシートの製造方法は、熱可塑性樹脂を形成材料とする基板の一方の面に設けられ金属材料を形成材料とするアンテナコイル及び/又は接続パターンと、基板の他方の面に設けられた金属材料を形成材料とする導電部材との重なり部分を、押圧手段を用いて、基板の少なくとも一方の面から押圧するプレス工程と、アンテナコイル及び/又は接続パターンと、導電部材との重なり部分を溶接する溶接工程と、を有する。

公开(公告)号：JP5016975B2

公开(公告)日：2012-09-05

申请号：JP2007138086

申请日：2007-05-24

Applicant: 株式会社東芝

Inventor： 寿 伊藤 ,  雅之 内田 ,  隆 栂嵜 ,  和人 樋口

IPC: H01L21/60

CPC classification number: H05K3/3436 ,  H01L21/563 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13016 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16013 ,  H01L2224/81191 ,  H01L2224/81211 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K3/3463 ,  H05K3/3494 ,  H05K2201/0379 ,  H05K2201/09427 ,  H05K2203/1121 ,  Y02P70/613 ,  H01L2224/29099 ,  H01L2924/00014

Abstract: For a suppressed breakage after a flip chip connection of a semiconductor device using a low-permittivity insulation film and a lead-free solder together, with an enhanced production yield, bump electrodes (2) are heated by a temperature profile having, after a heating up to a melting point of the bump electrodes (2) or more, a cooling in which a temperature within a range of 190 to 210° C. is kept for an interval of time within a range of 3 to 15 minutes, and a condition is met, such that 1.4

Abstract translation: 为了在使用低介电常数绝缘膜和无铅焊料的半导体器件的倒装芯片连接之后抑制破坏，以提高的生产成本，凸起电极（2）被加热了在加热之后的温度分布 直到凸起电极（2）的熔点以上，将在190〜210℃的范围内的温度保持在3〜15分钟的范围内的时间间隔的冷却，以及条件 使得1.4

公开(公告)号：JP4998520B2

公开(公告)日：2012-08-15

申请号：JP2009142258

申请日：2009-06-15

Applicant: 住友電気工業株式会社

Inventor： 恭一郎 中次 ,  泰弘 奥田 ,  正道 山本

IPC: H01L21/60 ,  H05K3/28 ,  H05K3/32 ,  H05K3/34

CPC classification number: H05K3/323 ,  C09J9/02 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2924/01005 ,  H01L2924/01027 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H05K3/282 ,  H05K3/361 ,  H05K2201/023 ,  H05K2201/0379 ,  Y10T156/10 ,  H01L2924/00

公开(公告)号：JP4861382B2

公开(公告)日：2012-01-25

申请号：JP2008202787

申请日：2008-08-06

Applicant: インフィネオン テクノロジーズ アーゲー

Inventor： バイェラー ライホールド

IPC: H01L25/07 ,  H01L23/12 ,  H01L25/18

CPC classification number: H01L23/3735 ,  H01L23/3731 ,  H01L23/3736 ,  H01L24/28 ,  H01L24/29 ,  H01L24/34 ,  H01L24/37 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/072 ,  H01L25/165 ,  H01L2224/29339 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/371 ,  H01L2224/37599 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/4911 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H05K1/0306 ,  H05K1/053 ,  H05K3/4061 ,  H05K3/44 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4629 ,  H05K3/4641 ,  H05K2201/0355 ,  H05K2201/0379 ,  H05K2201/09554 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2224/83205

Abstract: A power semiconductor module is disclosed. One embodiment includes a multilayer substrate having a plurality of metal layers and a plurality of ceramic layers, where the ceramic layers are located between the metal layers.

公开(公告)号：JP4751714B2

公开(公告)日：2011-08-17

申请号：JP2005370157

申请日：2005-12-22

Applicant: オリンパス株式会社

Inventor： 雄 近藤 ,  孝典 関戸

IPC: H05K1/14 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18

CPC classification number: H01L21/50 ,  B81B2207/012 ,  B81B2207/017 ,  B81C1/00301 ,  B81C1/00333 ,  H01L2224/16 ,  H05K1/144 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/042 ,  H05K2201/2018

Abstract: A stacked mounting structure includes at least two substrates namely a first substrate on which a first protruding electrode is formed and a second substrate on which a second protruding electrode is formed, and an intermediate substrate which is disposed between the first substrate and the second substrate, and which connects the first substrate and the second substrate by leaving a predetermined gap between the first substrate and the second substrate. Mounted components are disposed in the gap between the first substrate and the second substrate. The first protruding electrode and the second protruding electrode are connected in an opening which is provided in the intermediate substrate.

公开(公告)号：JP4558776B2

公开(公告)日：2010-10-06

申请号：JP2007276875

申请日：2007-10-24

Applicant: サムソン エレクトロ−メカニックス カンパニーリミテッド.

Inventor： キム ジ−エウン ,  パク ジュン−ヒュン ,  パク ジョン−ウー ,  ジュン ホエ−ク ,  カン ミュン−サム ,  修一 岡部

IPC: H05K3/20 ,  H05K3/10 ,  H05K3/24

CPC classification number: H05K1/0265 ,  H05K1/116 ,  H05K3/107 ,  H05K3/108 ,  H05K3/205 ,  H05K3/421 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2203/0361

公开(公告)号：JP2010123676A

公开(公告)日：2010-06-03

申请号：JP2008294635

申请日：2008-11-18

Applicant: Nec Electronics Corp ,  Necエレクトロニクス株式会社

Inventor： ISHIDO HITONORI ,  INOMATA TERUJI

IPC: H01L21/60

CPC classification number: H01L23/49811 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/81193 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/10253 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/0379 ,  Y02P70/613 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method that prevents a connection failure from occurring resulting from the suck-up of backup solder to a solder bump side when the solder bump at a semiconductor chip side and the backup solder at a package board side are simultaneously heat-dissolved so as to connect the semiconductor chip and a package board. SOLUTION: The same material is used for a semiconductor bump 11 and for backup solder 21. The ratio r2/r1 of an aperture radius (UBM diameter) r1 where the solder bump 11 is in contact with the semiconductor chip 10 and the solder resist aperture radius (SRO diameter) r2 where the backup solder 21 is in contact with the package base board 20 is made to be 0.8 or greater and 1.2 or smaller. At this time, the height h1 of the solder bump 11 is made higher than the height h2 of the backup solder 21. Furthermore, the solder quantity of the solder bump 11 and that of the backup solder 21 are determined so as to satisfy "the curvature radius R2 of the backup solder" ≥ "the curvature radius R1 of the solder bump 11". Furthermore, the solder resist aperture radius (SRO diameter) r2 with which the backup solder 21 is in contact is equal to or greater than the height h2 of the backup solder 21. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供一种制造方法，其防止当在半导体芯片侧的焊料凸块和在封装处的备用焊料时将备用焊料吸附到焊料凸块侧而发生连接故障 板侧同时被热溶解，以便连接半导体芯片和封装板。 解决方案：半导体凸块11和备用焊料21使用相同的材​​料。焊料凸块11与半导体芯片10接触的孔径半径（UBM直径）r1的比r2 / r1和 备用焊料21与封装基板20接触的阻焊孔径半径（SRO直径）r2为0.8以上且1.2以下。 此时，焊料凸块11的高度h1高于备用焊料21的高度h2。此外，焊料凸块11和备用焊料21的焊料量被确定为满足“ 备用焊料的曲率半径R2“≥”焊料凸块11“的曲率半径R1”。 此外，备用焊料21与其接触的阻焊孔径半径（SRO直径）r2等于或大于备用焊料21的高度h2。版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2008252053A

公开(公告)日：2008-10-16

申请号：JP2007138086

申请日：2007-05-24

Applicant: Toshiba Corp ,  株式会社東芝

Inventor： UCHIDA MASAYUKI ,  ITO HISASHI ,  HIGUCHI KAZUTO ,  TOGASAKI TAKASHI

IPC: H01L21/60

CPC classification number: H05K3/3436 ,  H01L21/563 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13016 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16013 ,  H01L2224/81191 ,  H01L2224/81211 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K3/3463 ,  H05K3/3494 ,  H05K2201/0379 ,  H05K2201/09427 ,  H05K2203/1121 ,  Y02P70/613 ,  H01L2224/29099 ,  H01L2924/00014

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device and a semiconductor device, which suppresses breakdown after flip-chip connection of a semiconductor device, using a lead-free solder and a low dielectric constant insulating film, and improves the yield in production with high reliability. SOLUTION: A step where a bump electrode 2 and a precoat 35 are formed of a tin and copper alloy, and an electrode pad 13 of a semiconductor 1 and an electrode pad 33 of an interposer substrate 3 are connected via the bump electrode 2, by heating and melting the bump electrode 2, wherein the bump electrode 2 is heated in a temperature profile, where a temperature of 190 to 210°C is kept for 3 to 15 minutes at the time of lowering the temperature after the bump electrode 2 is heated to the meting temperature of the bump electrode 2 or higher. The condition of 1.4 b a a , and that of the electrode pad 13 is as L b . COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种半导体器件和半导体器件的制造方法，其使用无铅焊料和低介电常数绝缘膜来抑制半导体器件的倒装芯片连接之后的击穿，以及 以高可靠性提高生产产量。 解决方案：凸块电极2和预涂层35由锡和铜合金形成的步骤，半导体1的电极焊盘13和内插基片3的电极焊盘33经由突起电极 如图2所示，通过对突起电极2进行加热熔融，其中凸起电极2在降低凸点电极后的温度时保持温度为190〜210℃的温度分布3〜15分钟的温度分布 2被加热到凸块电极2的温度或更高。 如果电极焊盘33的直径为L a ，则满足1.4 b a <1.6的条件， 的电极焊盘13为L b 。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2008192984A

公开(公告)日：2008-08-21

申请号：JP2007028231

申请日：2007-02-07

Applicant: Elpida Memory Inc ,  エルピーダメモリ株式会社

Inventor： SASAKI MASARU

IPC: H01L21/60

CPC classification number: H05K3/323 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/28 ,  H01L24/83 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/13016 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/29298 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/78301 ,  H01L2224/81903 ,  H01L2224/83193 ,  H01L2224/83851 ,  H01L2224/83885 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01025 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0781 ,  H01L2924/351 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/10674 ,  H05K2203/0278 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599

Abstract: PROBLEM TO BE SOLVED: To prevent part of a bump electrode from locally generating large stresses, with respect to a semiconductor device, wherein a first terminal electrode formed on a semiconductor chip and a second terminal electrode formed on a wiring board are connected each other via the bump electrode.
SOLUTION: In the semiconductor device 100, an insulating resin layer 43 containing a conductive particle 44 is disposed between electrode pads 12, 22 and the bump electrode 30, and the conductive particle 44 having a direct contact with the pads 12, 22 and the bump electrode 30 is so resilient that is deformed flat between the electrode pads 12, 22 and the bump electrode 30.
COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题为了防止凸起电极的一部分局部产生大的应力，相对于半导体器件，其中形成在半导体芯片上的第一端子电极和形成在布线板上的第二端子电极连接 彼此通过凸块电极。 解决方案：在半导体器件100中，在电极焊盘12,22和凸起电极30之间设置包含导电粒子44的绝缘树脂层43，并且与焊盘12,22直接接触的导电粒子44 并且凸起电极30具有如此的弹性，使其在电极焊盘12,22和凸起电极30之间变平坦变形。版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2008529283A

公开(公告)日：2008-07-31

申请号：JP2007552389

申请日：2006-01-24

Applicant: テセラ・インターコネクト・マテリアルズ,インコーポレイテッド

Inventor： 清志 兵頭 ,  篤 吉野 ,  秀樹 小竹 ,  幸夫 橋本 ,  朝雄 飯島 ,  稲太郎 黒澤

IPC: H05K3/46 ,  H05K1/09 ,  H05K3/28

CPC classification number: H05K3/4647 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/107 ,  H05K3/20 ,  H05K3/428 ,  H05K3/4602 ,  H05K3/4614 ,  H05K2201/0376 ,  H05K2201/0379 ,  H05K2203/061 ,  H05K2203/0733 ,  H05K2203/1536 ,  H01L2924/00

Abstract: 主要な表面を有する誘電体要素（２１０）を含む相互接続要素（２０１）が提供される。 金属相互接続パターン（２０８および２０８'）は、主要な表面から内向きに延びる凹部に埋め込まれ、相互接続パターンの外側表面は主要な表面と実質的に共面であって、主要な表面の一つ以上の方向に延びる。 突出導電性フィルム（２２０）は、これが主要な表面の少なくとも一部分に沿って誘電体要素（２１０）に接触するように、また金属相互接続パターン（２０８'）の少なくとも一つのパターンの外側表面に導電的に接触するように、主要な表面によって画定された平面に平行な少なくとも一つの方向に主要な表面上で延びる。