公开(公告)号：US20150342046A1

公开(公告)日：2015-11-26

申请号：US14719309

申请日：2015-05-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Hye Jin KIM ,  Hye Won JUNG ,  Myung Sam KANG ,  Kang Wook BONG ,  Young Gwan KO ,  Min Jae SEONG

IPC: H05K1/11 ,  C25D5/02 ,  H05K3/06 ,  H05K3/00 ,  H05K1/18 ,  H05K1/02

CPC classification number: H05K1/111 ,  C25D5/02 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5385 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85411 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/183 ,  H05K1/185 ,  H05K3/0091 ,  H05K3/064 ,  H05K3/284 ,  H05K3/4697 ,  H05K2201/10515 ,  H05K2201/10674 ,  H05K2201/10734 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A printed circuit board connected to one surface of a substrate and a first electronic component is mounted on the one surface. The printed circuit board includes at least one insulating layer and the insulating layer has a cavity accommodating at least a portion of the first electronic component formed therein, and the cavity has an internal surface made of an insulating material.

Abstract translation: 连接到基板的一个表面的印刷电路板和第一电子部件安装在一个表面上。 印刷电路板包括至少一个绝缘层，并且绝缘层具有容纳形成在其中的第一电子部件的至少一部分的空腔，并且空腔具有由绝缘材料制成的内表面。

公开(公告)号：US20150223341A1

公开(公告)日：2015-08-06

申请号：US14597795

申请日：2015-01-15

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sang Hoon KIM ,  Tae Hong MIN ,  Young Gwan KO ,  Hye Jin KIM ,  Suk Hyeon CHO ,  Chil Woo KWON ,  Jung Han LEE

IPC: H05K1/18 ,  H05K3/30 ,  H05K3/00 ,  H05K3/02 ,  H05K1/11 ,  H05K1/02

CPC classification number: H05K3/007 ,  H01L21/568 ,  H01L2224/04105 ,  H05K1/113 ,  H05K1/185 ,  H05K3/4623 ,  H05K3/4682 ,  H05K3/4697 ,  Y10T29/49128 ,  Y10T29/4913

Abstract: An embedded board, a printed circuit board, and a method of manufacturing the same. According to one embodiment of the present invention, an embedded board includes: a core insulating layer formed with a first cavity; a first circuit layer formed on one surface of the core insulating layer; a build-up insulating layer formed on one surface of the core insulating layer and formed with a second cavity extending from the first cavity; devices disposed in the first cavity and the second cavity and formed to protrude from one surface of the core insulating layer; a first insulating layer formed on the other surface of the core insulating layer and filling the first cavity and the second cavity; and a build-up circuit layer and a via formed in the build-up insulating layer.

Abstract translation: 嵌入式电路板，印刷电路板及其制造方法。 根据本发明的一个实施例，嵌入式板包括：形成有第一腔的芯绝缘层; 形成在所述芯绝缘层的一个表面上的第一电路层; 形成在所述芯绝缘层的一个表面上且形成有从所述第一腔延伸的第二腔的积聚绝缘层; 设置在所述第一腔和所述第二腔中并且形成为从所述芯绝缘层的一个表面突出的器件; 形成在所述芯绝缘层的另一个表面上并填充所述第一腔和所述第二腔的第一绝缘层; 以及在积层绝缘层中形成的积聚电路层和通孔。

公开(公告)号：US20240222263A1

公开(公告)日：2024-07-04

申请号：US18214102

申请日：2023-06-26

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Hoon KIM ,  Hye Jin KIM ,  Gyoung Heon KO ,  Jang Won LEE

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/5223 ,  H01L23/49822 ,  H01L24/32 ,  H01L28/56 ,  H01L28/75 ,  H01L28/90 ,  H01L2224/32104 ,  H01L2224/32146 ,  H01L2924/1205 ,  H01L2924/19041

Abstract: A capacitor component includes a support member; capacitance laminates laminated on one surface of the support member; at least one insulating layer disposed between the capacitance laminates; and a plurality of through structures each penetrating through at least one of the capacitance laminates. Each of the capacitance laminates includes a first electrode layer, a second electrode layer, and a dielectric layer disposed between the first and second electrode layers. One of the plurality of through structures includes a connection conductive pillar connected between first electrode layers of the capacitance laminates. Another of the plurality of through structures includes a first conductive pillar connected to a first electrode layer of one of the capacitance laminates, a dielectric through portion surrounding the first conductive pillar; and a through connection portion surrounding the dielectric through portion and connecting second electrode layers of the capacitance laminates to each other.

公开(公告)号：US20150021074A1

公开(公告)日：2015-01-22

申请号：US14298098

申请日：2014-06-06

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sang Hoon KIM ,  Tae Hong MIN ,  Jung Han LEE ,  Hye Jin KIM

IPC: H05K1/02 ,  H05K1/18 ,  H05K1/11 ,  H05K3/00 ,  H05K3/30

CPC classification number: H05K1/0271 ,  H01L2924/3511 ,  H05K1/111 ,  H05K1/115 ,  H05K1/185 ,  H05K3/0097 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0187 ,  H05K2201/0191 ,  H05K2201/0352 ,  H05K2201/09136 ,  H05K2203/0191 ,  H05K2203/1536 ,  Y10T29/49139

Abstract: Disclosed herein is a printed circuit board capable of implementing slimness by decreasing the number of entire layers through an asymmetrical build-up structure in which an electric device is embedded, the printed circuit board including: a core layer including a cavity formed therein so that an electric device is embedded and a circuit pattern and a pad formed on upper and lower surfaces thereof; a through via formed in the core layer so as to connect the upper and the lower pads of the core layer to each other; a plurality of insulating layers built-up on the core layer and including a plurality of vias so as to be electrically connected to the through via; and a solder resist layer applied onto a lower portion of the core layer so that a lower surface of the through via is partially exposed.

Abstract translation: 本发明公开了一种印刷电路板，其能够通过使嵌入电气装置的不对称积聚结构减少整个层数来实现薄片化，该印刷电路板包括：芯层，其包括形成在其中的空腔， 电气装置被嵌入，并且在其上表面和下表面上形成电路图案和焊盘; 通孔形成在芯层中，以将芯层的上垫和下焊盘彼此连接; 多个绝缘层，其堆叠在所述芯层上并且包括多个通孔，以便电连接到所述通孔; 以及涂覆在芯层的下部上的阻焊层，使得通孔的下表面部分露出。

公开(公告)号：US20240282807A1

公开(公告)日：2024-08-22

申请号：US18388992

申请日：2023-11-13

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Hoon KIM ,  Hye Jin KIM ,  Gyoung Heon KO ,  Jang Won LEE

IPC: H01G4/08 ,  H01L23/522

CPC classification number: H01L28/91 ,  H01L23/5223

Abstract: A capacitor component including: a first capacitor structure including a substrate having a plurality of first trenches disposed on one surface of the substrate, and a first capacitor layer disposed on the one surface of the substrate and inner walls of the plurality of first trenches, the first capacitor layer including a first dielectric layer and first and second electrodes disposed to face each other with the first dielectric layer interposed therebetween; a second capacitor structure disposed on the first capacitor structure, and including an insulating layer having a plurality of second trenches disposed on one surface of the insulating layer, and a second capacitor layer disposed on the one surface of the insulating layer and inner walls of the plurality of second trenches, the second capacitor layer including a second dielectric layer and third and fourth electrodes disposed to face each other with the second dielectric layer interposed therebetween.

公开(公告)号：US20220165493A1

公开(公告)日：2022-05-26

申请号：US17321977

申请日：2021-05-17

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Hoon KIM ,  Chang Hee LEE ,  Jea Hoon LEE ,  Hye Jin KIM ,  Yeo Ju CHO

IPC: H01G2/06 ,  H01G4/30 ,  H01G4/248

Abstract: An electronic component includes: a multilayer capacitor including a capacitor body and a pair of external electrodes, respectively disposed on external surfaces of the capacitor body in a first direction; and an interposer disposed below the multilayer capacitor and including an interposer body, a pair of via holes penetrating through the interposer body, and a pair of via electrodes, respectively disposed in the via holes to be connected to the pair of external electrodes, respectively. 0.24T≤t≤0.3T, where “T” is a maximum height of the multilayer capacitor and “t” is a maximum height of the interposer.

公开(公告)号：US20150107880A1

公开(公告)日：2015-04-23

申请号：US14319743

申请日：2014-06-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Hye Jin KIM ,  Hyo Seung Nam ,  Tae Hong Min ,  Sang Hoon Kim ,  Suk Hyeon Cho ,  Jung Han Lee

IPC: H05K1/11 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K1/185 ,  H05K3/429 ,  H05K3/4644 ,  H05K3/4697 ,  H05K2201/096 ,  H05K2201/09709 ,  H05K2201/0979

Abstract: Disclosed herein is a multilayer printed circuit board. The multilayer printed circuit board according to the present invention includes: a stack via stacked in an upper portion of a core layer; staggered vias formed at both sides of the stack via and stacked on the core layer; and a solder resist layer stacked in a lower portion of the core layer and stacked on an insulating film except for open regions of the stack via and the staggered vias, such that the plurality of vias formed in the staggered via may increase rigidity to prevent warpage of the multilayer printed circuit board from being generated.

Abstract translation: 这里公开了一种多层印刷电路板。 根据本发明的多层印刷电路板包括：堆叠体，堆叠在芯层的上部; 形成在堆叠的两侧的交错通孔并堆叠在芯层上; 以及堆叠在芯层的下部并且堆叠在除了堆叠通孔的开口区域和交错通孔之外的绝缘膜上的阻焊层，使得形成在交错通孔中的多个通孔可以增加刚性以防止翘曲 的多层印刷电路板。

公开(公告)号：US20140357147A1

公开(公告)日：2014-12-04

申请号：US14068389

申请日：2013-10-31

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Tae Hong MIN ,  Sang Hoon KIM ,  Hye Jin KIM

IPC: H05K1/02 ,  H05K3/02 ,  H05K1/03

CPC classification number: H05K1/0271 ,  H05K1/0306 ,  H05K1/038 ,  H05K3/022 ,  H05K3/4605 ,  H05K2201/0212 ,  H05K2201/0278 ,  H05K2201/029 ,  H05K2201/068 ,  H05K2201/09136 ,  H05K2203/1545 ,  Y10T428/249921 ,  Y10T442/2861 ,  Y10T442/2902

Abstract: Disclosed herein is a core made of a glass material so as to be capable of preventing generation of warpage in a printed circuit board due to a difference in a coefficient of thermal expansion at the time of manufacturing the printed circuit board. The core includes: an organic cloth; and a glass having the organic cloth formed therein. The core is manufactured in a form in which rigidity thereof is increased by impregnating the organic cloth having a negative coefficient of thermal expansion is impregnated in a liquid-phase glass, thereby making it possible to effectively prevent generation of warpage in the printed circuit board due to the difference in a coefficient of thermal expansion.

Abstract translation: 这里公开了一种由玻璃材料制成的芯体，以便能够防止由于印刷电路板制造时的热膨胀系数的差异而在印刷电路板中产生翘曲。 核心包括：有机布; 以及其中形成有机布的玻璃。 通过将具有负的热膨胀系数的有机布浸渍浸渍在液相玻璃中，使其硬度提高的形式制造芯，由此能够有效地防止由于印刷电路板产生翘曲 到热膨胀系数的差异。

公开(公告)号：US20160081182A1

公开(公告)日：2016-03-17

申请号：US14692101

申请日：2015-04-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Myung Sam KANG ,  Young Gwan KO ,  Hye Jin KIM ,  Hye Won JUNG ,  Min Jae SEONG

IPC: H05K1/02 ,  H05K3/40 ,  H05K3/46 ,  H05K1/14 ,  H05K1/11

CPC classification number: H01L25/105 ,  H01L23/13 ,  H01L23/147 ,  H01L23/49811 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/48225 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H05K3/4682 ,  H05K3/4697

Abstract: There are provided a package board, a method for manufacturing the same, and a package on package having the same. The package board according to an exemplary embodiment of the present disclosure includes a first insulating layer formed with a cavity having a penetrating shape; and a first connection pad formed to penetrate through the first insulating layer and formed at one side of the cavity.

Abstract translation: 提供了一种封装板，其制造方法和具有该封装板的封装。 根据本公开的示例性实施例的封装板包括形成有具有穿透形状的空腔的第一绝缘层; 以及形成为穿透所述第一绝缘层并形成在所述空腔的一侧的第一连接焊盘。