公开(公告)号：US09287195B2

公开(公告)日：2016-03-15

申请号：US14186380

申请日：2014-02-21

申请人： Invensas Corporation

发明人： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

IPC分类号： H01L23/48 ,  H01L25/065 ,  G11C5/04 ,  G11C5/06 ,  H01L23/00 ,  H01L23/13 ,  H01L23/498 ,  H01L23/50

CPC分类号： H01L25/0657 ,  G11C5/04 ,  G11C5/063 ,  G11C5/066 ,  G11C8/18 ,  H01L23/02 ,  H01L23/13 ,  H01L23/48 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49113 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/85

摘要： A microelectronic assembly can include a microelectronic package connected with a circuit panel. The package has a microelectronic element having a front face facing away from a substrate of the package, and electrically connected with the substrate through conductive structure extending above the front face. First terminals provided in first and second parallel grids or in first and second individual columns can be configured to carry address information usable to determine an addressable memory location from among all the available addressable memory locations of the memory storage array. The first terminals in the first grid can have signal assignments which are a mirror image of the signal assignments of the first terminals in the second grid.

摘要翻译： 微电子组件可以包括与电路板连接的微电子封装。 封装具有微电子元件，其具有背向封装的衬底的前表面，并且通过在前表面上方延伸的导电结构与衬底电连接。 提供在第一和第二并联栅格中或第一和第二单独列中的第一端子可被配置为承载可用于从存储器存储阵列的所有可寻址的存储器位置中确定可寻址存储器位置的地址信息。 第一网格中的第一终端可以具有作为第二网格中的第一终端的信号分配的镜像的信号分配。

公开(公告)号：US20160068988A1

公开(公告)日：2016-03-10

申请号：US14482981

申请日：2014-09-10

申请人： Invensas Corporation

发明人： Cyprian Emeka Uzoh

IPC分类号： C25D21/10 ,  C25D17/10

CPC分类号： C25D21/10 ,  C25D5/08 ,  C25D7/12 ,  C25D17/001

摘要： A paddle for a plating system has a housing with a back portion, a front portion, a first side portion, a second side portion, a first end portion, and a second end portion. A first fin is disposed laterally along a first external surface of the first side portion and offset and coupled to the first external surface to define a first passageway between the first external surface of the first side portion and a first internal surface of the first fin for flow of the electrolyte through the first passageway. A second fin is disposed laterally along a second external surface of the second side portion and offset and coupled to the second external surface to define a second passageway between the second external surface of the second side portion and a second internal surface of the second fin for flow of the electrolyte through the second passageway.

摘要翻译： 用于电镀系统的桨具有具有后部，前部，第一侧部，第二侧部，第一端部和第二端部的壳体。 第一翅片沿着第一侧部分的第一外表面横向布置，并且偏移并联接到第一外表面，以在第一侧部分的第一外表面和第一翅片的第一内表面之间限定第一通道，用于 电解液通过第一通道流动。 第二翅片沿着第二侧部分的第二外表面横向布置，并且偏移并联接到第二外表面，以在第二侧部分的第二外表面和第二翅片的第二内表面之间限定第二通道，用于 电解液通过第二通道流动。

公开(公告)号：US09281296B2

公开(公告)日：2016-03-08

申请号：US14448040

申请日：2014-07-31

申请人： Invensas Corporation

发明人： Zhuowen Sun ,  Yong Chen ,  Kyong-Mo Bang

IPC分类号： H01L25/00 ,  H01L25/065 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L23/49816 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/481 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/43 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00015

摘要： A microelectronic package can include a substrate comprising a dielectric element having first and second opposite surfaces, and a microelectronic element having a face extending parallel to the first surface. The substrate can also include a plurality of peripheral edges extending between the first and second surfaces defining a generally rectangular or square periphery of the substrate. The substrate can further include a plurality of contacts and terminals, the contacts being at the first surface, the terminals being at at least one of the first or second surfaces. The microelectronic elements can have a plurality of edges bounding the face, and a plurality of element contacts at the face electrically coupled with the terminals through the contacts of the substrate. Each edge of the microelectronic element can be oriented at an oblique angle with respect to the peripheral edges of the substrate.

摘要翻译： 微电子封装可以包括包括具有第一和第二相对表面的电介质元件的基板和具有平行于第一表面延伸的面的微电子元件。 衬底还可以包括在第一和第二表面之间延伸的多个外围边缘，其限定基底的大致矩形或正方形的周边。 所述基板还可包括多个触点和端子，所述触点位于所述第一表面处，所述端子处于所述第一或第二表面中的至少一个。 微电子元件可以具有限定该面的多个边缘，并且在该表面处的多个元件触点通过基板的触点与端子电耦合。 微电子元件的每个边缘可以相对于衬底的周边边缘倾斜地定向。

公开(公告)号：US09281271B2

公开(公告)日：2016-03-08

申请号：US14187627

申请日：2014-02-24

申请人： Invensas Corporation

发明人： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

IPC分类号： H01L23/50 ,  H01L23/00 ,  H01L25/065 ,  H01L23/12 ,  H01L23/498 ,  G11C5/06

CPC分类号： H01L25/0657 ,  G11C5/063 ,  H01L23/12 ,  H01L23/13 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/1715 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2225/06506 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00

摘要： A microelectronic assembly can include a circuit panel having first and second panel contacts at respective first and second surfaces thereof, and first and second microelectronic packages each having terminals mounted to the respective panel contacts. Each package can include a microelectronic element having a face and contacts thereon, a substrate having first and second surfaces, and terminals on the second surface configured for connecting the package with an external component. The terminals can include first terminals at positions within first and second parallel grids. The first terminals can be configured to carry address information usable by circuitry within the package to determine an addressable memory location from among all the available addressable memory locations of a memory storage array within the microelectronic element. Signal assignments of the first terminals in the first grid can be a mirror image of signal assignments of the first terminals in the second grid.

摘要翻译： 微电子组件可以包括在其相应的第一和第二表面处具有第一和第二面板触点的电路板，以及每个具有安装到各个面板触点的端子的第一和第二微电子封装。 每个封装可以包括具有面和其上的触点的微电子元件，具有第一和第二表面的基板，以及在第二表面上的端子，用于将封装与外部元件连接。 端子可以包括在第一和第二平行网格内的位置处的第一端子。 第一终端可以被配置为承载可用于封装内的电路的地址信息，以从微电子元件内的存储器存储阵列的所有可寻址的存储器单元中确定可寻址的存储器位置。 第一网格中的第一终端的信号分配可以是第二网格中的第一终端的信号分配的镜像。

公开(公告)号：US09263413B2

公开(公告)日：2016-02-16

申请号：US14486867

申请日：2014-09-15

申请人： Invensas Corporation

发明人： Ilyas Mohammed

IPC分类号： H01L23/00 ,  H01L23/538 ,  H01L25/065 ,  H01L25/10 ,  H05K3/40 ,  H01L21/56

CPC分类号： H01L23/5226 ,  H01L21/563 ,  H01L21/568 ,  H01L21/76877 ,  H01L21/76892 ,  H01L23/5389 ,  H01L24/06 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/45 ,  H01L24/49 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45101 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45565 ,  H01L2224/45624 ,  H01L2224/45655 ,  H01L2224/45664 ,  H01L2224/45669 ,  H01L2224/4569 ,  H01L2224/48 ,  H01L2224/49 ,  H01L2224/73267 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/182 ,  H01L2924/191 ,  H01L2924/19107 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/1461 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/01049

摘要： A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are uncovered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

摘要翻译： 制造微电子单元的方法包括在包括可图案化的金属元件的结构的导电接合表面的形式的第一表面上形成多个引线接合。 线接合形成有与第一表面和远离第一表面的端表面接合的基底。 线接合具有在基部和端面之间延伸的边缘表面。 该方法还包括在导电层的第一表面的一部分上方并且在引线接合部分之上形成电介质封装层，使得引线接合的未封装部分由未被所述边缘表面覆盖的端面或边缘表面的部分限定 封装层。 金属元件被图案化以在引线键合下形成第一导电元件，并且通过封装层的一部分彼此绝缘。

公开(公告)号：US09224431B2

公开(公告)日：2015-12-29

申请号：US14199169

申请日：2014-03-06

申请人： Invensas Corporation

发明人： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

IPC分类号： G11C5/02 ,  G11C5/06 ,  H01L25/065 ,  H01L25/10 ,  H01L23/36 ,  H01L23/498 ,  G11C5/04 ,  H01L23/31 ,  H01L23/00 ,  H01L25/18 ,  H01L23/13

CPC分类号： G11C5/02 ,  G11C5/04 ,  G11C5/06 ,  G11C5/063 ,  G11C8/06 ,  G11C8/10 ,  G11C8/18 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/24 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/06165 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/1443 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A microelectronic structure has active elements defining a storage array, and address inputs for receipt of address information specifying locations within the storage array. The structure has a first surface and can have terminals exposed at the first surface. The terminals may include first terminals and the structure may be configured to transfer address information received at the first terminals to the address inputs. Each first terminal can have a signal assignment which includes one or more of the address inputs. The first terminals are disposed on first and second opposite sides of a theoretical plane normal to the first surface, wherein the signal assignments of the first terminals disposed on the first side are a mirror image of the signal assignments of the first terminals disposed on the second side of the theoretical plane.

摘要翻译： 微电子结构具有定义存储阵列的活动元件，以及用于接收指定存储阵列内的位置的地址信息的地址输入。 该结构具有第一表面并且可以具有在第一表面处露出的端子。 终端可以包括第一终端，并且该结构可以被配置为将在第一终端接收的地址信息传送到地址输入。 每个第一终端可以具有包括一个或多个地址输入的信号分配。 第一端子设置在与第一表面垂直的理论平面的第一和第二相对侧上，其中设置在第一侧上的第一端子的信号分配是设置在第二端上的第一端子的信号分配的镜像 理论面的一面。

公开(公告)号：US09214455B2

公开(公告)日：2015-12-15

申请号：US14579013

申请日：2014-12-22

申请人： Invensas Corporation

发明人： Richard Dewitt Crisp ,  Wael Zohni

IPC分类号： G11C5/06 ,  H01L25/10 ,  G11C5/04 ,  H01L23/482 ,  H01L23/498 ,  H05K1/02 ,  H01L23/13 ,  H01L23/50 ,  H01L23/31 ,  H01L23/00 ,  H05K3/34

CPC分类号： H01L25/105 ,  G11C5/04 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/4822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/06156 ,  H01L2224/06164 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H05K1/0243 ,  H05K3/3436 ,  H05K2201/10159 ,  H05K2201/10545 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A microelectronic package includes a microelectronic element having memory storage array function overlying a first surface of a substrate, the microelectronic element having a plurality of contacts aligned with an aperture in the substrate. First terminals which are configured to carry all address signals transferred to the package can be exposed within a first region of a second substrate surface, the first region disposed between the aperture and a peripheral edge of the substrate. The first terminals may be configured to carry all command signals, bank address signals and command signals transferred to the package, the command signals being write enable, row address strobe, and column address strobe.

摘要翻译： 微电子封装包括具有覆盖衬底的第一表面的存储器阵列功能的微电子元件，所述微电子元件具有与衬底中的孔对准的多个触点。 配置为承载传送到封装的所有地址信号的第一端子可以暴露在第二衬底表面的第一区域内，第一区域设置在孔和衬底的周边边缘之间。 第一端子可以被配置为携带传送到封装的所有命令信号，存储体地址信号和命令信号，命令信号是写使能，行地址选通和列地址选通。

公开(公告)号：US20150348873A1

公开(公告)日：2015-12-03

申请号：US14289860

申请日：2014-05-29

申请人： INVENSAS CORPORATION

发明人： Rajesh Katkar ,  Cyprian Emeka Uzoh

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L21/768

CPC分类号： H01L21/486 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/43 ,  H01L24/46 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/023 ,  H01L2224/4502 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A component such as an interposer or microelectronic element can be fabricated with a set of vertically extending interconnects of wire bond structure. Such method may include forming a structure having wire bonds extending in an axial direction within one of more openings in an element and each wire bond spaced at least partially apart from a wall of the opening within which it extends, the element consisting essentially of a material having a coefficient of thermal expansion (“CTE”) of less than 10 parts per million per degree Celsius (“ppm/° C.”). First contacts can then be provided at a first surface of the component and second contacts provided at a second surface of the component facing in a direction opposite from the first surface, the first contacts electrically coupled with the second contacts through the wire bonds.

摘要翻译： 诸如插入件或微电子元件的部件可以用一组垂直延伸的引线接合结构的互连件制造。 这种方法可以包括形成具有线性结合的结构，所述线接合在元件中的多个开口之一内沿轴向延伸，并且每个引线键至少部分地与其延伸的开口的壁间隔开，所述元件基本上由材料 具有小于10摄氏度（“ppm /℃”）的百万分之几的热膨胀系数（“CTE”）。 然后可以在部件的第一表面处提供第一触点，并且提供在部件的第二表面处的面向第一表面的方向的第二触点，第一触头通过引线接合与第二触点电耦合。

公开(公告)号：US09123780B2

公开(公告)日：2015-09-01

申请号：US13720346

申请日：2012-12-19

申请人： Invensas Corporation

发明人： Cyprian Emeka Uzoh ,  Pezhman Monadgemi ,  Terrence Caskey ,  Fatima Lina Ayatollahi ,  Belgacem Haba ,  Charles G. Woychik ,  Michael Newman

IPC分类号： H01L21/4763 ,  H01L21/768 ,  H01L23/48 ,  H01L23/36 ,  H01L23/367

CPC分类号： H01L23/49827 ,  H01L21/76829 ,  H01L21/76898 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/481 ,  H01L23/49838 ,  H01L23/49866 ,  H01L2924/00 ,  H01L2924/0002

摘要： A method for making an interconnect element includes depositing a thermally conductive layer on an in-process unit. The in-process unit includes a semiconductor material layer defining a surface and edges surrounding the surface, a plurality of conductive elements, each conductive element having a first portion extending through the semiconductor material layer and a second portion extending from the surface of the semiconductor material layer. Dielectric coatings extend over at least the second portion of each conductive element. The thermally conductive layer is deposited on the in-process unit at a thickness of at least 10 microns so as to overlie a portion of the surface of the semiconductor material layer between the second portions of the conductive elements with the dielectric coatings positioned between the conductive elements and the thermally conductive layer.

摘要翻译： 制造互连元件的方法包括将热传导层沉积在处理单元上。 处理单元包括限定表面和围绕表面的边缘的半导体材料层，多个导电元件，每个导电元件具有延伸穿过半导体材料层的第一部分和从半导体材料的表面延伸的第二部分 层。 电介质涂层至少延伸到每个导电元件的第二部分。 导热层以至少10微米的厚度沉积在处理单元上，以覆盖在导电元件的第二部分之间的半导体材料层的表面的一部分，其中介电涂层位于导电 元件和导热层。

公开(公告)号：US09111671B2

公开(公告)日：2015-08-18

申请号：US13901520

申请日：2013-05-23

申请人： Curtis Dicke ,  George Courville ,  David Fisch ,  Randall Sandusky ,  Kent Stalnaker

发明人： Curtis Dicke ,  George Courville ,  David Fisch ,  Randall Sandusky ,  Kent Stalnaker

IPC分类号： H03L5/00 ,  H01C10/50 ,  G11C7/10 ,  H03F3/45

CPC分类号： H03K19/0005 ,  G11C7/1057 ,  H01C10/50 ,  H03F3/45475

摘要： System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.

摘要翻译： 描述了提供精度自校准电阻电路的系统和方法，其使用可动态配置的电阻网络来匹配参考电阻。 电阻网络耦合到连接，其中电阻器网络通过连接提供可配置的电阻。 此外，电阻网络包括数字电阻网络和模拟电阻网络。 此外，电路包括用于基于参考电阻器的参考电阻配置可配置电阻的控制电路。 可配置电阻是通过数字电阻网络粗调电阻网络并通过模拟电阻网络微调电阻网络来配置的。