Abstract:
ALD processing techniques for forming non-volatile resistive-switching memories are described. In one embodiment, a method includes forming a first electrode on a substrate, maintaining a pedestal temperature for an atomic layer deposition (ALD) process of less than 100° Celsius, forming at least one metal oxide layer over the first electrode, wherein the forming the at least one metal oxide layer is performed using the ALD process using a purge duration of less than 20 seconds, and forming a second electrode over the at least one metal oxide layer.
Abstract:
Embodiments described herein provide methods for forming indium-gallium-zinc oxide (IGZO) devices. A substrate is provided. An IGZO layer is formed above the substrate. A copper-containing layer is formed above the IGZO layer. A wet etch process is performed on the copper-containing layer to form a source region and a drain region above the IGZO layer. The performing of the wet etch process on the copper-containing layer includes exposing the copper-containing layer to an etching solution including a peroxide compound and one of citric acid, formic acid, malonic acid, lactic acid, etidronic acid, phosphonic acid, or a combination thereof.
Abstract:
Low emissivity panels can include a protection layer of silicon nitride on a layer of ZnO on a layer of Zn2SnOx. The low emissivity panels can also include NiNbTiOx as a barrier layer. The low emissivity panels have high light to solar gain, color neutral, together with similar observable color and light transmission before and after a heat treatment process.
Abstract:
Contacts for semiconductor devices and methods of making thereof are disclosed. A method comprises forming a first layer on a semiconductor, the first layer comprising one or more metals; forming a second layer on the first layer, the second layer comprising the one or more metals, nitrogen and oxygen; and heating the first and second layer such that oxygen migrates from the second layer into the first layer and the first layer comprises a sub-stoichiometric metal oxide after heating. Exemplary embodiments use transition metals such as Ti in the first layer. After heating there is a sub-stoichiometric oxide layer of about 2.5 nm thickness between a metal nitride conductor and the semiconductor. The specific contact resistivity is less than about 7×10−9 Ω·cm2.
Abstract:
In some embodiments, oxidants such as ozone (O3) and/or nitrous oxide (N2O) are used during the reactive sputtering of metal-based semiconductor layers used in TFT devices. The O3 and N2O gases are stronger oxidants and result in a decrease in the concentration of oxygen vacancies within the metal-based semiconductor layer. The decrease in the concentration of oxygen vacancies may result in improved stability under conditions of negative bias illumination stress (NBIS).
Abstract translation:在一些实施方案中,在TFT器件中使用的金属基半导体层的反应溅射期间,使用氧化剂如臭氧(O 3)和/或一氧化二氮(N 2 O)。 O 3和N 2 O气体是更强的氧化剂并且导致金属基半导体层内的氧空位浓度的降低。 氧空位浓度的降低可能导致负偏压照明应力(NBIS)条件下的稳定性提高。
Abstract:
Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a low band gap dielectric layer disposed between two higher band gap dielectric layers. The high band gap dielectric layers can be doped with doping materials to form traps at energy levels higher than the operating voltage of the memory device.
Abstract:
An open-bottomed reactor cell for wet processing of substrates can be configured to confine a process liquid to an area under the cell (processing the “internal site”), or alternatively to exclude the process liquid from most of the area under the cell (processing the “external site”) without physical contact between the cell and substrate. A slight underpressure or overpressure maintained inside the main cavity of the cell causes the liquid to form a meniscus in the narrow gap between the cell and substrate rather than flowing outside the desired process area. An area under a peripheral channel outside the main cavity of the cell is shared by both the internal site and the external side, allowing the entire substrate to be processed.
Abstract:
Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber, a remote plasma source, and a showerhead. Inert gas ports within the showerhead assembly can be used to alter the concentration and energy of reactive radical or reactive neutral species generated by the remote plasma source in different regions of the showerhead. This allows the showerhead to be used to apply a surface treatment to different regions of the surface of a substrate. Varying parameters such as the remote plasma parameters, the inert gas flows, pressure, and the like allow different regions of the substrate to be treated in a combinatorial manner.
Abstract:
Methods for sealing a porous dielectric are presented including: receiving a substrate, the substrate including the porous dielectric; exposing the substrate to an organosilane, where the organosilane includes a hydrolysable group for facilitating attachment with the porous dielectric, and where the organosilane does not include an alkyl group; and forming a layer as a result of the exposing to seal the porous dielectric. In some embodiments, methods are presented where the organosilane includes: alkynyl groups, aryl groups, fluoroalkyl groups, heteroaryl groups, alcohol groups, thiol groups, amine groups, thiocarbamate groups, ester groups, ether groups, sulfide groups, and nitrile groups. In some embodiments, method further include: removing contamination from the porous dielectric and a conductive region of the substrate prior to the exposing; and removing contamination from the conductive region after the forming.
Abstract:
The present disclosure includes a texture formulation that includes an aliphatic diol, an alkaline compound and water which provides a consistent textured region across a silicon surface suitable for solar cell applications. The current invention describes silicon texturing formulations that include at least one high boiling point additive. The high boiling point additive may be a derivative compound of propylene glycol or a derivative compound of ethylene glycol. Processes for texturing a crystalline silicon substrate using these formulations are also described. Additionally, a combinatorial method of optimizing the textured surface of a crystalline silicon substrate is described.