Methods for Forming Back-Channel-Etch Devices with Copper-Based Electrodes
    112.
    发明申请
    Methods for Forming Back-Channel-Etch Devices with Copper-Based Electrodes 有权
    用铜基电极形成背沟槽蚀刻器件的方法

    公开(公告)号:US20140273341A1

    公开(公告)日:2014-09-18

    申请号:US14133421

    申请日:2013-12-18

    Abstract: Embodiments described herein provide methods for forming indium-gallium-zinc oxide (IGZO) devices. A substrate is provided. An IGZO layer is formed above the substrate. A copper-containing layer is formed above the IGZO layer. A wet etch process is performed on the copper-containing layer to form a source region and a drain region above the IGZO layer. The performing of the wet etch process on the copper-containing layer includes exposing the copper-containing layer to an etching solution including a peroxide compound and one of citric acid, formic acid, malonic acid, lactic acid, etidronic acid, phosphonic acid, or a combination thereof.

    Abstract translation: 本文所述的实施方案提供了形成铟镓锌氧化物(IGZO)器件的方法。 提供基板。 在基板上形成IGZO层。 在IGZO层上形成含铜层。 在含铜层上进行湿式蚀刻处理,以在IGZO层上形成源极区域和漏极区域。 在含铜层上执行湿法蚀刻工艺包括将含铜层暴露于包括过氧化物化合物和柠檬酸,甲酸,丙二酸,乳酸,依替膦酸,膦酸或其中的一种的蚀刻溶液 其组合。

    Ultra-Low Resistivity Contacts
    114.
    发明申请
    Ultra-Low Resistivity Contacts 有权
    超低电阻率触点

    公开(公告)号:US20140264825A1

    公开(公告)日:2014-09-18

    申请号:US14135431

    申请日:2013-12-19

    Inventor: Khaled Ahmed

    Abstract: Contacts for semiconductor devices and methods of making thereof are disclosed. A method comprises forming a first layer on a semiconductor, the first layer comprising one or more metals; forming a second layer on the first layer, the second layer comprising the one or more metals, nitrogen and oxygen; and heating the first and second layer such that oxygen migrates from the second layer into the first layer and the first layer comprises a sub-stoichiometric metal oxide after heating. Exemplary embodiments use transition metals such as Ti in the first layer. After heating there is a sub-stoichiometric oxide layer of about 2.5 nm thickness between a metal nitride conductor and the semiconductor. The specific contact resistivity is less than about 7×10−9 Ω·cm2.

    Abstract translation: 公开了半导体器件的接触件及其制造方法。 一种方法包括在半导体上形成第一层,第一层包括一种或多种金属; 在所述第一层上形成第二层,所述第二层包含所述一种或多种金属,氮和氧; 以及加热所述第一层和所述第二层,使得氧从所述第二层迁移到所述第一层中,并且所述第一层在加热后包括亚化学计量的金属氧化物。 示例性实施例在第一层中使用诸如Ti之类的过渡金属。 在加热之后,在金属氮化物导体和半导体之间存在约2.5nm厚度的亚化学计量氧化层。 比接触电阻率小于约7×10-9&OHgr·cm2。

    Combinatorial processing using a remote plasma source
    118.
    发明授权
    Combinatorial processing using a remote plasma source 有权
    使用远程等离子体源进行组合处理

    公开(公告)号:US08821987B2

    公开(公告)日:2014-09-02

    申请号:US13717478

    申请日:2012-12-17

    Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber, a remote plasma source, and a showerhead. Inert gas ports within the showerhead assembly can be used to alter the concentration and energy of reactive radical or reactive neutral species generated by the remote plasma source in different regions of the showerhead. This allows the showerhead to be used to apply a surface treatment to different regions of the surface of a substrate. Varying parameters such as the remote plasma parameters, the inert gas flows, pressure, and the like allow different regions of the substrate to be treated in a combinatorial manner.

    Abstract translation: 公开了使用远程等离子体源的处理方法和装置。 该装置包括外室,远程等离子体源和喷头。 喷头组件内的惰性气体端口可用于改变由喷头的不同区域中的远程等离子体源产生的反应性基团或反应中性物质的浓度和能量。 这允许使用喷头来对表面的不同区域进行表面处理。 诸如远程等离子体参数,惰性气体流量,压力等的不同参数允许以组合的方式处理衬底的不同区域。

    Molecular self-assembly in substrate processing
    119.
    发明授权
    Molecular self-assembly in substrate processing 有权
    基板加工中的分子自组装

    公开(公告)号:US08815753B2

    公开(公告)日:2014-08-26

    申请号:US13717378

    申请日:2012-12-17

    Abstract: Methods for sealing a porous dielectric are presented including: receiving a substrate, the substrate including the porous dielectric; exposing the substrate to an organosilane, where the organosilane includes a hydrolysable group for facilitating attachment with the porous dielectric, and where the organosilane does not include an alkyl group; and forming a layer as a result of the exposing to seal the porous dielectric. In some embodiments, methods are presented where the organosilane includes: alkynyl groups, aryl groups, fluoroalkyl groups, heteroaryl groups, alcohol groups, thiol groups, amine groups, thiocarbamate groups, ester groups, ether groups, sulfide groups, and nitrile groups. In some embodiments, method further include: removing contamination from the porous dielectric and a conductive region of the substrate prior to the exposing; and removing contamination from the conductive region after the forming.

    Abstract translation: 提供了密封多孔电介质的方法,包括:接收衬底,所述衬底包括多孔电介质; 将基板暴露于有机硅烷中,其中有机硅烷包括用于促进与多孔电介质附着的可水解基团,并且其中有机硅烷不包括烷基; 并且由于暴露而形成层以密封多孔电介质。 在一些实施方案中,存在方法,其中有机硅烷包括:炔基,芳基,氟代烷基,杂芳基,醇基,硫醇基,胺基,硫代氨基甲酸酯基,酯基,醚基,硫醚基和腈基。 在一些实施例中,方法还包括:在暴露之前从多孔电介质和衬底的导电区域去除污染物; 并且在成形之后从导电区域去除污染物。

    Silicon Texturing Formulations
    120.
    发明申请
    Silicon Texturing Formulations 审中-公开
    硅纹制剂

    公开(公告)号:US20140231704A1

    公开(公告)日:2014-08-21

    申请号:US14261739

    申请日:2014-04-25

    Abstract: The present disclosure includes a texture formulation that includes an aliphatic diol, an alkaline compound and water which provides a consistent textured region across a silicon surface suitable for solar cell applications. The current invention describes silicon texturing formulations that include at least one high boiling point additive. The high boiling point additive may be a derivative compound of propylene glycol or a derivative compound of ethylene glycol. Processes for texturing a crystalline silicon substrate using these formulations are also described. Additionally, a combinatorial method of optimizing the textured surface of a crystalline silicon substrate is described.

    Abstract translation: 本公开内容包括包含脂族二醇,碱性化合物和水的纹理制剂,其在适于太阳能电池应用的硅表面上提供一致的纹理区域。 本发明描述了包含至少一种高沸点添加剂的硅纹理配方。 高沸点添加剂可以是丙二醇或乙二醇的衍生化合物的衍生化合物。 还描述了使用这些制剂对晶体硅衬底进行纹理化的工艺。 另外,描述了优化结晶硅衬底的纹理表面的组合方法。

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