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    High frequency microwave packaging having a dielectric gap
    111.
    发明授权
    High frequency microwave packaging having a dielectric gap 失效
    具有电介质间隙的高频微波封装

    公开(公告)号：US06204448B1

    公开(公告)日：2001-03-20

    申请号：US09205903

    申请日：1998-12-04

    Applicant: Paul Garland ,  James Kyo Long ,  Yozo Satoda ,  Chong-il Park

    Inventor： Paul Garland ,  James Kyo Long ,  Yozo Satoda ,  Chong-il Park

    IPC: H05K506

    CPC classification number: H01L23/66 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/1903 ,  H01L2924/3011 ,  H05K1/024 ,  H05K1/0243 ,  H05K9/0039 ,  H05K2201/0792 ,  H05K2201/09063 ,  H05K2201/10371 ,  H05K2201/10689 ,  H01L2924/00

    Abstract: A hermetically sealed package assembly for microwave circuits in the high microwave frequencies having a dielectric gap defined in the substrate. The package assembly comprises a substrate for carrying the circuit on a top surface, a seal ring wall carried on the top surface, a via structure provided through the substrate for transmitting high-frequency signals into and out of the package, and a conducive lead carried on the bottom surface of the substrate and passes under the seal ring wall. A dielectric gap is provided in the substrate between the seal ring wall and the lead to reduce the capacitive coupling between the lead and the wall. The gap may be a sealed cavity provided inside the substrate, or a cutout area in the substrate so that the lead is suspended in air at the location where it passes under the seal ring wall.

    Abstract translation: 用于在高微波频率中的微波电路的密封封装组件，其具有限定在衬底中的电介质间隙。 封装组件包括用于在顶表面上承载电路的基板，承载在顶表面上的密封环壁，通过基板提供的通孔结构，用于将高频信号传输到和流出封装，以及一个有利的引线 在基底的底面上，通过密封环壁。 在密封环壁和引线之间的衬底中提供电介质间隙以减小引线与壁之间的电容耦合。 间隙可以是设置在基板内部的密封空腔或基板中的切口区域，使得引线悬浮在其在密封环壁下方通过的位置处的空气中。

    Capacitor mounting structure for printed circuit boards
    112.
    发明授权
    Capacitor mounting structure for printed circuit boards 失效
    印刷电路板的电容器安装结构

    公开(公告)号：US5459642A

    公开(公告)日：1995-10-17

    申请号：US253980

    申请日：1994-06-03

    Applicant: D. Joe Stoddard

    Inventor： D. Joe Stoddard

    IPC: H01G2/06 ,  H01G4/252 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/34

    CPC classification number: H05K3/3442 ,  H05K1/0231 ,  H05K1/113 ,  H05K1/114 ,  H05K2201/0792 ,  H05K2201/09772 ,  H05K2201/10636 ,  H05K3/0094 ,  Y02P70/611 ,  Y02P70/613

    Abstract: A capacitor mounting structure for printed circuit boards wherein the capacitor includes first and second terminals which are connected to first and second conductor planes in the printed circuit board. Three vias are mounted in the printed circuit board in a position to be aligned with the middle of the capacitor. A first conductor pad is mounted underneath one end of the capacitor and includes spaced apart extension portions which electrically attach to the first and third via. A second conductor pad is mounted under the other end of the capacitor and includes a central extension portion which attaches to the second or middle via. In this manner, the region available for generation of parasitic inductance is minimized thereby increasing the operating efficiency of the capacitor.

    Abstract translation: 一种用于印刷电路板的电容器安装结构，其中电容器包括连接到印刷电路板中的第一和第二导体平面的第一和第二端子。 三个通孔安装在印刷电路板中与电容器中间对准的位置。 第一导体焊盘安装在电容器的一端下方，并且包括电连接到第一和第三通孔的间隔开的延伸部分。 第二导体焊盘安装在电容器的另一端下方，并且包括连接到第二或中间通孔的中心延伸部分。 以这种方式，可用于产生寄生电感的区域被最小化，从而提高了电容器的工作效率。

    Amplifier input circuit having a figure eight conductive pattern
    114.
    发明授权
    Amplifier input circuit having a figure eight conductive pattern 失效
    放大器输入电路具有图8导电图案

    公开(公告)号：US4568987A

    公开(公告)日：1986-02-04

    申请号：US563433

    申请日：1983-12-20

    Applicant: Kazuaki Ishiwata

    Inventor： Kazuaki Ishiwata

    IPC: G11B5/02 ,  G11B5/027 ,  G11B20/24 ,  H03F1/26 ,  H03F3/183 ,  H05K1/02 ,  H05K1/16 ,  G11B5/00

    CPC classification number: G11B20/24 ,  G11B5/02 ,  H03F1/26 ,  H03F3/183 ,  H05K1/0228 ,  H05K1/165 ,  H05K2201/0792 ,  H05K2201/09245 ,  H05K2201/09263 ,  H05K2201/10015 ,  H05K2201/10166

    Abstract: Disclosed is a circuit arrangement having an amplifier with first and second input terminals which are adapted to be coupled to a playback head, wherein the first input terminal of the amplifier is coupled through a first circuit section of a conductive pattern to a first terminal of the playback head and the second input terminal of the amplifier is coupled through a second circuit section of the conductive pattern to a second terminal of the playback head. The first and second circuit sections (3, 4) are arranged to insulatively cross each other at an intersection (6) to form a figure eight pattern having two loop sections of substantially equal areas to equalize the amounts of currents which are oppositely respectively induced in the first and second loop sections by an externally generated magnetic flux.

    Abstract translation: 公开了具有放大器的电路装置，该放大器具有适于耦合到重放头的第一和第二输入端，其中放大器的第一输入端通过导电图案的第一电路部分耦合到 放大器的第一和第二输入端通过导电图案的第二电路部分耦合到重放头的第二端。 第一和第二电路部分（3,4）被布置成在交叉点（6）处彼此绝对交叉以形成具有基本上相等面积的两个环路部分的图形八模式，以均衡相应地分别诱发的电流量 第一和第二环路部分由外部产生的磁通量。

    Radiation suppressed keyboard
    115.
    发明授权
    Radiation suppressed keyboard 失效
    辐射抑制键盘

    公开(公告)号：US4035794A

    公开(公告)日：1977-07-12

    申请号：US633303

    申请日：1975-11-19

    Applicant: Daniel J. Norton ,  Rupert J. Cooke

    Inventor： Daniel J. Norton ,  Rupert J. Cooke

    IPC: H03K17/972 ,  H05K1/02 ,  H05K1/18 ,  G08C25/00

    CPC classification number: H03K17/972 ,  H05K1/0233 ,  H05K1/18 ,  H05K2201/0715 ,  H05K2201/0792 ,  H05K2201/086 ,  H05K2201/10166 ,  H05K2201/2036

    Abstract: A keyboard for use with a data processing display terminal utilizing a cathode ray tube (CRT) display is provided from which information bearing electromagnetic radiations are suppressed using solid state keyboard switches having no contact bounce and generating low level signals with few transients, metallic oxide silicon (MOS) semiconductor circuitry having relatively low switching speeds to generate few transients, careful packaging of components to minimize printed circuit path and wiring lengths, ferrite beads on component leads to suppress transient generation, and shielding of printed circuit paths by sandwiching them between ground planes.

    Abstract translation: 提供了一种与使用阴极射线管（CRT）显示器的数据处理显示终端一起使用的键盘，使用不具有接触反弹的固态键盘开关并且产生具有少量瞬变的低电平信号来抑制信息轴承电磁辐射，金属氧化物硅 （MOS）半导体电路，其具有相对低的开关速度以产生很少的瞬变，仔细地封装部件以最小化印刷电路路径和布线长度，组件上的铁氧体磁珠导致抑制瞬态产生，并且通过将印刷电路路径夹在地平面之间来屏蔽 。

    Electrical capacitor with non-inductive leads
    116.
    发明授权
    Electrical capacitor with non-inductive leads 失效
    具有非电导率的电容器

    公开(公告)号：US3806770A

    公开(公告)日：1974-04-23

    申请号：US33441873

    申请日：1973-02-21

    Applicant: MALLORY & CO INC P R

    Inventor： VOYLES G ,  DEAK P

    IPC: H01C1/14 ,  H01G4/228 ,  H01G4/236 ,  H05K1/02 ,  H05K3/30 ,  H05K3/34 ,  H01G9/00 ,  H01G1/14

    CPC classification number: H01G4/228 ,  H01G4/224 ,  H05K1/0231 ,  H05K3/308 ,  H05K3/3447 ,  H05K2201/0792 ,  H05K2201/0979 ,  H05K2201/10454 ,  H05K2201/10765 ,  Y10T29/42

    Abstract: An electrical component means and method of making same. The component means includes an electrical component body such as a capacitor body and continuous terminal means, preferably Ushaped, with portions immediately adjacent one side of the component body joined to that side of the component body. Lead means of the continuous terminal means, preferably a pair of spaced and parallel elongated wires of the U-shaped terminal means, project from the component body in the same direction. Each of the lead means is adapted to project through and is adapted to be secured against movement relative to apertures of an electrically insulating base means. The configuration of the terminal means and intimate engagement thereof along the entire length of each immediately adjacent side of the component body cooperate to help reduce the impedance of the electrical component means at elevated frequencies. If high frequency operation is not a consideration, the lead wires of the terminal means may be inserted through apertures of a support means and twisted together on a side of the support means opposite the side of the support means adjacent the base means of the component body to help cooperatively associate the component body with the support means.

    Abstract translation: 电气部件的制造方法及其制造方法。 部件装置包括诸如电容器主体的电气部件主体和优选为U形的连续端子装置，其中紧邻部件主体的一侧的部分与部件主体的该侧连接。 连续端子装置的引线装置，优选地，一对间隔开并平行的U形端子装置的细长导线沿着相同的方向从部件主体突出。 引导装置中的每一个适于突出并且适于被固定以抵抗相对于电绝缘基部装置的孔的运动。 终端装置的构造以及沿着组件体的每个紧邻侧的整个长度的紧密接合协作以帮助降低电气部件装置在升高的频率下的阻抗。 如果不考虑高频操作，则终端装置的引线可以通过支撑装置的孔插入，并且在与支撑装置的与组件主体的基部装置相邻的一侧的支撑装置的一侧上被扭绞在一起 以帮助组合体与支撑装置的合作关联。

    Wiring board
    119.
    发明授权
    Wiring board 有权
    接线板

    公开(公告)号：US09155196B2

    公开(公告)日：2015-10-06

    申请号：US14290193

    申请日：2014-05-29

    Applicant: IBIDEN CO., LTD.

    Inventor： Haruhiko Morita

    IPC: H05K1/16 ,  H05K1/02 ,  H05K1/03 ,  H05K1/11 ,  H05K3/24 ,  H05K3/46

    CPC classification number: H05K1/165 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/3511 ,  H05K1/0225 ,  H05K1/0366 ,  H05K1/116 ,  H05K3/244 ,  H05K3/4602 ,  H05K2201/0191 ,  H05K2201/0293 ,  H05K2201/0347 ,  H05K2201/0723 ,  H05K2201/0792 ,  H05K2201/09136 ,  H05K2201/09263 ,  H05K2201/09454 ,  H05K2201/09527 ,  H05K2201/096 ,  H05K2201/09672 ,  H05K2201/09836

    Abstract: A wiring board includes a substrate having a laminated-inductor forming portion and including multiple first insulation layers and a second insulation layer formed on a first side of the first insulation layers such that the first insulation layers have the laminated-inductor forming portion, and a planar conductor formed on the second insulation layer of the substrate and formed to shield electromagnetic force generated from the laminated-inductor forming portion of the substrate. The laminated-inductor forming portion of the substrate has multiple inductor patterns formed on the first insulation layers and multiple via conductors connecting the inductor patterns through the first insulation layers, and the inductor patterns include an uppermost inductor pattern formed between the second insulation layer and the first insulation layers such that the uppermost inductor pattern has a distance of 100 μm or more from the planar conductor.

    Abstract translation: 布线基板包括具有层叠电感器形成部分并且包括多个第一绝缘层的基板和形成在第一绝缘层的第一侧上的第二绝缘层，使得第一绝缘层具有层叠电感器形成部分，以及 形成在基板的第二绝缘层上并形成以屏蔽从基板的层叠电感器形成部分产生的电磁力的平面导体。 衬底的层叠电感器形成部分具有形成在第一绝缘层上的多个电感器图案和通过第一绝缘层连接电感器图案的多个通孔导体，并且电感器图案包括形成在第二绝缘层和 第一绝缘层，使得最上层的电感器图案与平面导体的距离为100μm以上。

    Multilayer substrate module
    120.
    发明授权
    Multilayer substrate module 有权
    多层基板模块

    公开(公告)号：US09119318B2

    公开(公告)日：2015-08-25

    申请号：US14148979

    申请日：2014-01-07

    Applicant: Murata Manufacturing Co., Ltd.

    Inventor： Takeshi Kogure ,  Hiromichi Kitajima

    IPC: H05K1/16 ,  H05K1/02

    CPC classification number: H05K1/165 ,  H05K1/0298 ,  H05K2201/0792 ,  H05K2201/09309 ,  H05K2201/0969

    Abstract: A multilayer substrate module includes a multilayer circuit substrate, a mounting land, and an input/output terminal. Inside the multilayer circuit substrate, a wiring line that connects the mounting land and the input/output terminal to each other, an inductor that defines a portion of the wiring line, a first ground conductor that is positioned on the one main surface side of the inductor, and a second ground conductor that is positioned on the other main surface side of the inductor are defined by conductor patterns. The area where inductor is located is not superposed with the area where the second ground conductor is located, when the one main surface or the other main surface of the multilayer circuit substrate is viewed in plan, the second ground conductor being closer to the layer where the inductor is located than the first ground conductor is.

    Abstract translation: 多层基板模块包括多层电路基板，安装台面和输入/输出端子。 在多层电路基板的内部，将安装台面和输入输出端子彼此连接的布线，限定布线的一部分的电感器，位于第一接地导体的一个主面侧的第一接地导体 电感器和位于电感器的另一主表面侧的第二接地导体由导体图案限定。 电感器所在的区域不与第二接地导体所在的区域重叠，当在平面图中观察多层电路衬底的一个主表面或另一个主表面时，第二接地导体更靠近层 电感器位于第一接地导体之上。

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