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公开(公告)号：US08558229B2
公开(公告)日：2013-10-15
申请号：US13313747
申请日：2011-12-07
申请人： Shin-Puu Jeng , Wei-Cheng Wu , Shang-Yun Hou , Chen-Hua Yu , Tzuan-Horng Liu , Tzu-Wei Chiu , Kuo-Ching Hsu
发明人： Shin-Puu Jeng , Wei-Cheng Wu , Shang-Yun Hou , Chen-Hua Yu , Tzuan-Horng Liu , Tzu-Wei Chiu , Kuo-Ching Hsu
IPC分类号： H01L23/58
CPC分类号： H01L22/34 , G01R31/2884 , H01L21/76885 , H01L22/32 , H01L23/49838 , H01L24/11 , H01L24/13 , H01L24/16 , H01L2224/02126 , H01L2224/0401 , H01L2224/05001 , H01L2224/0554 , H01L2224/10126 , H01L2224/13005 , H01L2224/16225 , H01L2924/12044 , H01L2924/15311 , H01L2924/00
摘要： The embodiments described above provide mechanisms for forming metal bumps on metal pads with testing pads on a packaged integrated circuit (IC) chip. A passivation layer is formed to cover the testing pads and possibly portions of metal pads. The passivation layer does not cover surfaces away from the testing pad region and the metal pad region. The limited covering of the testing pads and the portions of the metal pads by the passivation layer reduces interface resistance for a UBM layer formed between the metal pads and the metal bumps. Such reduction of interface resistance leads to the reduction of resistance of the metal bumps.
摘要翻译： 上述实施例提供了在封装的集成电路（IC）芯片上用测试焊盘在金属焊盘上形成金属凸块的机构。 形成钝化层以覆盖测试焊盘和可能的金属焊盘部分。 钝化层不覆盖远离测试焊盘区域和金属焊盘区域的表面。 通过钝化层测试焊盘和金属焊盘部分的有限覆盖减少了形成在金属焊盘和金属凸块之间的UBM层的界面电阻。 这种界面电阻的降低导致金属凸块的电阻降低。
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公开(公告)号：US08753971B2
公开(公告)日：2014-06-17
申请号：US13427430
申请日：2012-03-22
申请人： Tzuan-Horng Liu , Shang-Yun Hou , Shin-Puu Jeng , Wei-Cheng Wu , Hsiu-Ping Wei , Chih-Hua Chen , Chen-Cheng Kuo , Chen-Shien Chen , Ming Hung Tseng
发明人： Tzuan-Horng Liu , Shang-Yun Hou , Shin-Puu Jeng , Wei-Cheng Wu , Hsiu-Ping Wei , Chih-Hua Chen , Chen-Cheng Kuo , Chen-Shien Chen , Ming Hung Tseng
IPC分类号： H01L21/44
CPC分类号： H01L23/585 , H01L23/552 , H01L23/562 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05012 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/1147 , H01L2224/11912 , H01L2224/13022 , H01L2224/13147 , H01L2224/13655 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要： A method of forming an integrated circuit structure is provided. The method includes forming a metal pad at a major surface of a semiconductor chip, forming an under-bump metallurgy (UBM) over the metal pad such that the UBM and the metal pad are in contact, forming a dummy pattern at a same level as the metal pad, the dummy pattern formed of a same metallic material as the metal pad and electrically disconnected from the metal pad, and forming a metal bump over the UBM such that the metal bump is electrically connected to the UBM and no metal bump in the semiconductor chip is formed over the dummy pattern.
摘要翻译： 提供一种形成集成电路结构的方法。 该方法包括在半导体芯片的主表面上形成金属焊盘，在金属焊盘上形成凸块下冶金（UBM），使得UBM和金属焊盘接触，形成与 金属焊盘，由与金属焊盘相同的金属材料形成的虚拟图案，并与金属焊盘电气断开，并在UBM上形成金属凸块，使得金属凸块电连接到UBM，并且在金属焊盘中没有金属凸块 在虚拟图案上形成半导体芯片。
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公开(公告)号：US20140027900A1
公开(公告)日：2014-01-30
申请号：US13558082
申请日：2012-07-25
申请人： Tzu-Wei Chiu , Tzu-Yu Wang , Shang-Yun Hou , Shin-Puu Jeng , Hsien-Wei Chen , Hung-An Teng , Wei-Cheng Wu
发明人： Tzu-Wei Chiu , Tzu-Yu Wang , Shang-Yun Hou , Shin-Puu Jeng , Hsien-Wei Chen , Hung-An Teng , Wei-Cheng Wu
CPC分类号： H01L24/81 , B23K1/0016 , C23C14/165 , C23C14/34 , C23C18/32 , C23C18/42 , H01L23/3192 , H01L23/562 , H01L24/11 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05572 , H01L2224/05582 , H01L2224/05647 , H01L2224/05666 , H01L2224/10125 , H01L2224/114 , H01L2224/1145 , H01L2224/1146 , H01L2224/1147 , H01L2224/119 , H01L2224/11903 , H01L2224/13005 , H01L2224/13012 , H01L2224/13019 , H01L2224/13022 , H01L2224/13076 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/13166 , H01L2224/13562 , H01L2224/13564 , H01L2224/13583 , H01L2224/13644 , H01L2224/13655 , H01L2224/13664 , H01L2224/16058 , H01L2224/16059 , H01L2224/16145 , H01L2224/16148 , H01L2224/8112 , H01L2224/81141 , H01L2224/81193 , H01L2224/81345 , H01L2224/81365 , H01L2224/81815 , H01L2224/94 , H01L2225/06513 , H01L2225/06593 , H01L2924/00014 , H01L2924/014 , H01L2924/13091 , H01L2224/81 , H01L2924/00012 , H01L2924/207 , H01L2924/206 , H01L2224/05552 , H01L2924/00
摘要： A bump structure for electrically coupling semiconductor components is provided. The bump structure includes a first bump on a first semiconductor component and a second bump on a second semiconductor component. The first bump has a first non-flat portion (e.g., a convex projection) and the second bump has a second non-flat portion (e.g., a concave recess). The bump structure also includes a solder joint formed between the first and second non-flat portions to electrically couple the semiconductor components.
摘要翻译： 提供了用于电耦合半导体部件的凸块结构。 凸块结构包括在第一半导体部件上的第一凸块和第二半导体部件上的第二凸块。 第一凸起具有第一非平坦部分（例如，凸起的凸起），并且第二凸起具有第二非平坦部分（例如，凹形凹部）。 凸起结构还包括形成在第一和第二非平坦部分之间的焊接接头以电耦合半导体部件。
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公开(公告)号：US20120178252A1
公开(公告)日：2012-07-12
申请号：US13427430
申请日：2012-03-22
申请人： Tzuan-Horng Liu , Shang-Yun Hou , Shin-Puu Jeng , Wei-Cheng Wu , Hsiu-Ping Wei , Chih-Hua Chen , Chen-Cheng Kuo , Chen-Shien Chen , Ming Hung Tseng
发明人： Tzuan-Horng Liu , Shang-Yun Hou , Shin-Puu Jeng , Wei-Cheng Wu , Hsiu-Ping Wei , Chih-Hua Chen , Chen-Cheng Kuo , Chen-Shien Chen , Ming Hung Tseng
IPC分类号： H01L21/768
CPC分类号： H01L23/585 , H01L23/552 , H01L23/562 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05012 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/1147 , H01L2224/11912 , H01L2224/13022 , H01L2224/13147 , H01L2224/13655 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要： A method of forming an integrated circuit structure is provided. The method includes forming a metal pad at a major surface of a semiconductor chip, forming an under-bump metallurgy (UBM) over the metal pad such that the UBM and the metal pad are in contact, forming a dummy pattern at a same level as the metal pad, the dummy pattern formed of a same metallic material as the metal pad and electrically disconnected from the metal pad, and forming a metal bump over the UBM such that the metal bump is electrically connected to the UBM and no metal bump in the semiconductor chip is formed over the dummy pattern.
摘要翻译： 提供一种形成集成电路结构的方法。 该方法包括在半导体芯片的主表面上形成金属焊盘，在金属焊盘上形成凸块下冶金（UBM），使得UBM和金属焊盘接触，形成与 金属焊盘，由与金属焊盘相同的金属材料形成的虚拟图案，并与金属焊盘电气断开，并在UBM上形成金属凸块，使得金属凸块电连接到UBM，并且在金属焊盘中没有金属凸块 在虚拟图案上形成半导体芯片。
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公开(公告)号：US09553053B2
公开(公告)日：2017-01-24
申请号：US13558082
申请日：2012-07-25
申请人： Tzu-Wei Chiu , Tzu-Yu Wang , Shang-Yun Hou , Shin-Puu Jeng , Hsien-Wei Chen , Hung-An Teng , Wei-Cheng Wu
发明人： Tzu-Wei Chiu , Tzu-Yu Wang , Shang-Yun Hou , Shin-Puu Jeng , Hsien-Wei Chen , Hung-An Teng , Wei-Cheng Wu
CPC分类号： H01L24/81 , B23K1/0016 , C23C14/165 , C23C14/34 , C23C18/32 , C23C18/42 , H01L23/3192 , H01L23/562 , H01L24/11 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05572 , H01L2224/05582 , H01L2224/05647 , H01L2224/05666 , H01L2224/10125 , H01L2224/114 , H01L2224/1145 , H01L2224/1146 , H01L2224/1147 , H01L2224/119 , H01L2224/11903 , H01L2224/13005 , H01L2224/13012 , H01L2224/13019 , H01L2224/13022 , H01L2224/13076 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/13166 , H01L2224/13562 , H01L2224/13564 , H01L2224/13583 , H01L2224/13644 , H01L2224/13655 , H01L2224/13664 , H01L2224/16058 , H01L2224/16059 , H01L2224/16145 , H01L2224/16148 , H01L2224/8112 , H01L2224/81141 , H01L2224/81193 , H01L2224/81345 , H01L2224/81365 , H01L2224/81815 , H01L2224/94 , H01L2225/06513 , H01L2225/06593 , H01L2924/00014 , H01L2924/014 , H01L2924/13091 , H01L2224/81 , H01L2924/00012 , H01L2924/207 , H01L2924/206 , H01L2224/05552 , H01L2924/00
摘要： A bump structure for electrically coupling semiconductor components is provided. The bump structure includes a first bump on a first semiconductor component and a second bump on a second semiconductor component. The first bump has a first non-flat portion (e.g., a convex projection) and the second bump has a second non-flat portion (e.g., a concave recess). The bump structure also includes a solder joint formed between the first and second non-flat portions to electrically couple the semiconductor components.
摘要翻译： 提供了用于电耦合半导体部件的凸块结构。 凸块结构包括在第一半导体部件上的第一凸块和第二半导体部件上的第二凸块。 第一凸起具有第一非平坦部分（例如，凸起的凸起），并且第二凸起具有第二非平坦部分（例如，凹形凹部）。 凸起结构还包括形成在第一和第二非平坦部分之间的焊接接头以电耦合半导体部件。
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公开(公告)号：US08283781B2
公开(公告)日：2012-10-09
申请号：US12879512
申请日：2010-09-10
申请人： Wei-Cheng Wu , Shang-Yun Hou , Shin-Puu Jeng , Tzuan-Horng Liu , Tzu-Wei Chiu , Chao-Wen Shih
发明人： Wei-Cheng Wu , Shang-Yun Hou , Shin-Puu Jeng , Tzuan-Horng Liu , Tzu-Wei Chiu , Chao-Wen Shih
IPC分类号： H01L29/40
CPC分类号： H01L24/11 , H01L23/3114 , H01L23/3157 , H01L23/525 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/02126 , H01L2224/0235 , H01L2224/0345 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05005 , H01L2224/05008 , H01L2224/05012 , H01L2224/05014 , H01L2224/05015 , H01L2224/05018 , H01L2224/05022 , H01L2224/05027 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05541 , H01L2224/05558 , H01L2224/05559 , H01L2224/05562 , H01L2224/05572 , H01L2224/05573 , H01L2224/05582 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/05687 , H01L2224/06131 , H01L2224/10126 , H01L2224/1132 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11849 , H01L2224/11912 , H01L2224/1308 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/94 , H01L2924/00014 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/35 , H01L2924/3512 , H01L2924/35121 , H01L2224/03 , H01L2224/11 , H01L2924/04941 , H01L2924/04953 , H01L2924/01028 , H01L2924/01022 , H01L2924/01083 , H01L2924/01051 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device has a pad structure with a ring-shaped stress buffer layer between a metal pad and an under-bump metallization (UBM) layer. The stress buffer layer is formed of a dielectric layer with a dielectric constant less than 3.5, a polymer layer, or an aluminum layer. The stress buffer layer is a circular ring, a square ring, an octagonal ring, or any other geometric ring.
摘要翻译： 半导体器件具有在金属焊盘和凸块下金属化（UBM）层之间具有环形应力缓冲层的焊盘结构。 应力缓冲层由介电常数小于3.5的介质层，聚合物层或铝层形成。 应力缓冲层是圆形环，方形环，八角形环或任何其它几何环。
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公开(公告)号：US08193639B2
公开(公告)日：2012-06-05
申请号：US12750468
申请日：2010-03-30
申请人： Tzuan-Horng Liu , Shang-Yun Hou , Shin-Puu Jeng , Wei-Cheng Wu , Hsiu-Ping Wei , Chih-Hua Chen , Chen-Cheng Kuo , Chen-Shien Chen , Ming Hung Tseng
发明人： Tzuan-Horng Liu , Shang-Yun Hou , Shin-Puu Jeng , Wei-Cheng Wu , Hsiu-Ping Wei , Chih-Hua Chen , Chen-Cheng Kuo , Chen-Shien Chen , Ming Hung Tseng
IPC分类号： H01L23/485
CPC分类号： H01L23/585 , H01L23/552 , H01L23/562 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05012 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/1147 , H01L2224/11912 , H01L2224/13022 , H01L2224/13147 , H01L2224/13655 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要： An integrated circuit structure includes a semiconductor chip, a metal pad at a major surface of the semiconductor chip, and an under-bump metallurgy (UBM) over and contacting the metal pad. A metal bump is formed over and electrically connected to the UBM. A dummy pattern is formed at a same level, and formed of a same metallic material, as the metal pad.
摘要翻译： 集成电路结构包括半导体芯片，在半导体芯片的主表面处的金属焊盘和在凸块下金属（UBM）上并与金属焊盘接触的集成电路结构。 金属凸块形成在UBM上并与UBM电连接。 在同一水平上形成虚拟图案，并由与金属垫相同的金属材料形成。
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公开(公告)号：US09048233B2
公开(公告)日：2015-06-02
申请号：US12787661
申请日：2010-05-26
申请人： Wei-Cheng Wu , Shang-Yun Hou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Wei-Cheng Wu , Shang-Yun Hou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： H01L21/00 , H01L23/498 , H01L25/065 , H01L25/00 , H01L23/31
CPC分类号： H01L23/49827 , H01L21/486 , H01L21/565 , H01L21/76877 , H01L21/76895 , H01L23/3128 , H01L23/49816 , H01L23/49833 , H01L24/11 , H01L24/17 , H01L24/81 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L2224/05573 , H01L2224/11002 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06572 , H01L2924/01019 , H01L2924/10253 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/381 , H01L2924/00 , H01L2224/05624 , H01L2924/00014 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/05684
摘要： A package system includes an integrated circuit disposed over an interposer. The interposer includes a first interconnect structure. A first substrate is disposed over the first interconnect structure. The first substrate includes at least one first through silicon via (TSV) structure therein. A molding compound material is disposed over the first interconnect structure and around the first substrate. The integrated circuit is electrically coupled with the at least one first TSV structure.
摘要翻译： 封装系统包括设置在插入件上的集成电路。 插入器包括第一互连结构。 第一衬底设置在第一互连结构之上。 第一衬底包括其中的至少一个第一至硅通孔（TSV）结构。 模制复合材料设置在第一互连结构上并且围绕第一基板。 集成电路与至少一个第一TSV结构电耦合。
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公开(公告)号：US20110241202A1
公开(公告)日：2011-10-06
申请号：US12750468
申请日：2010-03-30
申请人： Tzuan-Horng Liu , Shang-Yun Hou , Shin-Puu Jeng , Wei-Cheng Wu , Hsiu-Ping Wei , Chih-Hua Chen , Chen-Cheng Kuo , Chen-Shien Chen , Ming Hung Tseng
发明人： Tzuan-Horng Liu , Shang-Yun Hou , Shin-Puu Jeng , Wei-Cheng Wu , Hsiu-Ping Wei , Chih-Hua Chen , Chen-Cheng Kuo , Chen-Shien Chen , Ming Hung Tseng
IPC分类号： H01L23/485
CPC分类号： H01L23/585 , H01L23/552 , H01L23/562 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05012 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/1147 , H01L2224/11912 , H01L2224/13022 , H01L2224/13147 , H01L2224/13655 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要： An integrated circuit structure includes a semiconductor chip, a metal pad at a major surface of the semiconductor chip, and an under-bump metallurgy (UBM) over and contacting the metal pad. A metal bump is formed over and electrically connected to the UBM. A dummy pattern is formed at a same level, and formed of a same metallic material, as the metal pad.
摘要翻译： 集成电路结构包括半导体芯片，在半导体芯片的主表面处的金属焊盘和在凸块下金属（UBM）上方并接触金属焊盘。 金属凸块形成在UBM上并与UBM电连接。 在同一水平上形成虚拟图案，并由与金属垫相同的金属材料形成。
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20.发明授权公开(公告)号：US08896089B2
公开(公告)日：2014-11-25
申请号：US13292792
申请日：2011-11-09
申请人： Tzu-Wei Chiu , Tzu-Yu Wang , Wei-Cheng Wu , Chun-Yi Liu , Hsien-Pin Hu , Shang-Yun Hou
发明人： Tzu-Wei Chiu , Tzu-Yu Wang , Wei-Cheng Wu , Chun-Yi Liu , Hsien-Pin Hu , Shang-Yun Hou
IPC分类号： H01L23/52 , H01L21/82 , H01L23/498 , H01L23/538 , H01L23/00 , H01L23/525 , H01L23/48 , H01L23/31
CPC分类号： H01L23/49827 , H01L23/3128 , H01L23/481 , H01L23/525 , H01L23/5256 , H01L23/5382 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/13184 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81192 , H01L2924/00011 , H01L2924/01322 , H01L2924/12042 , H01L2924/15311 , H01L2924/157 , H01L2924/00 , H01L2224/81805
摘要： Interposers for semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, an interposer includes a substrate, a contact pad disposed on the substrate, and a first through-via in the substrate coupled to the contact pad. A first fuse is coupled to the first through-via. A second through-via in the substrate is coupled to the contact pad, and a second fuse is coupled to the second through-via.
摘要翻译： 公开了半导体器件用插入件及其制造方法。 在一个实施例中，插入器包括衬底，设置在衬底上的接触焊盘以及耦合到接触焊盘的衬底中的第一通孔。 第一保险丝耦合到第一通孔。 衬底中的第二通孔耦合到接触焊盘，并且第二保险丝耦合到第二通孔。
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