中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

36 records (took 0.018 seconds)

    CHIP PACKAGE AND METHOD FOR FORMING THE SAME
    12.
    发明申请
    CHIP PACKAGE AND METHOD FOR FORMING THE SAME 有权
    芯片包装及其形成方法

    公开(公告)号：US20130153933A1

    公开(公告)日：2013-06-20

    申请号：US13720627

    申请日：2012-12-19

    Applicant: XINTEC INC.

    Inventor： Po-Han LEE ,  Chien-Hung LIU

    IPC: H01L31/12 ,  H01L31/18

    CPC classification number: H01L31/12 ,  H01L31/1876

    Abstract: An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a sensor region formed in the semiconductor substrate; a light emitting device disposed on the second surface of the semiconductor substrate; at least one first conducting bump disposed on the first surface of the semiconductor substrate and electrically connected to the sensor region; at least one second conducting bump disposed on the first surface of the semiconductor substrate and electrically connected to the light emitting device; and an insulating layer located on the semiconductor substrate to electrically insulate the semiconductor substrate from the at least one first conducting bump and the at least one second conducting bump.

    Abstract translation: 本发明的实施例提供一种芯片封装，其包括：具有第一表面和第二表面的半导体衬底; 形成在所述半导体衬底中的传感器区域; 设置在所述半导体衬底的第二表面上的发光器件; 至少一个第一导电凸块，设置在所述半导体衬底的所述第一表面上并电连接到所述传感器区域; 设置在所述半导体衬底的所述第一表面上并电连接到所述发光器件的至少一个第二导电凸块; 以及绝缘层，其位于所述半导体衬底上以将所述半导体衬底与所述至少一个第一导电凸块和所述至少一个第二导电凸块电绝缘。

    CHIP PACKAGE AND FABRICATION METHOD THEREOF
    13.
    发明申请
    CHIP PACKAGE AND FABRICATION METHOD THEREOF 审中-公开
    芯片包装及其制造方法

    公开(公告)号：US20160229687A1

    公开(公告)日：2016-08-11

    申请号：US15008371

    申请日：2016-01-27

    Applicant: XINTEC INC.

    Inventor： Ying-Nan WEN ,  Ho-Yin YIU ,  Chien-Hung LIU

    IPC: B81B7/00 ,  B81C1/00

    CPC classification number: B81C1/00293 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242

    Abstract: A chip package included a chip, a first though hole, a laser stop structure, a first isolation layer, a second though hole and a conductive layer. The first though hole is extended from the second surface to the first surface of the chip to expose a conductive pad, and the laser stop structure is disposed on the conductive pad exposed by the first through hole, which an upper surface of the laser stop structure is above the second surface. The first isolation layer covers the second surface and the laser stop structure, and the first isolation layer has a third surface opposite to the second surface. The second though hole is extended from the third surface to the second surface to expose the laser stop structure, and a conductive layer is on the third surface and extended into the second though hole to contact the laser stop structure.

    Abstract translation: 芯片封装包括芯片，第一通孔，激光停止结构，第一隔离层，第二通孔和导电层。 第一通孔从芯片的第二表面延伸到第一表面以暴露导电焊盘，并且激光停止结构设置在由第一通孔暴露的导电焊盘上，激光停止结构的上表面 在第二个表面之上。 第一隔离层覆盖第二表面和激光停止结构，第一隔离层具有与第二表面相对的第三表面。 第二通孔从第三表面延伸到第二表面以暴露激光停止结构，并且导电层在第三表面上并延伸到第二通孔中以接触激光停止结构。

    CHIP PACKAGE AND METHOD FOR FORMING THE SAME
    14.
    发明申请
    CHIP PACKAGE AND METHOD FOR FORMING THE SAME 有权
    芯片包装及其形成方法

    公开(公告)号：US20160141219A1

    公开(公告)日：2016-05-19

    申请号：US15008241

    申请日：2016-01-27

    Applicant: XINTEC INC.

    Inventor： Chien-Hung LIU

    IPC: H01L23/31 ,  H01L23/29 ,  H01L21/48 ,  G06K9/00 ,  H05K1/18 ,  H05K1/02 ,  H05K1/11 ,  H05K3/32 ,  H01L23/498 ,  H01L21/56

    CPC classification number: H01L23/3192 ,  G01L19/0061 ,  G01L19/06 ,  G01L19/14 ,  G06F21/32 ,  G06K9/00 ,  G06K9/00006 ,  H01L21/0212 ,  H01L21/02263 ,  H01L21/56 ,  H01L23/291 ,  H01L23/3114 ,  H01L23/3185 ,  H01L23/525 ,  H01L2021/60022 ,  H01L2224/11 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/181 ,  H05K3/32

    Abstract: A chip package includes a chip, a dam layer, a permanent adhesive layer, a support, a buffer layer, a redistribution layer, a passivation layer, and a conducting structure. A conducting pad and a sensing device of the chip are located on a first surface of a substrate of the chip, and the conducting pad protrudes from the side surface of the substrate. The dam layer surrounds the sensing device. The permanent adhesive layer is between the support and the substrate. The support and the permanent adhesive layer have a trench to expose the conducting pad. The buffer layer is located on the support. The redistribution layer is located on the buffer layer and on the support, the permanent adhesive layer, and the conducting pad facing the trench. The passivation layer covers the redistribution layer, the buffer layer, and the conducting pad.

    Abstract translation: 芯片封装包括芯片，阻挡层，永久粘合剂层，支撑体，缓冲层，再分配层，钝化层和导电结构。 芯片的导电焊盘和感测装置位于芯片的基板的第一表面上，并且导电焊盘从基板的侧表面突出。 坝层围绕感测装置。 永久性粘合剂层位于载体和基底之间。 支撑体和永久粘合剂层具有暴露导电垫的沟槽。 缓冲层位于支架上。 再分配层位于缓冲层上，在支撑体上，永久性粘合剂层和导电垫面对沟槽。 钝化层覆盖再分配层，缓冲层和导电焊盘。

    SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
    15.
    发明申请
    SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF 有权
    半导体封装及其制造方法

    公开(公告)号：US20160118506A1

    公开(公告)日：2016-04-28

    申请号：US14570949

    申请日：2014-12-15

    Applicant: XINTEC INC.

    Inventor： Chien-Hung LIU

    IPC: H01L31/0203 ,  H01L35/02 ,  H01L35/34 ,  H01L31/18 ,  H01L31/02

    CPC classification number: H01L35/08 ,  G01J5/024 ,  G01J5/045 ,  G01J5/20 ,  H01L21/78 ,  H01L23/053 ,  H01L23/3178 ,  H01L23/3185 ,  H01L23/498 ,  H01L24/33 ,  H01L24/94 ,  H01L27/14618 ,  H01L27/1462 ,  H01L27/14636 ,  H01L27/14685 ,  H01L27/14687 ,  H01L31/02005 ,  H01L31/0203 ,  H01L31/1876 ,  H01L35/02 ,  H01L35/10 ,  H01L35/34 ,  H01L2224/11

    Abstract: A semiconductor package includes a substrate, at least one support, a cover, and a plate. The substrate has at least one light sensor or thermal sensor, a first surface, and a second surface opposite to the first surface. The light sensor or the thermal sensor is disposed on the first surface. The second surface has an opening to expose the light sensor (or the thermal sensor). The support is disposed on the first surface. The cover is disposed on the support, such that the cover is above the light sensor (or the thermal sensor) to form a first space between the cover and the light sensor (or the thermal sensor). The plate is placed on the second surface to cover the opening, such that a second space is formed between the plate and the light sensor (or the thermal sensor).

    Abstract translation: 半导体封装包括基板，至少一个支撑件，盖板和板。 衬底具有至少一个光传感器或热传感器，第一表面和与第一表面相对的第二表面。 光传感器或热传感器设置在第一表面上。 第二表面具有露出光传感器（或热传感器）的开口。 支撑件设置在第一表面上。 盖子设置在支撑件上，使得盖子在光传感器（或热传感器）上方，以在盖和光传感器（或热传感器）之间形成第一空间。 板被放置在第二表面上以覆盖开口，使得在板和光传感器（或热传感器）之间形成第二空间。

    MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE
    18.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE 有权
    半导体结构的制造方法

    公开(公告)号：US20150279900A1

    公开(公告)日：2015-10-01

    申请号：US14613231

    申请日：2015-02-03

    Applicant: XINTEC INC.

    Inventor： Chien-Hung LIU

    IPC: H01L27/146

    CPC classification number: H01L27/14685 ,  H01L27/14618 ,  H01L27/14687 ,  H01L2224/11

    Abstract: A manufacturing method of a semiconductor structure includes the following steps. A carrier and a dam element are provided, and the dam element is adhered to the carrier by a temporary bonding layer. The dam element is bonded on the wafer. A first isolation layer, a redistribution layer, a second isolation layer, and a conductive structure are formed on the wafer in sequence. The carrier, the dam element and the wafer are diced to form a semiconductor element. The semiconductor element is disposed on a printed circuit board, such that the conductive structure is electrically connected to the printed circuit board. An adhesion force of the temporary bonding layer is eliminated to remove the carrier. A lens assembly is disposed on the printed circuit board, such that the semiconductor element without the carrier is located in the lens assembly.

    Abstract translation: 半导体结构的制造方法包括以下步骤。 提供了载体和坝元件，并且坝元件通过临时粘合层粘附到载体上。 坝体结合在晶片上。 在晶片上依次形成第一隔离层，再分配层，第二隔离层和导电结构。 将载体，坝元件和晶片切割成半导体元件。 半导体元件设置在印刷电路板上，使得导电结构电连接到印刷电路板。 消除了临时粘合层的粘合力以除去载体。 透镜组件设置在印刷电路板上，使得没有载体的半导体元件位于透镜组件中。

    CHIP PACKAGE AND METHOD FOR FORMING THE SAME
    20.
    发明申请
    CHIP PACKAGE AND METHOD FOR FORMING THE SAME 审中-公开
    芯片包装及其形成方法

    公开(公告)号：US20130307147A1

    公开(公告)日：2013-11-21

    申请号：US13895235

    申请日：2013-05-15

    Applicant: XINTEC INC.

    Inventor： Chien-Hung LIU

    IPC: H01L23/498 ,  H01L21/78

    CPC classification number: H01L23/49811 ,  B81B7/0061 ,  B81B7/0067 ,  H01L21/561 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3128 ,  H01L27/14618 ,  H01L33/486 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Embodiments of the present invention provide a chip package including: a substrate having a first surface and a second surface; a device region located in the substrate; a conducting pad structure disposed on the substrate and electrically connected to the device region; a spacer layer disposed on the first surface of the substrate; a second substrate disposed on the spacer layer, wherein a cavity is created and surrounded by the second substrate, the spacer layer, and the substrate on the device region; and a through-hole extending from a surface of the second substrate towards the substrate, wherein the through-hole connects to the cavity.

    Abstract translation: 本发明的实施例提供一种芯片封装，包括：具有第一表面和第二表面的基板; 位于所述基板中的器件区域; 导电焊盘结构，设置在所述基板上并电连接到所述器件区域; 设置在所述基板的第一表面上的间隔层; 设置在所述间隔层上的第二衬底，其中由所述第二衬底，所述间隔层和所述器件区域上的衬底产生并包围空腔; 以及从所述第二基板的表面朝向所述基板延伸的通孔，其中所述通孔连接到所述空腔。

Patent Agency Ranking