公开(公告)号：US20140193950A1

公开(公告)日：2014-07-10

申请号：US14207247

申请日：2014-03-12

Applicant: XINTEC INC.

Inventor： Shu-Ming CHANG ,  Bai-Yao LOU ,  Ying-Nan WEN ,  Chien-Hung LIU

IPC: H01L21/50

CPC classification number: H01L21/50 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/32 ,  H01L24/81 ,  H01L24/92 ,  H01L24/93 ,  H01L24/94 ,  H01L33/62 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02371 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/03825 ,  H01L2224/039 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/056 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/119 ,  H01L2224/1191 ,  H01L2224/13021 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/136 ,  H01L2224/16225 ,  H01L2224/32052 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/92142 ,  H01L2224/92143 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2224/0231 ,  H01L2224/11 ,  H01L2224/1182 ,  H01L2224/03 ,  H01L2224/0382 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05552

Abstract: An electronic device package is disclosed. The package includes at least one semiconductor chip having a first surface and a second surface opposite thereto, in which at least one redistribution layer is disposed on the first surface of the semiconductor chip and is electrically connected to at least one conductive pad structure. At least one abut portion is disposed on the redistribution layer and electrically contacting thereto. A passivation layer covers the first surface of the semiconductor chip and surrounds the abut portion. A substrate is attached onto the second surface of the semiconductor chip. A fabrication method of the electronic device package is also disclosed.

Abstract translation: 公开了一种电子器件封装。 该封装包括至少一个具有第一表面和与其相对的第二表面的半导体芯片，其中至少一个再分配层设置在半导体芯片的第一表面上并与至少一个导电焊盘结构电连接。 至少一个邻接部分设置在再分布层上并与其电接触。 钝化层覆盖半导体芯片的第一表面并围绕邻接部分。 将衬底附着到半导体芯片的第二表面上。 还公开了一种电子器件封装的制造方法。

公开(公告)号：US20150214162A1

公开(公告)日：2015-07-30

申请号：US14604525

申请日：2015-01-23

Applicant: XINTEC INC.

Inventor： Jiun-Yen LAI ,  Yu-Wen HU ,  Bai-Yao LOU ,  Chia-Sheng LIN ,  Yen-Shih HO ,  Hsin KUAN

IPC: H01L23/00

CPC classification number: H01L24/81 ,  H01L23/5227 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/48 ,  H01L28/10 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/03902 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05005 ,  H01L2224/05007 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05562 ,  H01L2224/05564 ,  H01L2224/05571 ,  H01L2224/05583 ,  H01L2224/05644 ,  H01L2224/13021 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13562 ,  H01L2224/13644 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/014

Abstract: A manufacturing method of a passive component structure includes the following steps. A protection layer is formed on a substrate, and bond pads of the substrate are respectively exposed through protection layer openings. A conductive layer is formed on the bond pads and the protection layer. A patterned photoresist layer is formed on the conductive layer, and the conductive layer adjacent to the protection layer openings is exposed through photoresist layer openings. Copper bumps are respectively electroplated on the conductive layer. The photoresist layer and the conductive layer not covered by the copper bumps are removed. A passivation layer is formed on the copper bumps and the protection layer, and at least one of the copper bumps is exposed through a passivation layer opening. A diffusion barrier layer and an oxidation barrier layer are chemically plated in sequence on the copper bump.

Abstract translation: 无源元件结构的制造方法包括以下步骤。 保护层形成在基板上，并且基板的接合焊盘分别通过保护层开口露出。 在接合焊盘和保护层上形成导电层。 在导电层上形成图案化的光致抗蚀剂层，并且与保护层开口相邻的导电层通过光致抗蚀剂层开口露出。 铜凸块分别电镀在导电层上。 除去未被铜凸块覆盖的光致抗蚀剂层和导电层。 在铜凸块和保护层上形成钝化层，并通过钝化层开口露出至少一个铜凸块。 扩散阻挡层和氧化阻挡层依次化学镀在铜凸块上。

公开(公告)号：US20140252642A1

公开(公告)日：2014-09-11

申请号：US14198542

申请日：2014-03-05

Applicant: XINTEC INC.

Inventor： Bai-Yao LOU ,  Shih-Kuang CHEN ,  Sheng-Yuan LEE

IPC: H01L23/48 ,  H01L21/78

CPC classification number: H01L23/48 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3114 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An embodiment of the invention provides a chip package which includes: a semiconductor substrate; a device region formed in the semiconductor substrate; at least a conducting pad disposed over a surface of the semiconductor substrate; a protection plate disposed over the surface of the semiconductor substrate; and a spacer layer disposed between the surface of the semiconductor substrate and the protection plate, wherein the protection plate and the spacer layer surround a cavity over the device region, the spacer layer has an outer side surface away from the cavity, and the outer side surface of the spacer layer is not a cutting surface.

Abstract translation: 本发明的实施例提供一种芯片封装，其包括：半导体衬底; 形成在所述半导体衬底中的器件区域; 至少一个设置在所述半导体衬底的表面上的导电焊盘; 设置在所述半导体衬底的表面上的保护板; 以及设置在所述半导体衬底的表面和所述保护板之间的间隔层，其中所述保护板和所述间隔层围绕所述器件区域的空腔，所述间隔层具有远离所述腔的外侧表面，并且所述外侧 间隔层的表面不是切割面。

公开(公告)号：US20140213010A1

公开(公告)日：2014-07-31

申请号：US14166749

申请日：2014-01-28

Applicant: Xintec Inc.

Inventor： Chih-Hao CHEN ,  Bai-Yao LOU ,  Shih-Kuang CHEN

IPC: H01L27/146

CPC classification number: H01L27/14687 ,  H01L21/2007 ,  H01L27/14618 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A wafer packaging method includes the following steps. A light transmissive carrier is provided. A hydrolytic temporary bonding layer is formed on the light transmissive carrier. A first surface of a light transmissive protection sheet is bonded to the hydrolytic temporary bonding layer, such that the hydrolytic temporary bonding layer is located between the light transmissive protection sheet and the light transmissive carrier. A second surface of the light transmissive protection sheet facing away from the first surface is bonded to a third surface of a wafer. The light transmissive carrier, the hydrolytic temporary bonding layer, the light transmissive protection sheet, and the wafer are immersed in a high temperature liquid, such that adhesion force of the hydrolytic temporary bonding layer is eliminated. The light transmissive protection sheet and the wafer are obtained from the high temperature liquid.

Abstract translation: 晶片封装方法包括以下步骤。 提供透光载体。 在透光性载体上形成水解性临时粘接层。 透光性保护片的第一表面与水解性临时粘合层接合，使得水解临时粘合层位于透光保护片和透光性载体之间。 透光保护片的背离第一表面的第二表面被结合到晶片的第三表面。 透光载体，水解临时粘合层，透光保护片和晶片浸入高温液体中，从而消除了水解临时粘合层的粘附力。 透光保护片和晶片是从高温液体中获得的。

公开(公告)号：US20160380024A1

公开(公告)日：2016-12-29

申请号：US15261808

申请日：2016-09-09

Applicant: XINTEC INC.

Inventor： Chih-Hao CHEN ,  Bai-Yao LOU ,  Shih-Kuang CHEN

IPC: H01L27/146

CPC classification number: H01L27/14687 ,  H01L27/14618 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14685 ,  H01L27/14698 ,  H01L2224/13

Abstract: A method for fabricating an image sensor chip package begins at providing a wafer, which includes forming a plurality of image sensor components on a substrate, forming a plurality of spacers on the substrate for separating the image sensor components, and disposing a transparent plate on the spacers. The method further includes forming a plurality of stress notches on the transparent plate. After the stress notches are formed, the transparent plate is pressed and the substrate is cut at the second chambers. The transparent plate is broken along the stress notches.

Abstract translation: 制造图像传感器芯片封装的方法开始于提供晶片，其包括在基板上形成多个图像传感器部件，在基板上形成多个间隔物以分离图像传感器部件，并将透明板设置在 间隔物 该方法还包括在透明板上形成多个应力凹口。 在形成应力凹口之后，按压透明板并在第二腔室切割基板。 透明板沿着应力凹口断裂。

公开(公告)号：US20140231966A1

公开(公告)日：2014-08-21

申请号：US14260205

申请日：2014-04-23

Applicant: XINTEC INC.

Inventor： Bai-Yao LOU ,  Tsang-Yu LIU ,  Chia-Sheng LIN ,  Tzu-Hsiang HUNG

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/04 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05025 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/05687 ,  H01L2224/0569 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/32225 ,  H01L2224/73153 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00012 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552

Abstract: An embodiment of the invention provides a chip package which includes a substrate having a first surface and a second surface; a conducting pad structure located on the first surface; a dielectric layer located on the first surface of the substrate and the conducting pad structure, wherein the dielectric layer has an opening exposing a portion of the conducting pad structure; and a cap layer located on the dielectric layer and filled into the opening.

Abstract translation: 本发明的实施例提供一种芯片封装，其包括具有第一表面和第二表面的基板; 位于所述第一表面上的导电垫结构; 位于所述基板的所述第一表面上的电介质层和所述导电焊盘结构，其中所述电介质层具有暴露所述导电焊盘结构的一部分的开口; 以及位于电介质层上并填充到开口中的盖层。

公开(公告)号：US20140191350A1

公开(公告)日：2014-07-10

申请号：US14150637

申请日：2014-01-08

Applicant: XINTEC INC.

Inventor： Chih-Hao CHEN ,  Bai-Yao LOU ,  Shih-Kuang CHEN

IPC: H01L31/0232 ,  H01L27/146

CPC classification number: H01L27/14687 ,  H01L27/14618 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14685 ,  H01L27/14698 ,  H01L2224/13

Abstract: An image sensor chip package is disclosed, which includes a substrate, an image sensor component formed on the substrate, a spacer formed on the substrate and surrounding the image sensor component, and a transparent plate. A stress notch is formed on a side of the transparent plate, and a breaking surface is extended from the stress notch. A method for fabricating the image sensor chip package is also disclosed.

Abstract translation: 公开了一种图像传感器芯片封装，其包括基板，形成在基板上的图像传感器部件，形成在基板上并围绕图像传感器部件的间隔件和透明板。 在透明板的一侧形成有应力缺口，并且断裂面从应力凹口延伸。 还公开了一种用于制造图像传感器芯片封装的方法。