公开(公告)号：US07498507B2

公开(公告)日：2009-03-03

申请号：US11081986

申请日：2005-03-16

申请人： Stanton Earl Weaver, Jr. ,  Robert John Wojnarowski

发明人： Stanton Earl Weaver, Jr. ,  Robert John Wojnarowski

IPC分类号： H01L35/30 ,  H02N10/00

CPC分类号： H01L35/32 ,  Y10T156/1092

摘要： A solid state thermal transfer device includes first and second electrically conductive substrates that are positioned opposite from one another. The solid state thermal transfer device also includes a sealing layer disposed between the first and second electrically conductive substrates and a plurality of hollow structures having a conductive material, wherein the plurality of hollow structures is contained by the sealing layer between the first and second electrically conductive substrates.

摘要翻译： 固态热转印装置包括彼此相对定位的第一和第二导电基板。 固态热转移装置还包括设置在第一和第二导电基板之间的密封层和具有导电材料的多个中空结构，其中多个中空结构由第一和第二导电 底物。

公开(公告)号：US07262444B2

公开(公告)日：2007-08-28

申请号：US11205903

申请日：2005-08-17

申请人： Raymond Albert Fillion ,  Richard Alfred Beaupre ,  Ahmed Elasser ,  Robert John Wojnarowski ,  Charles Steven Korman

发明人： Raymond Albert Fillion ,  Richard Alfred Beaupre ,  Ahmed Elasser ,  Robert John Wojnarowski ,  Charles Steven Korman

IPC分类号： H01L31/111 ,  H01L21/48

CPC分类号： H01L23/4822 ,  H01L23/4821 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/072 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/92135 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00

摘要： A semiconductor chip packaging structure comprising a dielectric film having one or more through holes aligned with the one or more contact pads of at least one power semiconductor chip. A patterned electrically conductive layer adjacent to the dielectric film has one or more electrically conductive posts which extend through the one or more though holes aligned with the contact pads to electrically couple the conductive layer to the contact pads. In certain embodiments, one or more air gaps may be formed between the dielectric film and the active surface of the at least one power semiconductor chip. Methods for fabricating the semiconductor chip packaging structure are also disclosed.

摘要翻译： 一种半导体芯片封装结构，包括具有与至少一个功率半导体芯片的一个或多个接触焊盘对准的一个或多个通孔的电介质膜。 与电介质膜相邻的图案化导电层具有一个或多个导电柱，其延伸穿过与接触焊盘对准的一个或多个通孔，以将导电层电耦合到接触焊盘。 在某些实施例中，可以在介电膜和至少一个功率半导体芯片的有源表面之间形成一个或多个气隙。 还公开了制造半导体芯片封装结构的方法。

公开(公告)号：US06474860B2

公开(公告)日：2002-11-05

申请号：US09861436

申请日：2001-05-21

申请人： Robert John Wojnarowski ,  Glenn Alan Forman ,  Yung Sheng Liu

发明人： Robert John Wojnarowski ,  Glenn Alan Forman ,  Yung Sheng Liu

IPC分类号： G06B626

CPC分类号： H01L24/73 ,  G02B6/4225 ,  G02B6/43 ,  H01L23/48 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/3025 ,  H01L2924/00

摘要： An optical interface for data communication that can be manufactured and aligned in a cost effective manner includes an array of optical emitters and an optical receiver are positioned within a predetermined tolerance with reference to each other so as to establish an optical data communication path. To search for and determine which of the emitters of the array achieves the best alignment, the optical emitters are individually energized in a sequence, while monitoring the output signal of the optical receiver. For subsequent data communications, the optical emitter determined to achieve the best alignment is employed.

摘要翻译： 可以以成本有效的方式制造和对准的用于数据通信的光学接口包括光发射器阵列和光学接收器相对于彼此定位在预定的公差内，以便建立光学数据通信路径。 为了搜索并确定阵列中的哪一个发射器达到最佳对准，在监视光接收机的输出信号的同时，光发射器以一个顺序分别通电。 对于随后的数据通信，采用确定达到最佳对准的光发射器。

公开(公告)号：US06396153B2

公开(公告)日：2002-05-28

申请号：US09768598

申请日：2001-01-25

申请人： Raymond Albert Fillion ,  Ernest Wayne Balch ,  Ronald Frank Kolc ,  William Edward Burdick, Jr. ,  Robert John Wojnarowski ,  Leonard Richard Douglas ,  Thomas Bert Gorczyca

发明人： Raymond Albert Fillion ,  Ernest Wayne Balch ,  Ronald Frank Kolc ,  William Edward Burdick, Jr. ,  Robert John Wojnarowski ,  Leonard Richard Douglas ,  Thomas Bert Gorczyca

IPC分类号： H01L2348

CPC分类号： H01L24/48 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/19 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/24227 ,  H01L2224/4824 ,  H01L2224/48463 ,  H01L2224/85399 ,  H01L2224/92144 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01073 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： One method for packaging at least one circuit chip includes: providing an interconnect layer including insulative material having a first side and a second side, initial metallization patterned on second side metallized portions of the second side and not on second side non-metallized portions of the second side, at least one substrate via extending from the first side to one of the second side metallized portions, and at least one chip via extending from the first side to one of the second side non-metallized portions; positioning the at least one circuit chip on the second side with at least one chip pad of the at least one circuit chip being aligned with the at least one chip via; and patterning connection metallization on selected portions of the first side of the interconnect layer and in the vias so as to extend to the at least one second side metallized portion and to the at least one chip pad. In related embodiments vias are pre-metallized and coupled to chip pads of the circuit chips by an electrically conductive binder. Thin film passive components and multilayer interconnections can additionally be incorporated into the package.

摘要翻译： 一种用于封装至少一个电路芯片的方法包括：提供包括具有第一侧和第二侧的绝缘材料的互连层，在第二侧的第二侧金属化部分上而不是在第二侧非金属化部分上图案化的初始金属化 第二侧，至少一个从第一侧延伸到第二侧金属化部分之一的衬底通孔;以及至少一个芯片通孔，其从第一侧延伸到第二侧非金属化部分之一; 将所述至少一个电路芯片定位在所述第二侧上，所述至少一个电路芯片的至少一个芯片焊盘与所述至少一个芯片通孔对准; 以及在所述互连层的第一侧和所述通孔的选定部分上图案化连接金属化，以便延伸到所述至少一个第二侧金属化部分和所述至少一个芯片焊盘。 在相关实施例中，通孔被预先金属化并且通过导电粘合剂耦合到电路芯片的芯片焊盘。 薄膜无源元件和多层互连可另外包含在封装中。

公开(公告)号：US06298551B1

公开(公告)日：2001-10-09

申请号：US09459586

申请日：1999-12-13

申请人： Robert John Wojnarowski ,  Barry Scott Whitmore ,  Bernard Gorowitz

发明人： Robert John Wojnarowski ,  Barry Scott Whitmore ,  Bernard Gorowitz

IPC分类号： H05K336

CPC分类号： H01L24/02 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/0401 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K3/326 ,  H05K3/3436 ,  H05K3/4092 ,  H05K2201/0373 ,  H05K2201/10257 ,  H05K2201/10378 ,  Y02P70/613 ,  Y10S438/94 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  H01L2924/00

摘要： An interface includes a surface having an electrically conductive pad; a compliant coating over the surface having a via extending to the pad; metallization patterned over the compliant coating and extending into the via; a low modulus dielectric interface layer overlying the compliant coating and having an interface via extending to the metallization; and a floating pad structure including floating pad metallization patterned over the dielectric interface layer with a first portion forming a central pad and a second portion forming an extension from the central pad extending into the interface via. Another interface includes a substrate including a low modulus dielectric interface material having a hole extending at least partially therethrough and a floating contact structure including electrically conductive material coating the hole with at least some of the floating pad metallization forming an extension from the hole. A conductive contact area interface may include an electrically conductive first contact area; an electrically conductive second contact area facing and being substantially aligned with the first contact area; and at least one interface structure coupled between the first and second contact areas and including an electrical conductor having a partially open interior to form a compliant joint between the first and second contact areas.

摘要翻译： 界面包括具有导电垫的表面; 表面上的柔顺涂层具有延伸到垫的通孔; 金属化图案化在柔性涂层上并延伸到通孔中; 覆盖顺应性涂层并具有延伸到金属化的界面的低模量介电界面层; 以及浮动衬垫结构，其包括在电介质界面层上图案化的浮动衬垫金属化，第一部分形成中心焊盘，第二部分形成从延伸到接口通孔的中心焊盘的延伸部分。 另一个界面包括一个衬底，该衬底包括一个具有至少部分贯穿其中延伸的孔的低模量介电界面材料，以及一个浮动接触结构，其包括导电材料，该导电材料涂覆孔，浮动金属化中的至少一些从孔形成延伸。 导电接触区界面可以包括导电的第一接触区域; 面向并基本上与第一接触区域对准的导电的第二接触区域; 以及耦合在所述第一和第二接触区域之间的至少一个接口结构，并且包括具有部分敞开的内部的电导体，以在所述第一和第二接触区域之间形成柔性接头。

公开(公告)号：US06272271B1

公开(公告)日：2001-08-07

申请号：US09301910

申请日：1999-04-29

申请人： Robert John Wojnarowski ,  Glenn Alan Forman ,  Yung Sheng Liu

发明人： Robert John Wojnarowski ,  Glenn Alan Forman ,  Yung Sheng Liu

IPC分类号： G02B626

CPC分类号： H01L24/73 ,  G02B6/4225 ,  G02B6/43 ,  H01L23/48 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/3025 ,  H01L2924/00

摘要： An optical interface for data communication that can be manufactured and aligned in a cost effective manner includes an array of optical emitters and an optical receiver are positioned within a predetermined tolerance with reference to each other so as to establish an optical data communication path. To search for and determine which of the emitters of the array achieves the best alignment, the optical emitters are individually energized in a sequence, while monitoring the output signal of the optical receiver. For subsequent data communications, the optical emitter determined to achieve the best alignment is employed.

公开(公告)号：US06262573B1

公开(公告)日：2001-07-17

申请号：US09397839

申请日：1999-09-17

申请人： Robert John Wojnarowski ,  Kenneth Brakeley Welles, II ,  William Paul Kornrumpf

发明人： Robert John Wojnarowski ,  Kenneth Brakeley Welles, II ,  William Paul Kornrumpf

IPC分类号： B61K910

CPC分类号： B61L23/044 ,  B61K9/10 ,  B61L3/121 ,  B61L25/025 ,  B61L2205/04 ,  G01M5/0025 ,  G01M5/0033 ,  G01M5/0091 ,  G01N27/82

摘要： An electromagnetic system for detecting cracked rail and enhancing traction when necessary, includes wiring coils around wheel axles, and a corresponding power source for supplying power to the coils for producing electromagnetic flux. The produced electromagnetic flux is routed through the wheel axles, wheels and rails in a closed circuit. When a cracked rail is encountered along the route, the circuit will be interrupted or open, resulting in a changed flux pattern. This pattern change is detected by a flux sensor, and the geographic location of the crack in the rail is determined. The electromagnetic system further includes an electromagnetic wheel loading means for generating an attraction to the rails. The generated attraction to the rails increases friction between the wheels and the rails, thereby increasing traction to enable hauling greater loads up steep grades.

摘要翻译： 一种用于检测裂纹轨道并在必要时增强牵引力的电磁系统包括轮轴周围的线圈线圈和用于向线圈供电以产生电磁通量的相应电源。 所产生的电磁通量在闭合回路中通过轮轴，轮子和轨道。 沿着路线遇到破裂的轨道时，电路将被中断或打开，导致通量变化曲线的变化。 这种模式变化由通量传感器检测，并确定轨道中裂纹的地理位置。 电磁系统还包括用于产生对轨道的吸引力的电磁轮加载装置。 所产生的对轨道的吸引力增加了车轮和轨道之间的摩擦，从而增加了牵引力，从而能够将更大的载荷牵引到陡坡上。

公开(公告)号：US06188301B1

公开(公告)日：2001-02-13

申请号：US09192103

申请日：1998-11-13

申请人： William Paul Kornrumpf ,  Robert John Wojnarowski

发明人： William Paul Kornrumpf ,  Robert John Wojnarowski

IPC分类号： H01P110

CPC分类号： H01H1/0036 ,  H01H61/0107 ,  H01H2001/0042 ,  H01H2001/0073 ,  H01H2001/0084 ,  H01H2061/006 ,  Y10T29/49105 ,  Y10T29/49128 ,  Y10T29/49155

摘要： A switch structure having a base surface; a first high density interconnect (HDI) plastic interconnect layer overlying the base surface layer; a cavity within the HDI plastic interconnect layer; at least one patterned shape memory alloy (SMA) layer overlying the HDI plastic interconnect layer and the cavity, and at least one patterned conductive layer over the at least one patterned SMA layer; a fixed contact pad within the cavity and attached to the base surface and a movable contact pad attached to a portion of the first patterned SMA layer within the cavity such that when the first and second patterned SMA layers and the first and second patterned metallized layers are in a first stable position, the movable contact pad touches the fixed contact pad, thereby providing an electrical connection and forming a closed switch. The structure has a second stable position in which the SMA and metallized layers are flexed away from the cavity so that the contact pads are not in contact and form an open switch.

摘要翻译： 具有基面的开关结构; 覆盖基底表面层的第一高密度互连（HDI）塑料互连层; HDI塑料互连层内的空腔; 覆盖HDI塑料互连层和空腔的至少一个图案形状记忆合金（SMA）层，以及至少一个图案化的SMA层上的至少一个图案化导电层; 空腔内的固定接触焊盘并附接到基体表面，以及可移动接触垫，其附接到空腔内的第一图案化SMA层的一部分，使得当第一和第二图案化SMA层和第一和第二图案化金属化层为 在第一稳定位置，可动接触垫接触固定接触垫，由此提供电连接并形成闭合的开关。 该结构具有第二稳定位置，其中SMA和金属化层从空腔弯曲，使得接触焊盘不接触并形成开放的开关。

公开(公告)号：US6040226A

公开(公告)日：2000-03-21

申请号：US177908

申请日：1998-10-23

申请人： Robert John Wojnarowski ,  James Wilson Rose ,  Ernest Wayne Balch ,  Leonard Richard Douglas ,  Evan Taylor Downey ,  Michael Gdula

发明人： Robert John Wojnarowski ,  James Wilson Rose ,  Ernest Wayne Balch ,  Leonard Richard Douglas ,  Evan Taylor Downey ,  Michael Gdula

IPC分类号： H01L21/20

CPC分类号： H01L21/20

摘要： A method is provided for the manufacture of precision electronic components such as resistors, inductors, and capacitors on a polymer or ceramic surface. The electronic components can be deposited and trimmed to precise or matched values without having precise depositions of all of the pre-patterned materials. Thin film electronic components are deposited on a surface, parameter values are measured or estimated, a correction offset file is generated, and the components are trimmed using adaptive lithography to a very close tolerance. A computer program can be used to enable the adjustment of electronic components by techniques such as changing the physical length of an inductor coil or resistor lead, or by changing a capacitor plate area.

摘要翻译： 提供了一种用于在聚合物或陶瓷表面上制造诸如电阻器，电感器和电容器的精密电子部件的方法。 电子部件可以沉积和修整成精确或匹配的值，而不会精确沉积所有预图案化材料。 薄膜电子部件沉积在表面上，测量或估计参数值，产生校正偏移文件，并且使用适应光刻将组件修剪到非常接近的公差。 可以使用计算机程序来实现电子部件的调整，例如改变电感线圈或电阻器引线的物理长度，或者改变电容器板面积。

公开(公告)号：US20080143216A1

公开(公告)日：2008-06-19

申请号：US11640803

申请日：2006-12-18

申请人： Ertugrul Berkcan ,  Emad Andarawis Andarawis ,  Robert John Wojnarowski ,  Charles Scott Sealing ,  Charles Erklin Seeley ,  Eladio Clemente Delgado ,  David Cecil Hays ,  Christopher James Kapusta ,  Nanette Judith Gruber

发明人： Ertugrul Berkcan ,  Emad Andarawis Andarawis ,  Robert John Wojnarowski ,  Charles Scott Sealing ,  Charles Erklin Seeley ,  Eladio Clemente Delgado ,  David Cecil Hays ,  Christopher James Kapusta ,  Nanette Judith Gruber

IPC分类号： H01L41/083 ,  H01L41/047 ,  H01L41/16

CPC分类号： H01L27/20 ,  G01M5/00 ,  G01N29/245 ,  G01N29/2475 ,  G01N2291/0231 ,  H01L41/047 ,  H01L41/1132

摘要： A piezoelectric planar composite apparatus to provide health monitoring of a structure and associated methods are provided. The piezoelectric planar composite apparatus includes a piezoelectric electric material layer, multiple electrodes positioned in electrical contact with the piezoelectric material layer, and multiple sets of electrode interconnect conductors each positioned in electrical contact with a different subset of the of the electrodes and positioned to form multiple complementary electrode patterns. Each of the complementary electrode patterns is positioned to form an electric field having an electric field axis oriented along a different physical axis from that of an electric field formed by at least one other of the complementary electrode patterns. The interconnect conductors can be distributed over several electrode interconnect conductor carrying layers to enhance formation of the different complementary electrode patterns.

摘要翻译： 提供了一种用于提供结构和相关方法的健康监测的压电平面复合装置。 压电平面复合装置包括压电电材料层，与压电材料层电接触的多个电极，以及多组电极互连导体，每组电极互连导体定位成与电极的不同子集电接触并且定位成形成多个 互补电极图案。 每个互补电极图案被定位成形成电场轴，该电场轴沿着与至少另一个互补电极图案形成的电场不同的物理轴定向。 互连导体可以分布在多个电极互连导体承载层上以增强不同互补电极图案的形成。