公开(公告)号：US20170079135A1

公开(公告)日：2017-03-16

申请号：US15123215

申请日：2014-05-28

Applicant: INTEL CORPORATION

Inventor： Chuan HU ,  Adel A. ELSHERBINI ,  Yoshihiro TOMITA ,  Shawna LIFF

IPC: H05K1/02 ,  H01L21/56 ,  H01L23/00 ,  H01L21/48 ,  H01L23/498 ,  H01L23/31

CPC classification number: H05K1/0283 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49894 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/1515 ,  H01L2924/181 ,  H05K1/036 ,  H05K1/185 ,  H05K3/1275 ,  H05K3/4688 ,  H05K2201/0133 ,  H05K2201/0187 ,  H05K2201/09018 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09263 ,  H05K2201/10151 ,  H01L2924/00012

Abstract: Embodiments of the present disclosure describe a wavy interconnect for bendable and stretchable devices and associated techniques and configurations. In one embodiment, an interconnect assembly includes a flexible substrate defining a plane and a wavy interconnect disposed on the flexible substrate and configured to route electrical signals of an integrated circuit (IC) device in a first direction that is coplanar with the plane, the wavy interconnect having a wavy profile from a second direction that is perpendicular to the first direction and coplanar with the plane. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例描述了用于可弯曲和可拉伸装置的波浪互连以及相关技术和配置。 在一个实施例中，互连组件包括限定平面的柔性衬底和布置在柔性衬底上的波纹互连，并且被配置成沿与平面共面的第一方向布置集成电路（IC）器件的电信号，波形 互连件具有从垂直于第一方向并与该平面共面的第二方向的波状轮廓。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20230140389A1

公开(公告)日：2023-05-04

申请号：US18091781

申请日：2022-12-30

Applicant: Intel Corporation

Inventor： Aleksandar ALEKSOV ,  Adel A. ELSHERBINI ,  Kristof DARMAWIKARTA ,  Robert A. MAY ,  Sri Ranga Sai BOYAPATI

IPC: H01L23/538 ,  H01L25/18 ,  H01L25/065 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L23/498

Abstract: An apparatus is provided which comprises: a plurality of first conductive contacts having a first pitch spacing on a substrate surface, a plurality of second conductive contacts having a second pitch spacing on the substrate surface, and a plurality of conductive interconnects disposed within the substrate to couple a first grouping of the plurality of second conductive contacts associated with a first die site with a first grouping of the plurality of second conductive contacts associated with a second die site and to couple a second grouping of the plurality of second conductive contacts associated with the first die site with a second grouping of the plurality of second conductive contacts associated with the second die site, wherein the conductive interconnects to couple the first groupings are present in a layer of the substrate above the conductive interconnects to couple the second groupings. Other embodiments are also disclosed and claimed.

公开(公告)号：US20220415847A1

公开(公告)日：2022-12-29

申请号：US17357729

申请日：2021-06-24

Applicant: Intel Corporation

Inventor： Feras EID ,  Johanna M. SWAN ,  Shawna M. LIFF ,  Adel A. ELSHERBINI ,  Aleksandar ALEKSOV

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/498

Abstract: Embodiments disclosed herein include multi-die modules and methods of assembling multi-die modules. In an embodiment, a multi-die module comprises a first die. In an embodiment the first die comprises a first pedestal, a plateau around the first pedestal, and a stub extending up from the plateau. In an embodiment, the multi-die module further comprises a second die. In an embodiment, the second die comprises a second pedestal, where the second pedestal is attached to the first pedestal.

公开(公告)号：US20220231394A1

公开(公告)日：2022-07-21

申请号：US17714957

申请日：2022-04-06

Applicant: Intel Corporation

Inventor： Adel A. ELSHERBINI ,  Mathew MANUSHAROW ,  Krishna BHARATH ,  Zhichao ZHANG ,  Yidnekachew S. MEKONNEN ,  Aleksandar ALEKSOV ,  Henning BRAUNISCH ,  Feras EID ,  Javier SOTO

IPC: H01P3/08 ,  H01P3/02 ,  H05K1/02 ,  H01P3/06

Abstract: Embodiments of the invention include a packaged device with transmission lines that have an extended thickness, and methods of making such device. According to an embodiment, the packaged device may include a first dielectric layer and a first transmission line formed over the first dielectric layer. Embodiments may then include a second dielectric layer formed over the transmission line and the first dielectric layer. According to an embodiment, a first line via may be formed through the second dielectric layer and electrically coupled to the first transmission line. In some embodiments, the first line via extends substantially along the length of the first transmission line.

公开(公告)号：US20190259622A1

公开(公告)日：2019-08-22

申请号：US16399703

申请日：2019-04-30

Applicant: INTEL CORPORATION

Inventor： Sasha N. OSTER ,  Fay HUA ,  Telesphor KAMGAING ,  Adel A. ELSHERBINI ,  Henning BRAUNISCH ,  Johanna M. SWAN

IPC: H01L21/285 ,  B82Y40/00 ,  H01L21/768 ,  H01L21/4763 ,  H01L21/033 ,  H01L25/16 ,  H05K1/16 ,  H05K3/28 ,  H01L23/66

Abstract: Embodiments include devices and methods, including a method for processing a substrate. The method includes providing a substrate including a first portion and a second portion, the first portion including a feature, the feature including an electrically conductive region, the second portion including a dielectric surface region. The method also includes performing self-assembled monolayer (SAM) assisted structuring plating to form a structure comprising a metal on the dielectric surface region, the feature being formed using a process other than the SAM assisted structuring plating used to form the structure, and the structure being formed after the feature. Other embodiments are described and claimed.

公开(公告)号：US20190165250A1

公开(公告)日：2019-05-30

申请号：US16097600

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Thomas L. SOUNART ,  Feras EID ,  Sasha N. OSTER ,  Georgios C. DOGIAMIS ,  Adel A. ELSHERBINI ,  Shawna M. LIFF ,  Johanna M. SWAN

IPC: H01L41/09 ,  H01L41/113 ,  B81B3/00 ,  G01L9/00

Abstract: Embodiments of the invention include a pressure sensing device having a membrane that is positioned in proximity to a cavity of an organic substrate, a piezoelectric material positioned in proximity to the membrane, and an electrode in contact with the piezoelectric material. The membrane deflects in response to a change in ambient pressure and this deflection causes a voltage to be generated in the piezoelectric material with this voltage being proportional to the change in ambient pressure.

公开(公告)号：US20180286840A1

公开(公告)日：2018-10-04

申请号：US15765992

申请日：2015-11-04

Applicant: Intel Corporation

Inventor： Vijay K. NAIR ,  Adel A. ELSHERBINI ,  Lakshman KRISHNAMURTHY ,  Johanna M. SWAN ,  Alexander ESSAIAN ,  Torrey W. FRANK

IPC: H01L25/16 ,  H01L23/498 ,  H01L25/00 ,  H01L23/538 ,  H01L23/00

CPC classification number: H01L25/162 ,  H01L21/568 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/96 ,  H01L25/105 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/24137 ,  H01L2224/24146 ,  H01L2224/24155 ,  H01L2224/24195 ,  H01L2224/73209 ,  H01L2224/73267 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/18162 ,  H01L2924/19105

Abstract: Embodiments are generally directed to three-dimensional small form factor system in package architecture. An embodiment of an apparatus includes a first package having a first side and an opposite second side, the first package including a plurality of embedded electronic components and one or more embedded via bars, each via bar including a plurality of through vias; and a second package having a first side and an opposite second side, the second package including a plurality of embedded electronic components, wherein a first side of the first package and a second side of second package are coupled together by a plurality of connections, including at least a first connection connecting the second package to a first component of the first package and a second connection connecting the second package to a first via bar of the one or more via bars.

公开(公告)号：US20180233431A1

公开(公告)日：2018-08-16

申请号：US15745701

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： Adel A. ELSHERBINI ,  Henning BRAUNISCH ,  Brandon M. RAWLINGS ,  Aleksandar ALEKSOV ,  Feras EID ,  Javier SOTO

IPC: H01L23/48 ,  H01L21/48 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L23/481 ,  H01L21/486 ,  H01L21/76897 ,  H01L21/76898 ,  H01L23/48 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53295

Abstract: Embodiments of the invention include conductive vias and methods for forming the conductive vias. In one embodiment, a via pad is formed over a first dielectric layer and a photoresist layer is formed over the first dielectric layer and the via pad. Embodiments may then include patterning the photoresist layer to form a via opening over the via pad and depositing a conductive material into the via opening to form a via over the via pad. Embodiments may then includeremoving the photoresist layer and forming a second dielectric layer over the first dielectric layer, the via pad, and the via. For example a top surface of the second dielectric layer is formed above a top surface of the via in some embodiments. Embodiments may then include recessing the second dielectric layer to expose a top portion of the via.

公开(公告)号：US20180212645A1

公开(公告)日：2018-07-26

申请号：US15745908

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Adel A. ELSHERBINI ,  Emanuel COHEN

IPC: H04B1/48 ,  H01L23/66 ,  H01L25/065 ,  H01Q1/22

CPC classification number: H04W76/10 ,  H01L23/66 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L2223/6616 ,  H01L2223/6677 ,  H01L2223/6683 ,  H01L2223/6688 ,  H01L2224/16221 ,  H01L2224/16235 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/1421 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15321 ,  H01L2924/19105 ,  H01Q1/2266 ,  H01Q1/2283 ,  H01Q3/30 ,  H04B1/38 ,  H04B1/48 ,  H04Q1/15 ,  H05K7/1487

Abstract: A microelectronic package is described with a wireless interconnect for chip-to-chip communication. In one example, the package includes an integrated circuit chip, a package substrate to carry the integrated circuit chip, the package substrate having conductive connectors to connect the integrated circuit chip to external components, a radio coupled to the integrated circuit chip to receive data from the integrated circuit chip and modulate the data onto a radio frequency carrier, and an antenna on the package substrate coupled to the radio to send the modulated data over the carrier to an external device.

公开(公告)号：US20180097458A1

公开(公告)日：2018-04-05

申请号：US15283117

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Shawna M. LIFF ,  Georgios C. DOGIAMIS ,  Sasha N. OSTER ,  Feras EID ,  Adel A. ELSHERBINI ,  Thomas L. SOUNART ,  Johanna M. SWAN

IPC: H02N2/02 ,  H01L41/09 ,  H01L41/187 ,  H01L41/18

CPC classification number: H02N2/023 ,  G01J3/42 ,  H01L27/20 ,  H02N2/025 ,  H02N2/026 ,  H02N2/101

Abstract: Embodiments of the invention include a self-propelled sensor system. In an embodiment, the self-propelled sensor system includes a piezoelectrically actuated motor that is integrated with a substrate. In an embodiment, the self-propelled sensor system may also include a sensor and an integrated circuit electrically coupled to the piezoelectrically actuated motor. Embodiments of the invention may also include self-propelled sensor systems that include plurality of piezoelectrically actuated motors. In an embodiment the piezoelectrically actuated motors may be one or more different types of motors including, but not limited to, stick and slip motors, inchworm stepping motors, standing acoustic wave motors, a plurality of piezoelectrically actuated cantilevers, and a piezoelectrically actuated diaphragm. Additional embodiments of the invention may include a plurality of self-propelled sensor systems that are communicatively coupled to form a sensor mesh.