Panel structure with plurality of chip compartments for providing high volume of chip modules
    24.
    发明授权
    Panel structure with plurality of chip compartments for providing high volume of chip modules 失效
    具有多个芯片隔间的面板结构,用于提供大量的芯片模块

    公开(公告)号:US06774472B2

    公开(公告)日:2004-08-10

    申请号:US10246045

    申请日:2002-09-17

    Inventor: Mark V. Pierson

    Abstract: A method of forming a plurality of individual semiconductor chip modules wherein a plurality of chips are placed in a plurality of chip compartments formed by adhering a support panel to the first surface and a cover panel to the second surface of a stiffener panel having openings defining sidewalls of the chip compartments. The resulting laminated panel structure is then cut into a plurality of modules each having at least one compartment containing at least one chip. Each chip is electrically connected to interior conductive pads on the inner surface of the support panel, and these interior pads in turn are connected by conductive paths to exterior conductive terminals deposited on the outer surface of the support panel. The electrical connections between the chip and the interior conductive pads of the support panel may be encapsulated in a polymeric material before the cover panel is adhered to the stiffener panel.

    Abstract translation: 一种形成多个单独的半导体芯片模块的方法,其中将多个芯片放置在通过将支撑板粘附到第一表面而形成的多个芯片隔室中,并且将盖板覆盖到具有限定侧壁的开口的加强板的第二表面 的芯片隔间。 然后将所得的层压板结构切成多个模块,每个模块具有至少一个包含至少一个芯片的隔室。 每个芯片电连接到支撑板的内表面上的内部导电焊盘,并且这些内部衬垫又通过导电路径连接到沉积在支撑板的外表面上的外部导电端子。 在盖板粘附到加强板之前,芯片和支撑板的内部导电焊盘之间的电连接可被封装在聚合材料中。

    Common heatsink for multiple chips and modules
    26.
    发明授权
    Common heatsink for multiple chips and modules 有权
    多个芯片和模块的通用散热器

    公开(公告)号:US06661661B2

    公开(公告)日:2003-12-09

    申请号:US10040779

    申请日:2002-01-07

    Abstract: A common heatsink for multiple chips and modules which are spaced on electronic packages, and an arrangement for the formation of precision gaps intermediate two or more chips or modules covered by a common heatsink. Furthermore, a precision tool enables positioning of a common heatsink for multiple chips and modules for electronic packages facilitating the formation of x, y and z-directional compliant thermal interfaces intermediate a plurality of chips and a common heatsink with minimized effects of package tolerances.

    Abstract translation: 用于在电子封装上间隔开的多个芯片和模块的共同散热器,以及用于在由公共散热器覆盖的两个或更多个芯片或模块之间形成精密间隙的装置。 此外,精密工具使得能够为用于电子封装的多个芯片和模块的公共散热器定位,便于在多个芯片和共用散热器之间形成x,y和z方向兼容的热接口,并具有最小化的封装公差的影响。

    Method for bonding heat sinks to overmolds and device formed thereby
    27.
    发明授权
    Method for bonding heat sinks to overmolds and device formed thereby 失效
    用于将散热器连接到包覆成型体的方法和由此形成的装置

    公开(公告)号:US06206997B1

    公开(公告)日:2001-03-27

    申请号:US09248341

    申请日:1999-02-11

    Abstract: A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to silica; and (c) bonding an article to the surface by applying an adherent material between the article and the surface. Often, the silicon-containing residue is silicone oil, a mold release compound, which may prevent the formation of a bond when using conventional bonding methods and materials. The silica layer formed on the surface of the molded polymer assists in formation of a proper bond. The plasma may be an oxygen plasma and the adherent material may be selected from either a heat cured silicone-based paste adhesive with a metal oxide filler or a heat cured porous polymer film impregnated with adhesive. In particular, the film may be polytetrafluoroethylene, the adhesive may be polybutadine, and the film may be further impregnated with a metal oxide heat transfer medium, such as zinc oxide. An alternate method comprises applying the porous polymer film without plasma treatment and heat curing the film to form a proper bond.

    Abstract translation: 一种用于将散热器粘合到封装的电子部件的方法包括以下步骤:(a)将形成在基底上的模制聚合物的表面暴露于等离子体; (b)允许等离子体至少部分地将表面上的含硅残余物转化为二氧化硅; 和(c)通过在制品和表面之间施加粘附材料将制品粘合到表面上。 通常,含硅残渣是使用常规粘合方法和材料的硅油,脱模剂,可以防止形成粘结。 形成在模塑聚合物表面上的二氧化硅层有助于形成适当的键。 等离子体可以是氧等离子体,并且粘附材料可以选自具有金属氧化物填料的热固化硅氧烷基糊状粘合剂或浸渍有粘合剂的热固化多孔聚合物膜。 特别地,膜可以是聚四氟乙烯,粘合剂可以是聚丁二烯,并且该膜可以进一步用金属氧化物传热介质如氧化锌浸渍。 替代方法包括在不进行等离子体处理的情况下应用多孔聚合物膜并热固化膜以形成适当的键。

    TFT panel alignment and attachment method and apparatus
    28.
    发明授权
    TFT panel alignment and attachment method and apparatus 失效
    TFT面板对准和附接方法和装置

    公开(公告)号:US06193576B1

    公开(公告)日:2001-02-27

    申请号:US09082287

    申请日:1998-05-19

    CPC classification number: G02F1/13336 Y10S345/903

    Abstract: A method for aligning a plurality of thin film transistor tiles for constructing a flat panel display. A coverplate is arranged on a coverplate support. A first layer of a bonding material is applied to at least one of a first side of each of the tiles and a surface of the coverplate on which the tiles are to be secured. The tiles are arranged on the coverplate, such that the first layer of bonding material is arranged between the tiles and the coverplate. The tiles are connected to an alignment apparatus. The tiles are aligned relative to each other and the coverplate. The tiles are at least partially secured to the coverplate.

    Abstract translation: 一种用于对准多个用于构建平板显示器的薄膜晶体管瓦片的方法。 盖板安装在盖板支架上。 接合材料的第一层被施加到每个瓷砖的第一侧中的至少一个以及待固定瓷砖的盖板的表面。 瓦片布置在盖板上,使得第一层粘合材料布置在瓦片和盖板之间。 瓦片连接到对准装置。 瓷砖相对于彼此和盖板对准。 瓦片至少部分地固定到盖板上。

    Chip C4 assembly improvement using magnetic force and adhesive
    30.
    发明授权
    Chip C4 assembly improvement using magnetic force and adhesive 失效
    芯片C4组装改进使用磁力和粘合剂

    公开(公告)号:US6142361A

    公开(公告)日:2000-11-07

    申请号:US458483

    申请日:1999-12-09

    Abstract: A method, and associated structure, for adhesively coupling a chip to an organic chip carrier. The chip is attached to a top surface of the organic chip carrier by interfacing a solder bump between a C4 solder structure on the chip and a pad on a top surface of the chip carrier. The melting temperature of the solder bump is less than the melting temperature of the C4 solder structure. A block of ferrous material is placed on a top surface of the chip. A temporary or permanent stiffener of ferrous material is placed on the top surface of the chip carrier. A permanent magnet is coupled to a bottom surface of the chip carrier. Alternatively, an electromagnetic could be utilized instead of the electromagnet. Due to the permanent magnet or the electromagnet, a magnetic force on the stiffener is directed toward the magnet and substantially flattens the first surface of the chip carrier. Similarly, a magnetic force on the block is directed toward the magnet such that the electronic component and the chip carrier are held in alignment. The solder bump is reflowed at a temperature between the melting temperature of the solder bump and the melting temperature of the C4 solder structure. The reflowing reconfigures the solder bump. The magnetic force on the block frictionally clamps the reflowed solder between the C4 solder structure and the pad. The chip and carrier are cooled, resulting in the C4 solder structure being adhesively and conductively coupled to the pad.

    Abstract translation: 一种用于将芯片粘合地耦合到有机芯片载体的方法和相关联的结构。 芯片通过在芯片上的C4焊料结构和芯片载体的顶表面上的焊盘之间接合焊料凸块来附接到有机芯片载体的顶表面。 焊料凸点的熔化温度小于C4焊料结构的熔化温度。 将一块黑色金属材料放置在芯片的上表面上。 铁芯材料的临时或永久性加强件被放置在芯片载体的顶表面上。 永磁体耦合到芯片载体的底表面。 或者,可以使用电磁来代替电磁体。 由于永磁体或电磁体,加强件上的磁力被引向磁体并且基本平坦化芯片载体的第一表面。 类似地,块上的磁力指向磁体,使得电子部件和芯片载体保持对准。 在焊料凸块的熔化温度和C4焊料结构的熔化温度之间的温度下回流焊料凸点。 回流重新配置焊料凸块。 块上的磁力摩擦地夹住C4焊料结构和焊盘之间的回流焊料。 芯片和载体被冷却,导致C4焊料结构被粘性地导电耦合到焊盘。

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