公开(公告)号：US5382300A

公开(公告)日：1995-01-17

申请号：US216225

申请日：1994-03-22

申请人： Greg E. Blonder ,  Yinon Degani ,  Thomas D. Dudderar

发明人： Greg E. Blonder ,  Yinon Degani ,  Thomas D. Dudderar

IPC分类号： B23K35/22 ,  B23K35/02 ,  B23K35/14 ,  B23K35/26 ,  B23K101/36 ,  H05K3/34 ,  B23K35/34

CPC分类号： B23K35/262 ,  H05K3/3484 ,  B23K35/025 ,  H05K2201/0272 ,  H05K3/3463

摘要： A solder paste is composed of a vehicle (or flux) system and a mixture of at least two solder powders. One component of this mixture is a eutectic or near-eutectic Sn/Pb alloy powder, while the other component comprises powders selected from at least one elemental metal powder or at least one solder alloy powder or at least one elemental metal powder and at least one solder alloy powder. Said other component is a powder or combination of powders each of which has a liquidus temperature which is lower by at least 5 degrees Centigrade (.degree.C.) than the solidus temperature of said eutectic or near-eutectic Sn/Pb alloy powder or a solidus temperature which is higher by at least 5.degree. C. than the liquidus temperature of said eutectic or near-eutectic Sn/Pb alloy powder. The eutectic or near-eutectic Sn/Pb powder makes up from 5 to 95 weight percent of the total powder mixture. Alternatively, not all powders which comprise the second component need to obey this rule so long as at least 30% by wt. of the entire powder mixture has a solidus temperature which is at least 5.degree. C. higher than the highest liquidus temperature of the eutectic or near-eutectic Sn/Pb alloy powder. This solder paste results in an uncompromised consolidation and wetting process in which all of the solder joints or balls are formed on and wetted to an appropriate contact by the solder reflow process.

摘要翻译： 焊膏由车辆（或焊剂）系统和至少两种焊料粉末的混合物组成。 该混合物的一种组分是共晶或近共晶Sn / Pb合金粉末，而另一种组分包含选自至少一种元素金属粉末或至少一种焊料合金粉末或至少一种元素金属粉末的粉末和至少一种 焊剂合金粉末。 所述其他组分是粉末或粉末的组合，其每一种的液相线温度比所述共晶或近共晶Sn / Pb合金粉末或固相线的固相线温度低至少5摄氏度（℃） 比所述共晶或近共晶Sn / Pb合金粉末的液相线温度高5℃以上的温度。 共晶或近共晶Sn / Pb粉末占总粉末混合物的5至95重量％。 或者，并非所有包含第二组分的粉末都需要遵循该规则，只要至少30重量％。 的整个粉末混合物的固相线温度比共晶或近共晶Sn / Pb合金粉末的最高液相线温度高至少5℃。 这种焊膏导致无与伦比的固结和润湿过程，其中所有焊接接头或球通过焊料回流工艺形成在适当的接触部上并被润湿。

公开(公告)号：US20070262418A1

公开(公告)日：2007-11-15

申请号：US11879632

申请日：2007-07-18

申请人： Yinon Degani ,  Maureen Lau ,  King Tai

发明人： Yinon Degani ,  Maureen Lau ,  King Tai

IPC分类号： H01L29/00

CPC分类号： H01L28/40 ,  H01L27/016 ,  H01L27/101 ,  H01L28/10 ,  H01L28/20 ,  H01L2924/0002 ,  H01L2924/00

摘要： The specification describes an integrated passive device (IPD) that is formed on a polysilicon substrate. A method for making the IPD is disclosed wherein the polysilicon substrate is produced starting with a single crystal handle wafer, depositing a thick substrate layer of polysilicon on one or both sides of the starting wafer, forming the IPD on one of the polysilicon substrate layers, and removing the handle wafer. In a preferred embodiment the single crystal silicon handle wafer is a silicon wafer rejected from a single crystal silicon wafer production line.

摘要翻译： 本说明书描述了形成在多晶硅衬底上的集成无源器件（IPD）。 公开了一种用于制造IPD的方法，其中从单晶晶片处开始制造多晶硅衬底，在起始晶片的一侧或两侧沉积厚的多晶硅衬底层，在多晶硅衬底层之一上形成IPD， 并移除手柄晶片。 在优选实施例中，单晶硅处理晶片是从单晶硅晶片生产线排除的硅晶片。

公开(公告)号：US20050277226A1

公开(公告)日：2005-12-15

申请号：US10856269

申请日：2004-05-28

申请人： Yinon Degani ,  Jericho Jacala

发明人： Yinon Degani ,  Jericho Jacala

IPC分类号： H01L21/44 ,  H01L23/485 ,  H01L23/498 ,  H05K3/34

CPC分类号： H05K3/3436 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3025 ,  H05K3/3463 ,  H05K2201/0989 ,  H05K2201/10674 ,  Y02P70/613 ,  H01L2924/00014

摘要： A printed circuit board has, on one surface thereof, a plurality of metallic pads forming or leading to wire traces. The printed circuit board surface is solder mask free and a substantially runless soldering alloy is used to connect I/O solder bumps on a flip chip to the metallic pads.

摘要翻译： 印刷电路板在其一个表面上具有形成或导向导线迹线的多个金属垫。 印刷电路板表面是无焊料掩模，并且使用基本上无润滑的焊接合金将倒装芯片上的I / O焊料凸点连接到金属焊盘。

公开(公告)号：US06734539B2

公开(公告)日：2004-05-11

申请号：US09964009

申请日：2001-09-26

申请人： Yinon Degani ,  Thomas Dixon Dudderar ,  Liguo Sun ,  Meng Zhao

发明人： Yinon Degani ,  Thomas Dixon Dudderar ,  Liguo Sun ,  Meng Zhao

IPC分类号： H01L2302

CPC分类号： H05K1/144 ,  H01L23/552 ,  H01L23/66 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/18 ,  H01L2223/6688 ,  H01L2224/05599 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： The specification describes an MCM package which contains both a digital MCM and an RF MCM in a stacked configuration. The package contains means for isolating RF signals from digital signals. In one case the digital MCM substrate is attached to the system substrate and the RF MCM substrate is attached to the digital MCM substrate. Solder bumps are used for attachment in an arrangement resembling a BGA. For high density packages, at least the digital MCM comprises stacked IC chips. In the embodiment with the RF MCM substrate on the top of the stack, Passive Through Interconnections (PTIs) are made through the digital MCM substrate, and electrically isolated therefrom. The passive through interconnections are made through the solder bumps between boards and interconnected using a passive (with respect to the digital MCM board) through hole. Both the RF ground and the RF input can be isolated using PTIs. For additional isolation, the solder bumps comprising the PTIs are shielded with a Faraday cage. The Faraday cage comprises an array of solder bumps surrounding the solder bump RF conductors.

摘要翻译： 该规范描述了包含堆叠配置中的数字MCM和RF MCM的MCM包。 该封装包含用于隔离RF信号与数字信号的装置。 在一种情况下，数字MCM基板附着到系统基板，并且RF MCM基板附接到数字MCM基板。 焊接凸块用于在类似于BGA的布置中的附接。 对于高密度封装，至少数字MCM包括堆叠的IC芯片。 在堆叠顶部具有RF MCM衬底的实施例中，通过数字MCM衬底制作被动通孔互连（PTI），并与之电隔离。 被动通过互连通过板之间的焊料凸块制成，并使用无源（相对于数字MCM板）通孔进行互连。 RF接地和RF输入都可以使用PTI进行隔离。 为了进一步隔离，包含PTI的焊料凸块用法拉第笼保护。 法拉第笼包括围绕焊料凸块RF导体的焊料凸块阵列。

公开(公告)号：US06560735B1

公开(公告)日：2003-05-06

申请号：US09366388

申请日：1999-08-03

申请人： Louis Nelson Ahlquist ,  Yinon Degani ,  Jericho J. Jacala ,  Dean Paul Kossives ,  King Lien Tai

发明人： Louis Nelson Ahlquist ,  Yinon Degani ,  Jericho J. Jacala ,  Dean Paul Kossives ,  King Lien Tai

IPC分类号： G01R3128

CPC分类号： G01R31/2853

摘要： The specification describes an IC test apparatus having a test bed with sockets adapted to engage arrays of I/O solder balls/bumps on the IC chip. In one embodiment the sockets are provided with through holes to interconnect the solder bumps to the next board level with minimum electrical path length thereby reducing parasitic capacitive coupling. In another embodiment the sockets in the test bed are formed by intersecting V-grooves. If pairs of intersecting V-grooves are used, pyramid shaped features are produced at the bottom of each socket. Both the sharp edges formed by the intersecting V-grooves and the pyramid provide contact enhancement between the solder bumps and the test bed. The test bed can be made as a universal blank for a given solder bump pitch. The desired test circuit is formed at the next board level.

摘要翻译： 本说明书描述了一种具有测试台的IC测试装置，其具有适于接合IC芯片上的I / O焊球/凸起阵列的插座。 在一个实施例中，插座设置有通孔，以将焊料凸块互连到具有最小电路长度的下一个电路板级，从而减少寄生电容耦合。 在另一个实施例中，试验台中的插座由V形槽相交形成。 如果使用成对的相交的V形槽，则在每个插座的底部产生金字塔形特征。 由相交的V形槽和金字塔形成的锐利边缘都提供焊料凸块和试验台之间的接触增强。 测试台可以作为给定焊料凸块间距的通用坯料。 所需的测试电路在下一个电路板级形成。

公开(公告)号：US06369444B1

公开(公告)日：2002-04-09

申请号：US09081448

申请日：1998-05-19

申请人： Yinon Degani ,  Thomas Dixon Dudderar ,  King Lien Tai

发明人： Yinon Degani ,  Thomas Dixon Dudderar ,  King Lien Tai

IPC分类号： H01L2334

CPC分类号： H01L25/0652 ,  H01L2224/16225 ,  H01L2924/15151 ,  H01L2924/15321

摘要： The specification describes interconnection assemblies for silicon-on-silicon multichip modules. The silicon-on-silicon MCMs are mounted on epoxy/glass laminates which have a coefficient of thermal expansion (CTE) that essentially matches the CTE of silicon. In the preferred embodiment the assembly is a PC card with card edge connectors, i.e. without fixed solder interlevel interconnections, so that the CTE of the epoxy laminate comprising the card can be modified without regard to potential mismatch with a mother board.

摘要翻译： 该规范描述了硅上硅多芯片模块的互连组件。 硅上硅MCM安装在具有基本上与硅的CTE匹配的热膨胀系数（CTE）的环氧树脂/玻璃层压板上。 在优选实施例中，组件是具有卡边缘连接器的PC卡，即没有固定的焊料层间互连，使得可以修改包含卡的环氧树脂层压体的CTE，而不考虑与母板的潜在不匹配。

公开(公告)号：US06342399B1

公开(公告)日：2002-01-29

申请号：US09435971

申请日：1999-11-08

申请人： Yinon Degani

发明人： Yinon Degani

IPC分类号： H01L2261

CPC分类号： H01L24/10 ,  H01L24/05 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： The specification describes a technique for burn-in electrical testing of IC dies prior to wire bonding the dies to the next interconnection level. The dies are provided with a test solder bump array interconnected to the IC contact pads of the dies. The Known Good Dies (KGD) can then be wire bonded, or alternatively flip-chip solder bump bonded, to the next interconnect level.

摘要翻译： 本说明书描述了一种在将裸片引线接合到下一互连级别之前，对IC芯片进行老化电气测试的技术。 模具设置有与模具的IC接触焊盘互连的测试焊料凸块阵列。 可以将已知的良好模具（KGD）引线接合，或者将焊接凸点焊接到另一个互连级别。

公开(公告)号：US06282100B1

公开(公告)日：2001-08-28

申请号：US09346100

申请日：1999-07-01

申请人： Yinon Degani ,  Thomas Dixon Dudderar ,  Robert Charles Frye

发明人： Yinon Degani ,  Thomas Dixon Dudderar ,  Robert Charles Frye

IPC分类号： H05K118

CPC分类号： H01L23/49833 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： The specification describes a high density I/O IC package in which the IC chip is bonded to a silicon intermediate interconnection substrate (IIS), and the IIS is wire bonded to a printed wiring board. This marriage of wire bond technology with high density I/O IC chips results in a low cost, high reliability, state of the art IC package.

摘要翻译： 该说明书描述了IC芯片与硅中间互连基板（IIS）接合的高密度I / O IC封装，并且IIS被引线接合到印刷电路板。 这种线接技术与高密度I / O IC芯片的结合导致低成本，高可靠性，最先进的IC封装。

公开(公告)号：US6100475A

公开(公告)日：2000-08-08

申请号：US67271

申请日：1998-04-27

申请人： Yinon Degani ,  King Lien Tai

发明人： Yinon Degani ,  King Lien Tai

IPC分类号： H01L21/60 ,  H01L23/12 ,  H01L23/498 ,  H05K1/18 ,  H05K3/34 ,  H05K1/11 ,  B23K31/00

CPC分类号： H01L23/49827 ,  H05K3/3436 ,  H05K3/3463 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K2201/09572 ,  H05K2201/10666 ,  H05K2201/10992 ,  Y02P70/613

摘要： The specification describes techniques for attaching double sided circuit boards having plated through holes to interconnection substrates using solder bump arrays. The through holes are filled with a high melting point solder which allows solder bumps to be located directly on the through hole thus saving board area and reducing the interconnection length.

摘要翻译： 本说明书描述了使用焊料凸块阵列将具有电镀通孔的双面电路板连接到互连基板的技术。 通孔填充有高熔点焊料，其允许焊料凸块直接位于通孔上，从而节省了电路板面积并减小了互连长度。

公开(公告)号：US5904859A

公开(公告)日：1999-05-18

申请号：US825923

申请日：1997-04-02

申请人： Yinon Degani

发明人： Yinon Degani

IPC分类号： H01L21/60 ,  H01L23/485 ,  H05K3/06 ,  H01B13/00

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H05K3/067

摘要： The specification describes techniques for applying under bump metallization (UBM) for solder bump interconnections on interconnection substrates. The UBM of the invention comprises a Cu, Cu/Cr, Cr multilayer structure. Problems in etching the Cu/Cr layer are overcome using a high pH etchant containing a copper complexing ingredient to prevent passivation of the copper constituent by the chromium etchant solution. With the availability of this etchant the UBM multilayer can be formed using subtractive techniques.

摘要翻译： 该说明书描述了用于在互连衬底上应用凸块下金属化（UBM）用于焊料凸块互连的技术。 本发明的UBM包括Cu，Cu / Cr，Cr多层结构。 使用含有铜络合成分的高pH腐蚀剂来克服蚀刻Cu / Cr层的问题，以防止铬蚀刻剂溶液对铜成分的钝化。 随着这种蚀刻剂的可用性，UBM多层可以使用减法技术形成。